Module-7
Module-7
INTERRUPT PROGRAMMING
Nested vector interrupt control (NVIC)
• Nested Vector Interrupt Controller (NVIC) is a core component of the ARM Cortex-M microcontroller
architecture used for handling interrupts.
• An interrupt is an event that stops the execution of the main program and transfers the control to a specified
function, called an interrupt handler, to perform a specific task.
• The NVIC manages the priority and handling of interrupts in the Cortex-M processor.
• The NVIC uses a priority-based interrupt system where each interrupt source is assigned a priority level, and
the highest priority interrupt is serviced first.
• The NVIC also supports nested interrupts, which allows higher priority interrupts to preempt lower priority
interrupts.
• When an interrupt occurs, the NVIC saves the current state of the interrupted program and jumps to the
interrupt handler. After the interrupt handler completes its task, the NVIC restores the saved state of the
interrupted program and continues its execution.
The NVIC has a set of registers that control the interrupt handling process, including
• Interrupt Set-Enable Register (ISER)
• Interrupt Clear-Enable Register (ICER)
• Interrupt Set-Pending Register (ISPR), and
• Interrupt Clear-Pending Register (ICPR)
These registers allow the programmer to enable and disable interrupts, set and clear
pending interrupts, and control interrupt priorities.
Non Maskable Interrupt (NMI) raised
from Peripheral and sent to MCU
• An interrupt can be triggered internally from
the microcontroller (MCU) or externally, by a
peripheral.
• The interrupt alerts the central processing unit
(CPU) to an occurrence such as a time-based
event (a specified amount of time has elapsed or a
specific time is reached, for example), a change
of state, or the start or end of a process.
I2STX_CLK — Transmit Clock. It is driven by the master and received by the slave.
I2STX_WS — Transmit Word Select. It is driven by the master and received by the slave.
I2STX_SDA — Transmit data. It is driven by the transmitter and read by the receiver.
EINT Registers
Steps to Configure Interrupts
1. Configure the pins as external interrupts in PINSELx register.
2. Clear any pending interrupts in EXTINT.
3. Configure the EINTx as Edge/Level triggered in EXTMODE register.
4. Select the polarity(Falling/Rising Edge, Active Low/High) of the interrupt in EXTPOLAR
register.
5. Finally enable the interrputs by calling NVIC_EnableIRQ() with IRQ number.
#include<LPC17xx.h>
void EINT3_IRQHandler(void);
unsigned char int3_flag=0; External Interrupt Example Programming
int main(void)
{
LPC_PINCON->PINSEL4 |= 0x04000000; //P2.13 as EINT3
LPC_PINCON->PINSEL4 &= 0xFCFFFFFF; //P2.12 GPIO for LED
LPC_GPIO2->FIODIR = 0x00001000; //P2.12 is assigned output
LPC_GPIO2->FIOSET = 0x00001000; //Initiall LED is kept on
LPC_SC->EXTINT = 0x00000008; //writing 1 cleares the interrupt, get set if there is interrupt
LPC_SC->EXTMODE = 0x00000008; //EINT3 is initiated as edge senitive, 0 for level sensitive
LPC_SC->EXTPOLAR = 0x00000000; //EINT3 is falling edge sensitive, 1 for rising edge
while(1) ;
}
void EINT3_IRQHandler(void)
{
LPC_SC->EXTINT = 0x00000008; //cleares the interrupt
Examples:
• ADC and
• External Interrupts