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Microprocessor Class 10

The document discusses interrupts in microprocessors, explaining their role in allowing external devices to signal the processor and suspend normal execution for servicing. It categorizes interrupts into maskable and non-maskable types, as well as hardware and software interrupts, detailing specific examples and their vector addresses. Additionally, it outlines the priority levels of various interrupts and their masking capabilities.

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3 views

Microprocessor Class 10

The document discusses interrupts in microprocessors, explaining their role in allowing external devices to signal the processor and suspend normal execution for servicing. It categorizes interrupts into maskable and non-maskable types, as well as hardware and software interrupts, detailing specific examples and their vector addresses. Additionally, it outlines the priority levels of various interrupts and their masking capabilities.

Uploaded by

sureshpv36
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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MICROPROCESSOR

PART 10

SIBIN K

Electrical Subject Matter Expert


Interrupts
● Interrupt is a process where an external device can get the attention of the
microprocessor.
● Interrupt is a mechanism by which an I/O or an instruction can suspend the normal
execution of processor and get itself serviced.
● Generally, a particular task is assigned to that interrupt signal.
● In the microprocessor based system the interrupts are used for data transfer between the
peripheral devices and the microprocessor
Interrupt Service Routine (ISR)
● A small program or a routine that when executed services the corresponding
interrupting source is called as an ISR.

Maskable /Non- Maskable Interrupt


● An interrupt that can be disabled by writing some instruction is known as Maskable
Interrupt otherwise it is called Non- Maskable Interrupt.
Interrupts can also be classified into:
● Vectored (the address of the service routine is hard-wired)
● Non-vectored (the address of the service routine needs to be supplied
externally)

Another classification is
● Hardware Interrupts
● Software Interrupts
Software Interrupts
● It is a particular instructions that can be inserted in a desired location in a program. There
are eight Software interrupts in 8085 Microprocessor. From RST0 to RST7.
1. RST0
2. RST1
3. RST2
4. RST3
5. RST4
6. RST5
7. RST6
8. RST7
Hardware interrupts
● Interrupts invoked by a hardware are called Hardware interrupts
● Hardware Interrupts given below:
1. TRAP
2. RST7.5
3. RST6.5
4. RST5.5
5. INTR
Vectored interrupts
● Interrupts having a fixed address for their ISR are called vectored interrupts

● Interrupt Vector Address


● RST7.5 003CH
● RST6.5 0034H
● RST5.5 002CH
● TRAP 0024H

INTR is a non- vectored interrupt


Interrupt Priority masking Disable by DI vector

TRAP 1 no No 0024

RST7.5 2 Yes Yes 003C

RST6.5 3 Yes Yes 0034

RST5.5 4 Yes Yes 002C

INTR 5 no yes Non vectored


SIM (set interrupt mask)
RIM (read interrupt mask)

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