Lecture[6] - Addressing Modes
Lecture[6] - Addressing Modes
Lecture 6
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Transfer instruction (MOV)
Instruction are a sequence of bits divided into fields
Opcode : represented by an abbreviation (mnemonic)
Operands address to: OP-Code Operands
1. Registers (represented by their name)
2. Constants
3. Memory (represented by a value (address) or variable name)
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Processor Modes
Real-Address mode (original mode provided by 8086)
Only 1 MB of memory can be addressed, from 0 to FFFFF (hex)
Programs can access any part of main memory مشكلة
MS-DOS runs in real-address mode اقدم نظام
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Register Addressing
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Register Addressing
1. Register Addressing offset
CS:IP 40 1000
The operation is done on one or two registers
CS:IP 89 1001
INST R,R 60 1002
INST R CS:IP 5F 1003
7B 1004
Examples 00 1005
15 1006
INC BX ; increment the BX register E8 1007
MOV AX,BX ; copy the contents of BX to AX 1B 1008
inst. exists in 1001, 1002 location mem 2F 1009
FC 100A
AX F3C1 FF 100B
BX 18B2
18B3 FF 100C
CX 1219 C3 100D
1A 100E
DX 01D3
AA 100F
There is no exchange with the memory, which increases the processing
speed of the operand (opcode existed in memory and opera
Compilers use registers to optimize code
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Immediate Addressing
• In immediate addressing mode, the 8-bit or 16-bit data is given in the
instruction itself (i.e., operand itself will be the part of the instruction) rather
than register as seen in register addressing and is moved to a destination
register or memory location.
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Immediate Addressing
2- Immediate Addressing
One operand is a constant (value):
INST R,Cste
Examples
MOV AX,243 ; load register AX with the decimal number 243
ADD AX,243h ; add the AX register with the hexadecimal number 243
MOV AX,0A243 ; Add 0 prefix when the left hexadecimal digit is a letter
MOV AL,'a' ; Load the AL register with the ASCII character 'a‘
MOV AX,'a' ; Load AH with 00 and AL with the ASCII character 'a‘
MOV AX,'ab' ; Load AH with 'a' and AL with 'b‘
MOV AX,500h ; Load AH with 500h
offset
CS:IP B8 1000
AX F3C1 0500
CS:IP 00 1001
05 1002
BX 18B2
CS:IP 5F 1003
CX 1219 7B 1004
DX 01D3
offset
65 B8 1100
FF 1101
05 1102
5F 1103
7B 1104
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Immediate Addressing
It is necessary to indicate the format of the data: byte or word (2 bytes)
MOV [1100H],65H
So, we must use a data type specifier (byte/word pointer directives):
offset
00 65 B8 1100
FF 1101
05 1102
5F 1103
7B 1104
Note: Intel microprocessors store the least significant byte to the lowest
address (little Endian format).
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Direct Addressing
• In this addressing mode, the effective address (EA) or offset address
(OA) located within the data segment (DS) is directly given in the
instruction as displacement field. The displacement is given
following the instruction opcode as a 16-bit unsigned or 8-bit sign-
extended number.
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Direct Addressing
3. Direct addressing
Instruction contains the address of the memory cell where the data is stored
The address of the memory cell (its offset) is specified directly in the instruction
INST R,[ad]
INST [ad],R
The value of ad is a constant (displacement) to be added to the contents of DS
register to form the physical address of 20 bits offset
If the segment is not specified, DS is assumed CS:IP A1 1000
CS:IP 05 1001
10 1002
CS:IP 5F 1003
7B 1004
Examples DS:1005 00 1005
C5 1006
MOV AX, [1005H] E8 1007
; Copy the contents of memory address DS:1005 in AX 1B 1008
MOV [123],AX
; Copy the contents of AX to memory address DS: 123
AX 1B30
C500
1B00
MOV AX,[SS:243]
; Copy the contents of memory SS: 243 in AX
Direct Addressing
We use the variable name (label) to address memory directly
Variables are defined in the data section of the program
The Assembler computes address (offset) of named variable
offset
CS:IP FF
A1 1000
Examples
00
FF 1001
30
FF 1002
data segment FF 1003
; data declaration FF 1004
var DW 6655H ; var = 6655H
ends
BL 7C
FF
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Indirect Addressing
• This type of addressing mode allows to specify the effective address
at any memory location either in a pointer register (i.e., base pointer
register BP or base register BX) or in an index register (source index
register SI or destination index register DI) i.e., EA = (BX) or EA =
(BP).
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Indirect Addressing
4. Indirect addressing
The address of the operand is stored in one of the base registers (BX or
BP) or index registers (SI or DI)
The register is to be specified in the syntax: [SR : OR].
If SR is not specified, the default segment is used
Examples
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Indirect Addressing
In direct addressing, the address is given in brackets:
Example: MOV AX, [130] ; direct addressing
In indirect addressing, the BX register is used to store the address of a given data
Example: MOV AX, [BX] ; indirect addressing
Before using indirect addressing, we must initialize BX by the address of data
offset
(use OFFSET operator) CS:IP FF
BB 1000
00
FF 1001
Examples
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FF 1002
data segment CS:IP 8B
FF 1003
; data declaration FF
07 1004
var DW 6655H ; var = 6655H CS:IP FF 1005
FF 1006
ends
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Indirect Addressing (Array Sum Example)
The advantage of the indirect addressing is that one can change the
address in BX, for example to access the next cell in an array
Indirect addressing is ideal for accessing an array
data segment
array DD 10000h,20000h,30000h ; array declaration with 3 double word
Ends
code segment
MOV SI,OFFSET array ; SI = array address
MOV EAX,[SI] ; AX = [array] = 10000h
ADD SI,4 ; why 4?
ADD EAX,[SI] ; AX = AX + [array+4]
ADD SI,4 ; why 4?
ADD EAX,[SI] ; AX = AX + [array+8]
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Indirect Addressing (Ambiguous Indirect Operands)
Consider the following instructions:
MOV [BX], 100
ADD [SI], 20
INC [DI]
The size of the memory operand is not clear to the assembler
BX, SI, and DI can be pointers to BYTE or WORD
Solution: use PTR operator to clarify the operand size
MOV BYTE PTR [BX], 100 ; BYTE operand in memory
ADD WORD PTR [SI], 20 ; WORD operand in memory
INC WORD PTR [DI] ; WORD operand in memory
Important note :
Indirect addressing is divided in to three categories (addressing
modes) according to the offset register used.
1. based addressing (base reg)
2. indexed addressing (index reg + value to form physical address
instead of base reg )
3. based indexed addressing (base +index regs)
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Base Addressing
5. Based addressing
The offset is in one of the two base registers BX or BP.
We can add a displacement to the contents of base register to get the offset
address
INST R, [SR: BX/BP ± disp]
INST [SR: BX/BP ± disp], R
Address = Base register + Constant Offset
Examples
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Base Addressing
Useful to access fields of a structure or an object
Base Register points to the base address of the structure
disp relative offset within the structure
mystruct is a structure
consisting of 3 fields:
Example a word, a double word,
and a byte
data segment
mystruct DW 12 ; struct declaration
DD 1985
DB 'M'
ends
code segment
MOV BX,OFFSET mystruct ; as pointer to structure adresses
MOV AX, [BX+2] ; AX = 1985
MOV AL, [BX+6] ; AL = 'M'
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Indexed Addressing
6. Indexed Addressing
like based addressing, except that the offset is contained in an index
register; SI or DI, associated to the default data segment
INST [SR: SI/DI ± disp], R
INST R, [SR: SI/DI ± disp]
Address = Index register + Constant Offset
Examples
MOV AX, [SI] ; Load AX by the contents of memory address DS:SI
MOV AX, [SI+500] ; Load AX with from memory address DS: SI+500
MOV AX, [DI-8] ; Load AX with from memory address DS: DI-8
MOV AX, [ES: SI+4] ; Load AX with the memory address ES: SI+ 4
MOV [DI], BX
; load the memory cells at offset DI and DI +1 with the contents of the BX register
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Indexed Addressing
One can apply indexed addressing to arrays
Combines a variable's name with an index register
Assembler converts variable's name into a constant offset
Constant offset is added to index register to form a physical address
Syntax: [name + index] or name [index]
Example
offset
data segment Array[0] 00 1000
array DW 1000h,2000h,3000h 10 1001
Ends Array[2] 00 1002
code segment 20 1003
MOV SI, 0 ; SI = array index Array[4] 00 1004
MOV AX, array[SI] ; AX = array[0] = 10000h 30 1005
15 1006
ADD SI, 2
E8 1007
ADD AX, array[SI] ; AX = AX + array[2]
1B 1008
ADD SI, 2
ADD AX,[array+SI] ; AX = AX + array[4]
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Indexed Addressing
Example
offset
table[0] 00
34 1000
MOV SI, 0 10
12 1001
MOV WORD PTR table[SI], 1234H table[2] 00
78 1002
20
56 1003
ADD SI, 2
00 1004
MOV WORD PTR table[SI], 5678H 30 1005
15 1006
E8 1007
1B 1008
In this example, the offset table represents the first array element and the
SI register acts as an array index
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Base + Index Addressing
7. Base plus Index Addressing
The physical address is the sum of two registers
One of the index registers (SI,DI) plus one of the base registers (BX,BP)
A displacement can be used with this mode
INST [SR: SI/DI + BX/BP ± disp], R
INST R, [SR: SI/DI + BX/BP ± disp]
Address = Index register + Base register ± Constant Offset
Examples
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Base + Index Addressing
Addressing Arrays
This mode can be used to address two dimensional arrays
Two dimensional array usually stores records
For example, accessing 3 × 3 byte matrix.
A displacement is used to select a matrix start address
A base register can be used to store row address
An index register is used to store column address
We will store the matrix row by row in the memory as follows:
28 3 41 offset
M1 = 2 9 70 M1[0,0] 28 1000
36 71 6 M1[0,1] 3 1001
M1[0,2] 41 1002
Data Segment M1[1,0] 2 1003
M1 DB 28,3,41,2,9,70,36,71,6 M1[1,1] 9 1004
M1[1,2] 70 1005
ROW DW ?
M1[2,0] 36 1006
COL DW ? M1[2,1] 71 1007
ENDS M1[2,2] 6 1008
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Base + Index Addressing
Addressing Arrays
How to calculate the offset address of an element in a matrix ? 𝑀1(1,2)
M1 is the starting address of the matrix
Add 3*row to get row starting address
𝟏𝟎𝟎𝟎
Add col to get cell address M1
𝑹𝒐𝒘 𝑶𝒇𝒇𝒔𝒆𝒕 3×1=𝟑
𝟑 × 𝑹𝒐𝒘 + offset
28 1000
𝟏𝟎𝟎𝟑
𝑜𝑓𝑓𝑠𝑒t = 𝑀1𝑎𝑑𝑑𝑟𝑒𝑠𝑠 + 3 × 𝑟𝑜𝑤 + 𝑐𝑜𝑙 3 1001
41 1002
𝑓𝑜𝑟 𝑟𝑜𝑤 = 1; 𝑐𝑜𝑙 = 2 𝑪𝒐𝒍 𝑶𝒇𝒇𝒔𝒆𝒕 𝟐
+
= 𝑪𝒐l
36 1006
71 1007
6 1008
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Base + Index Addressing
Matrix Code Example
Data Segment
M1 DB 28,3,41,2,9,70,36,71,6
ROW DW ?
COL DW ?
ENDS
Code Segment
MOV AX,data
MOV DS,AX
MOV ROW,1
MOV COL,2
MOV AX,3
MUL ROW
MOV BX,AX
MOV SI,COL
MOV DL,M1(BX+SI)
ENDS
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Summary Addressing mode 16-bit Memory Addressing
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