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Vlsi technology

This document is an examination paper for the M. Tech I Semester in VLSI Technology at Jawaharlal Nehru Technological University Hyderabad. It consists of two parts: Part A with compulsory questions worth 25 marks, and Part B with five units where students must answer one question from each unit, totaling 50 marks. Topics include MOS technology, BiCMOS technology, scaling, semiconductor material preparation, and layout design rules.

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8 views

Vlsi technology

This document is an examination paper for the M. Tech I Semester in VLSI Technology at Jawaharlal Nehru Technological University Hyderabad. It consists of two parts: Part A with compulsory questions worth 25 marks, and Part B with five units where students must answer one question from each unit, totaling 50 marks. Topics include MOS technology, BiCMOS technology, scaling, semiconductor material preparation, and layout design rules.

Uploaded by

Shiva Glenn
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No: 5457AD R17

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD


JN
M. Tech I Semester Examinations, June/July - 2019
VLSI TECHNOLOGY
(VLSI System Design)
Time: 3hrs Max.Marks:75
TU
Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B
consists of 5 Units. Answer any one full question from each unit. Each question carries
H
10 marks and may have a, b, c as sub questions.
U
PART - A
5 × 5 Marks = 25
SE
1.a) Describe MOS technology. [5]
b) Explain transistor structures with relavent diagram. [5]
c) What is thermal nitridation? Explain in detail. [5]
D
d) What are dopant sources? [5]
e) Explain design of capacitors in BiCMOS technology. [5]
25
PART – B
5 × 10 Marks = 50
-0
2.a) Describe BiCMOS technology.
b) Give MOS transistor circuit model. [5+5]
6-
OR
3.a) Explain threshold voltage VT, Gm, Gds and w0
b) Describe MOS inverters with relavent diagrams. [5+5]
20
4.a) What are wires and vias? Explain.
b) Explain switch logic with examples. [5+5]
OR
1
5.a) What is scaling? What is the need of it?
9A
b) Explain scalable design rules. [4+6]

6.a) Explain the operation of Float zone crystal growing technique. Contrast CZ and float zone
crystal growing techniques.
M
b) Explain semiconductor material preparation. [6+4]
OR
7.a) Describe silicon dioxide layer uses.
b) What is the procedure to grow the MOS gate oxide? If a silicon wafer with specifications:
N – type, (100), 8 – 10 Ω is oxidised at 1100 0C for 800 A0 and 100 A0 thick gate oxidation.
Calculate the oxidation time. [5+5]
8.a) Explain formation of a doped region and junction by diffusion.
b) Explain drive – in oxidation. [5+5]
JN
OR
9.a) Explain CVD process in step wise.
b) Describe low pressure CVD systems. [5+5]
TU
10.a) Give NMOS layout design rules.
b) Give CMOS layout design rules. [5+5]
OR
11. a) Explain design of resistors in BiCMOS technology.
H
b) What are package functions? Discuss. [4+6]
U
---ooOoo---
SE
D
25
-0
6-
20
19A
M

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