temperature ranges are considered.

It can severely affect the stability of a system

at high temperature if not considered properly.
BJT configurations
There are three main types of Bipolar Junction Transistor (BJT) configurations,
each with different characteristics and applications:
1. Common Base (CB) Configuration
2. Common Collector (CC) Configuration (also known as an Emitter Follower)
3. Common Emitter (CE) Configuration
COMMON-BASE CONFIGURATION:

Fig.5: Notation and symbols used with the common-base configuration: (a) pnp
transistor; (b) npn transistor
The common-base terminology is derived from the fact that the base is common to
both the input and output sides of the configuration. In addition, the base is usually
the terminal closest to, or at, ground potential.
In the common base (CB) configuration of a BJT, (alpha) represents the current
gain. It is defined as the ratio of the collector current (IC) to the emitter current
(IE)

For a typical BJT:

 α is close to 1, typically ranging from 0.95 to 0.99.
  Since IC is slightly less than IE due to the small base current (IB), α will always
be less than 1.

In the common base (CB) configuration of a BJT, the total collector current IC
is the sum of two components:

1. The main current component, which is due to the emitter current IE

multiplied by the current gain α.

2. The small leakage current component, which is the collector-base leakage

current ICBO.

The expression for the total collector current IC in a CB configuration is:

IC=αIE+ICBO

ICBO refers to the collector-base leakage current when the emitter is open
(disconnected). It stands for the Collector-Base reverse saturation current with
the Emitter Open and is denoted as ICBO. This current is primarily due to minority
carrier.
Features of CB configuration:
 Provides high voltage gain and low input impedance.

 No phase shift between input and output.

 Has a low current gain (less than 1).

Applications:
Used in applications requiring high frequency operation, such as RF amplifiers.
COMMON COLLECTOR (CC) CONFIGURATION:
The collector terminal is common to both input and output circuits. Common
Collector (CC) configuration is also known as an emitter follower.
 Fig.6: Notation and symbols used with the common-collector
configuration: (a) pnp transistor; (b) npn transistor.
In a Common Collector (CC) configuration, the current gain is denoted by γ. The
current gain, γ is defined as the ratio of the output current (emitter current, IE) to
the input current (base current, IB):
γ=IE/IB
Features of CC configuration:
1. Provides high current gain and low output impedance.
2. Does not invert the input signal (no phase shift).
3. Voltage gain is slightly less than 1.
Applications:
Often used as a buffer to match high-impedance sources to low-impedance
loads.
COMMON EMITTER (CE) CONFIGURATION:
The most frequently encountered transistor configuration appears in Fig. 7 for
the pnp and npn transistors is called the common-emitter configuration since the
emitter is common or reference to both the input and output terminals (in this
case common to both the base and collector terminals).
 Fig. 7: Notation and symbols used with the common-emitter
configuration: (a) npn transistor; (b) pnp transistor.
The emitter, collector, and base currents are shown in their actual conventional
current direction. Even though the transistor configuration has changed, the current
relations developed earlier for the common-base configuration are still applicable.
That is,
IE =IC+ IB & IC= αIE
In the common emitter (CE) configuration of a BJT, β (beta) represents the current
gain of the transistor. It is defined as the ratio of the collector current IC to the
base current IB:

In CE configuration the total collector, current IC also has the two components:
1. The main current component, β IB
2. The small leakage current that flows between the collector and emitter with
no input at the base ICEO
IC= β IB +ICEO ….equation. A

Relation to α, β and γ :
As we know;
IC= αIE for CB
IC= β IB for CE
IE= γ IB for CC
IE =IC+ IB
Relation between α and β:
IB =IE - IC
now substitute IC= αIE in above Eq.
IB =IE - αIE=(1-α) IE
Now, substitute this expression for IB into the definition of β

Alternatively, we can rearrange this to express α in terms of β

Multiply by α and γ α . γ = (IC/ IE). (IE/ IB) = IC/ IB

α.γ =β
Relation between β & γ and α & γ :
γ= IE/ IB=( IB+ IC)/ IB=1+( IC /IB)
γ =1+ β
put value of β
γ=1/(1- α)
Relation between ICBO and ICEO
Considering CB configuration
The expression for the total collector current IC in a CB configuration is:
IC=αIE+ICBO
IC=α (IB +IC) +ICBO
IC (1- α)=α IB +ICBO
IC= {α/ (1- α)} IB +ICBO /(1- α)
IC= β IB +ICBO /(1- α) ….equation. B
From equation A and equation B
ICEO = ICBO / (1- α)
Putting value of α
ICEO = (1+β) ICBO

CE CHARACTERISTICS
In a common emitter (CE) configuration of a Bipolar Junction Transistor (BJT),
the characteristics are typically analysed in terms of two main sets of curves:
1. Input Characteristics

The input characteristics represent the relationship between the base current IB and
the base-emitter voltage VBE for different values of collector-emitter voltage VCE.

o These characteristics resemble a forward-biased diode curve because

the base-emitter junction is forward biased.
o As VBE increases, IB increases exponentially after a certain threshold
(typically around 0.7V for silicon BJTs).
o The input characteristics are relatively independent of VCE, as small
changes in VCE do not significantly impact IB.

Fig. 8: Input characteristic

2. Output Characteristics

The output characteristics show the relationship between the collector current IC
and the collector-emitter voltage VCE for different values of base current IB.
 Fig. 9: Output characteristic

The output characteristics are divided into three main regions:

Cutoff Region:
 In this region, both the base-emitter and base-collector junctions are reverse
biased.
 IB is approximately zero, so IC is also near zero (very small leakage current
might exist, ICEO).
Active Region:
 In the active region, the transistor operates as an amplifier.
 Here, IC is primarily controlled by IB and is nearly independent of VCE.
 IC≈βIB, where β is the current gain of the transistor.
 This region is flat, indicating that IC remains relatively constant with
changes in VCE.
 Saturation Region:
 In the saturation region, both the base-emitter and base-collector junctions
are forward biased.
 IC no longer depends on IB in a linear manner, and the transistor is fully
“on.”
  VCE drops to a very low value (typically between 0.1V and 0.3V), and the
transistor cannot increase IC further with an increase in IB.

TRANSISTOR BIASING:
The basic purpose of biasing is to keep the emitter-base junction (EB Jn) properly
forward biased, collector-base (CB Jn) reverse biased during the application of
input signal.
Biasing is the process of applying external voltages to a transistor’s terminals to
establish a stable operating point (Q-point).
Need for biasing to ensures that the transistor
1. Operates in the desired region (active, cutoff, or saturation) for consistent
performance,
2. Preventing distortion in amplifiers
3. Maintaining stability across temperature and supply variations.
DC Load Line and Q-Point
The load line is a graphical representation of the relationship between IC and VCE
based on the external circuit’s resistive load.
Considering CE configuration
Apply KVL to collector circuit
VCC-ICRC-VCE=0
VCE=VCC-ICRC
Above equation is first-degree eq. and can be represented by a straight line
on the output characteristic. This straight line is called DC Load Line.
When IC =0 VCE=VCC (Point B)
When VCE=0, IC=VCC/RC (Point A)
Joining point A and B we obtained DC Load Line(Fig. 10)

IC

IB
NPN VCE RC O/P
No signal

RB
IE

VEE VCC

Fig. 10: CE configuration and DC load Line

Q-point: The point obtained on DC Load Line by the value of VCE and IC (when
no signal is applied) is known as operating point. This point is also called quiescent
point, stable point or simply Q-point.

Fig. 11: Q-Point (Operating point)

The Q-point is located where the load line intersects the transistor’s
characteristic curve, helping determine optimal operating conditions.
If no bias were used, the device would initially be completely off, resulting
in a Q-point at O-namely, zero current through the device (and zero voltage across
it).
Methods of Transistor Biasing
1. Fixed-bias circuit (Base Resistor Bias)
2. Emitter-stabilized bias circuit
3. Voltage-Divider bias
4. DC bias with voltage feedback
VOLTAGE DIVIDER BIAS: (npn)
This is the most widely used method providing biasing and stabilization to a
transistor.
The resistance R1 and R2 acts as a potential divider giving a fixed voltage at point
B, which is base terminal. The name voltage divider comes from the voltage
division formed by R1 and R2. The voltage drop across R2 forward biases the base-
emitter junction.
Circuit analysis:
 Let us consider the base circuit as shown in fig. 12
× 2 1× 2
= and = 1 2 =
1+ 2 1+ 2
 +VCC
+VCC

R1 RC RC
IC IC
IB Equivalent
RB(Rth)
B NPN
Circuit
R2 IE VB(Vth)
IE

RE RE

Fig. 12: Voltage divider biasing circuit

Now apply KVL at base loop;
VB-IBRB-VBE-IERE=0
VB-IBRB-VBE-(IB+IC)RE=0
VB-IBRB-VBE-(IB+βIB)RE=0
−
=
+ (1 + )
=
 Let us consider the collector circuit as shown in fig. 12
Apply KVL at collector loop
VCC-ICRC-VCE-IERE=0
VCE =VCC-ICRC -IERE

Numerical
Q1. Determine the dc bias voltage VCE and
the current IC for the voltage divider
configuration of Fig. Q1.
(Ans: IC= 0.84 mA, VCE= 12.34 V)

Fig Q1
Bias stabilization:
The process of making operating point (Q-Point) stable i.e, to make it independent of
temperature changes or variation in transistor parameters is known as biase
stabilization.
Need for stabilization:
Stabilization of the operating point is necessary due to the following reasons;
i) Temperature dependence of IC
ii) Individual variation
iii) Thermal runway
 In CE configuration, collector current (IC) increase with temperature due to the
temperature dependence of the saturation current (ICEO). ICEO is approximately
doubles for every 10°C rise in temperature.
 The increase in IC causes heat generation because of higher power dissipation
as P=VCE⋅IC.
 The heat generated raises the junction temperature, which increases ICEO , I , and
ultimately P causing a thermal runaway cycle. This may burn the transistor.

IC = βIB+ ICEO

Temperature

Stability Factor:
The rate of change of collector current IC with respect to collector leakage current ICO
at constant β and IB is called stability factor. (Ideally, the values of all stability factor
should be zero)
∆
Stability factor S= at constant β and IB.
∆