Comparison of I2C, SPI, and Watchdog Timer

Introduction

▶ I2C, SPI, and Watchdog Timer are fundamental components

in embedded systems.
▶ Each serves a specific purpose: communication (I2C/SPI) and
system reliability (WDT).
I2C Overview
▶ Uses two wires: SDA (data), SCL (clock)
▶ Supports multiple masters and slaves
▶ Each device has a unique address
▶ Speeds: 100 kbps (Standard), up to 3.4 Mbps (High-speed)
▶ Ideal for short-distance, low-speed applications
▶ I2C operates in 2 modes
▶ Master mode
▶ Slave mode
▶ Each data bit transferred on SDA line is synchronized by a
high to the low pulse of each clock on the SCL line.
The data is transmitted in the form of packets which comprises 9
bits. The sequence of these bits are –
▶ Start Condition: 1 bit
▶ Slave Address: 8 bit
▶ Acknowledge: 1 bit
Steps of I2C Data Transmission
▶ Start Condition: The master device sends a start condition by
pulling the SDA line low while the SCL line is high. This
signals that a transmission is about to begin.
▶ Addressing the Slave: The master sends the 7-bit address of
the slave device it wants to communicate with, followed by a
read/write bit. The read/write bit indicates whether it wants
to read from or write to the slave.
▶ Acknowledge Bit (ACK): The addressed slave device responds
by pulling the SDA line low during the next clock pulse (SCL).
This confirms that the slave is ready to communicate.
▶ Data Transmission: The master or slave (depending on the
read/write operation) sends data in 8-bit chunks. After each
byte, an ACK is sent to confirm that the data has been
received successfully.
▶ Stop Condition: When the transmission is complete, the
master sends a stop condition by releasing the SDA line to
high while the SCL line is high. This signals that the
communication session has ended.
Start and Stop Conditions :
▶ START and STOP can be generated by keeping the SCL line
high and changing the level of SDA
▶ To generate START condition the SDA is changed from high
to low while keeping the SCL high
▶ To generate STOP condition SDA goes from low to high
while keeping the SCL high
Advantages of I2C Communication Protocol

▶ Can be configured in multi-master mode.

▶ Complexity is reduced because it uses only 2 bi-directional
lines (unlike SPI Communication).
▶ Cost-efficient.
▶ It uses ACK/NACK feature due to which it has improved error
handling capabilities.
▶ Fewer Wires: Only two wires are needed, making it easier to
set up.
▶ Multiple Devices: You can connect many devices to the same
bus.
▶ Simple Communication: It’s relatively easy to program and
use.
Disadvantages of I2C Communication Protocol

▶ Speed Limitations: I2C is slower compared to some other

protocols like SPI.
▶ Distance: It’s not suitable for long-distance communication.
▶ Half-duplex communication is used in the I2C communication
protocol.
SPI Overview

A Serial Peripheral Interface (SPI) facilitates short-distance

communication between peripheral integrated circuits and
microcontrollers.
▶ Uses four wires: MOSI, MISO, SCLK, SS (one per slave)
▶ Full-duplex communication
▶ Typically one master with multiple slaves
▶ Speeds: Up to 10+ Mbps
▶ Suitable for high-speed data transfers
Components of SPI
▶ Master Device: The master device is nothing but it controls
the process of transformation of data on the SPI bus. It
controls the data flow and it generates the clock signal. In
most of the applications, the master device is the
microcontroller or specialized SPI controller.
▶ Slave Device: Slave devices are peripheral devices that are
connected to the SPI bus and controlled by master devices.
Every slave device has a different slave select (SS) line,
allowing the master to select which device it wants to
communicate with.
▶ SPI Bus: SPI bus is a physical connection over the data
transferring between the slave devices and the master. It
contains four signal lines as below.
▶ Slave Select (SS): In Slave Select, each slave device contains a
dedicated SS pin. If the master will communicate with the
specific slave. Multiple slave devices can be shared with the as
same as MOSI, MISO, and SCK lines but it must have
separated SS lines.
▶ Master Out Slave In (MOSI): In Master Out Slave In, MOSI
can share the data or information from the master to other
slave devices.
▶ Master In Slave Out (MISO): In Master In Slave Out, MISO
can share the data or information from the slave device with
the master. Serial Clock (SCK): In Serial Clock, this clock
signal is used by the master and the slave devices for
coordinating the data transfer timings.
▶ Data Transfer Protocol: SPI is used as a synchronous serial
communication for simple transferring of data. The data is
transferred and received at the same time in full duplex mode.
By generating the clock pulses, the master-slave will initialize
the transfer of the data. In every clock cycle, one bit of data
will be transmitted both from master to slave and from slave
to master directions.
▶ Data Rate: The SPI bus can support the different data
transferring rates depending upon the master capabilities of
the slave devices and the transmission line’s length. The data
rate is specified in bits per megahertz (MHz) or second (bps).
▶ Clock Polarity (CPOL) and Clock Phase (CPHA): These are
used to defined the relationship between the data signals and
the clock signals. The data signals are nothing but, MOSI and
MISO are called as the data signals. The SCK is called as the
clock signal. There are available in four different possible
combinations of CPHA settings and CPOL, they are allowing
flexible to configuring to the SPI interface for work with the
different devices.
Advantages of Serial Peripheral Interface (SPI)
▶ High Speed Data Transfer
▶ Simple Hardware Requirements
▶ Full-Duplex Communication
▶ Multi Slave Devices
▶ Widespread Adoption
▶ Low overhead
▶ Flexible Configurability
Comparison Table
Feature I2C SPI
Wires 2 (SDA, SCL) 4+ (MOSI, MISO, SCLK, SS)
Speed Up to 3.4 Mbps Up to 10+ Mbps
Complexity Medium Low
Full-Duplex No Yes
Device Count Many (with addresses) Few (limited by SS pins)
Use Cases Sensors, EEPROMs Displays, SD Cards
I2C and SPI Configurations
Watchdog Timer Overview

▶ A hardware timer that resets the system if the software

becomes unresponsive.
▶ Continuously counts down and resets the system if not
regularly reset (”kicked”) by software.
▶ Helps recover from crashes, infinite loops, or unresponsive
states.
Why Use a Watchdog Timer?
▶ Ensures system reliability and automatic recovery.
▶ Especially important in unattended, critical, or long-running
systems.
▶ Common in embedded systems like industrial controllers,
medical devices, and IoT.
Watchdog Timer Operation

▶ The computer regularly restarts the watchdog timer to

prevent it from elapsing, or timing out.
▶ If, due to a hardware fault or program error, the computer
fails to restart the watchdog, the timer will elapse and
generate a timeout signal.
▶ The timeout signal is used to initiate corrective actions. The
corrective actions typically include placing the computer and
associated hardware in a safe state and invoking a computer
reboot.
Pros and Cons of Watchdog Time
Pros:
▶ Improves system robustness
▶ Simple and lightweight
▶ Automatically handles system hangs
Cons:
▶ Requires careful configuration
▶ May reset during slow operations if not handled properly
Uses:
▶ In robots and other automated machines, a fault in the control
computer could cause equipment damage or injuries before a
human could react, even if the computer is easily accessed.
Conclusion

▶ I2C and SPI are essential for connecting microcontrollers with

peripherals.
▶ Watchdog Timers help ensure system stability by detecting
and recovering from software faults.
▶ Understanding and properly using these tools leads to more
robust and efficient embedded designs.