Unit 3

Analog and Digital IOs

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 Unit 3: Syllabus
Analog and Digital IOs:
ARM Cortex M4 MCUs, Memory organization, Reset & Clock Control, GPIO,
Programming: interfacing LEDs and Push buttons, Analog to digital converters
(ADC), Successive Approximation ADC, Programming and interfacing an analog
sensor, Digital to Analog Converter (DAC), Programming

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ARM Cortex- M4 MCUs
Leading Manufactures
 STMicroelectronics (ST):  Infineon Technology Pvt. Ltd:
-STM32F4 series -XMC4000 series
 NXP Semiconductors:  Silicon Labs:
-LPC4300 series, Kinetis K series -EFM32 Giant Gecko series 1
 Texas Instruments (TI):  Toshiba:
-Tiva C Series -TX04 series
 Renesas:  Microchip Technology:
-RA4, RA6 Series. - SAM4 series
 Nuvoton Technology:  Analog Devices:
-M463,M467,M471….series -MAX series
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Memory Organization
 The Cortex-M processors have 32-bit memory
addressing and therefore have 4GB memory space.
 The memory space is unified, which means
instructions and data share the same address space.
 Multiple bus interfaces to allow concurrent
instructions and data accesses
 The memory map of cortex M4 CPUs is shown in
figure.
Note: A memory map is a diagram or
representation that illustrates the organization of a
computer system's memory.
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 Memory Organization…
 As shown in the figure, the flash program memory on the
microcontroller chip is mapped code region.
 The data memory is mapped to locations shown as SRAM in figure.
 The registers of different peripherals available in the microcontroller are
mapped to peripheral region.
 External memory interface like SD card/SRAM/NAND Flash is mapped
region external SRAM and external device.
 Private peripheral bus indicate the region of locations used for NVIC
registers, FPU registers, Systick Timer registers, Trace and debug
registers, etc.
 Vendor specific memory implementation varies with different vendors.

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Memory Map of STM32F407VG
Microcontroller support:
 Up to 1 MB of Flash memory(Program memory)
 Up to 192 KB of SRAM(Data memory) including 64 KB of
CCM (core coupled memory) data RAM
 512 bytes of OTP(one time programmable) memory
 Flexible Static Memory Controller(FSMC) supporting
Compact Flash(similar to SD card), SRAM, PSRAM, NOR
and NAND memories.
Note: PSRAM(Pseudo Static RAM) is
DRAM(Dynamic RAM) combined
with a self-refresh circuit.
NAND and NOR are type of FLASH memories
CCM & OTP Memory is part of code region.
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 Memory Map of STM32F407VG….
Core Coupled Memory
 A special memory that provide high performance and Zero wait state
access (faster access) to memory and hence accessing is faster as
compared to execution from flash program memory.
 It is was included in the microcontrollers for use in scenarios that
involve real-time and computation-intensive routines like real-time DSP
(digital signal processing).
Flexible Static Memory Controller
 This provides external memory support through controllers. Using
registers of FSMC, configuration of external memory chips can be
carried out.
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 Reset and Clock Controller(RCC) 100 LQFP pin diagram
 Discovery board used in lab is a 100 pin Low
Profile Quad Flat Package(LQFP)
STM32F407VGT6 IC.
Reset
 When MCU is reset, all registers are set to their
reset state and Reset_Handler get executed.
 The RESET service routine vector is fixed at
address 0x0000 0004 in the memory map.
 The Reset sources are low signal on NRST pin,
Independent Watch Dog Reset(IDWG),
Power on Reset, Brown out Reset
Note: Other resets STM32F407VG are not
considered.
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 Activity

Exploration of Reset Handler in assembly program and C

program

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 NRST pin must be held low to initiate the reset RCC….
operation.
 Power on Reset/Manual Reset: The reset can be
is initiated when power supply is applied/ A push
button is provided to initiate manual reset operation.
 Schematics is shown in figure below.

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Independent Watch Dog Reset(IDWG) RCC….
 A watchdog reset typically refers to the action taken by a watchdog Basic timer

timer when it detects that a system or device has failed or become Clk 16-bit 16 Cnt
unresponsive. Down
 If errors are transient(non recurring), a reset operation can be used to counter Down
recover. Reset
 The CPU has to send reset signal to watchdog timer periodically, Timer is a counter running at
otherwise watchdog timer generate reset signal. certain clock frequency.
If Clk=1 MHz, time to generate
 Operation of WDT reset is shown in figure below: Down signal is 65536 µs.

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 RCC….
Brown out Reset
 This is a protection circuit inside MCU which detects when supply
voltage(VDD) goes below certain level and puts the device into a
reset state to ensure proper startup when power returns.
 The MCU behavior is unpredictable(not reliable) when supply
voltage falls below certain threshold.
 Brownout detection circuit hold the MCU is reset set as long as
supply voltage is below certain threshold.

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 RCC….
Simplified block diagram of Reset Circuits
Schmitt Trigger voltage
follower

Note: The pulse generator guarantees a minimum reset pulse duration of 20 μs for each internal
reset source. In case of an external reset, the reset pulse is generated while the NRST pin is
asserted low.
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Clocks RCC…
 Three different clock sources can be used to drive the system clock
(SYSCLK):
-HSI(High Speed Internal) oscillator clock: 16 MHz Internal RC Oscillator
-HSE(High Speed External) oscillator clock:4-26 MHz External LC oscillator
-Main PLL (Phase Locked Loop) clock: This system act as frequency multiplier or
divider to generate different clock sources.
 Two secondary clock sources are provided:
- 32 kHz low-speed internal RC (LSI RC) which drives the independent
watchdog and RTC clock.
- 32.768 kHz low-speed external crystal (LSE crystal) which optionally drives
the RTC clock.
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 RCC…

Clock Sources
on board used
in lab
(STM32CubeMx
Clock configuration
Wizard)

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 RCC…
System clock driving
other sources
(STM32CubeMx
Clock configuration Wizard)

Note: Clock sources to different units

GPIOs: HCLK, Core: FCLK, DAC:APB1 Peripheral clock,
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ADC:APB2 peripheral clock
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 Important point to remember !
All configurations in STM32CubeMx
writes configuration data into
registers.
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General Purpose IOs(GPIOs)
 Most of the pins of the STM32 can be configured as input or output and may be
connected to either the GPIO ports or “alternative functions”.
 As a standard naming convention, the pins are called by their GPIO function.
Example: PA0 (bit 0 of port A) or PB9 (bit 9 of port B).
 Maximum 16 pins in each port. Number of ports varies depending in packaging
type.
Example: 176 pin LQFP: Port A to Port I
100 pin LQFP: Port A to Port E

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 GPIOs…

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 GPIOs…
Basic Structure IOs
• The figure shows basic
structure of IO pin.
• The each pin has input
driver and output driver.
• These drivers used to
configure the pin as per
requirement.
• The alternate input and
output functions varies
with port to port.

Observe the usage of registers BSRR,ODR and IDR

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Input Operation GPIOs…
When the I/O port is programmed as Input:
 The output buffer is disabled and Schmitt trigger input is activated.
 The pull-up and pull-down resistors are activated or not, depending on the value in the
GPIOx_PUPDR(GPIO port pull-up/pull-down) register.
 The data present on the I/O pin are sampled into the input data register every AHB1
clock cycle.
• The pin can be floating
if pull up and pull down
are disabled.

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 Input Operation…
STM32CubeMx Configurations for input port: What is the configuration of port
pin for Push Button connection?

Autogenerated Configurations for input port:

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Output Operation GPIOs…
When the I/O port is programmed as output:
 The output buffer is enabled.
 The port pin can be configured Push pull or Open drain with pull ups enabled or
disabled.
Push Pull: Open drain:

Internal or
external pull
up is required
when pin state
is Hi-Z

When,
NMOS is on, pin state=0
Pin state=1 Pin state=0 NMOS is off, pin is floating(Hi-Z state)
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MGR,ECE,RVCE *Hi-Z is high impedance state
STM32CubeMx Configurations for output port pin PD15: Output Operation…

What is the configuration for LED

connection?

Can we select output open drain to

connect LED?
What is the advantage of external pull
up?

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 Output Operation…

Autogenerated Configurations for output port:

 Speed Configurations for output port(Varies from device to device):

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 GPIOs…
Registers for Operation
 GPIO port mode register (GPIOx_MODER) : x=A to E in LQFP 100
 This register is used to select functionality of each pin of a port.

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 Registers for Operation…

• GPIO port input data register (GPIOx_IDR)

• This register is used to read status of each pin of a port

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 Registers for Operation…
GPIO port bit set/reset register (GPIOx_BSRR)

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 RCC Registers to enable clock for GPIOs
RCC AHB1 peripheral clock enable register (RCC_AHB1ENR)

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Port Programming
 Design STM32F407VG based to connect push button and LED. Write program to read
Push button status and toggle LED.

Interfacing diagram:

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 Port Programming….
Program(register programming)
#include “stm32f407xx.h” /*Header file with register declarations*/
void delayMs(int n);
void main(){
RCC->AHB1ENR |= 9; /* enable Clock to GPIOA & GPIOD */
GPIOD->MODER |= 0x40000000; /*Set PD15 as GPIO output */
/*PA0 act as input by default*/
While(1){
if(GPIOA->IDR & 0x0000 0001==1)
GPIOD->BSRR=1<<15; /*set bit 15 to make PD15 to 1*/
else
GPIOD->BSRR=1<<31; /*set bit 31 to make PD15 to 1*/
}
}
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Program(using STM32CubeMx): Port Programming….
 Assume that, STM32CubeMx is used and PA0 is configured as GPIO_Input(No
Pullup/Pull down) and PD15 as GPIO_Output(Output push pull and No
Pullup/Pull down) and HAL is generated.
Application code:

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 Question 1
The diagram below shows an interface that provide two digit seven segment display
driven by the outputs of two cascaded serial-in-parallel-out shift registers. Data to be
displayed is transmitted serially (first segment H).Each bit is clocked into the shift
registers by providing common clock. Data in first shift register appears at second after
eight clock pulses. Provide a push button to start the counting operation.
Vcc

Data CLK
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 Question 1…

 The seven segment type is common anode type. The display codes are obtained as
follows.
Segment values to display 3
Segment A B C D E F G H
Bit 7 6 5 4 3 2 1 0
Input 0 0 0 0 1 1 0 1
Hex Code 0 D

 Seven segment display codes: 03H,9FH,25H,0DH,99H,49H,41H,1FH,01H,09H,

Design STM32F407VG system interface seven segment display & realize two digit BCD
counter.

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Question 2
 The diagram below shows an interface card with eight DIP switches with status indicating
LEDs D1 & D8. The card also features 8 LEDs (D9-D16) controlled by external devices.
Design a suitable scheme to interface card to STM32F407VG.Write a program to read the
status of switches & display the same on LEDs D9-D16.

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Question 3
 In the diagram shown below, the seven LEDs are mounted to emulate the dots on real dice.
The pattern displayed for different numbers is shown. As in real dice, first row can have up
to two LEDs on (Corresponding to two dots on a dice), second row have up to three LEDs
on and third row have up to two LEDs on.

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 Question 3…

A random dice number is obtained by scanning push button switch as follows. If the switch is
not pressed, the number is incremented between 1 and 6.When ever the push button is
pressed, the current value of the number is read and this value is used as new dice number.
The new number is displayed on LED for 2 seconds.
Design STM32F407VG system with above specifications and write C program to emulate
dice operations.

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Analog to Digital Converter (ADC)
 ADC is an electronic component or
circuit that converts analog signals
into digital representations.
 Analog signals are continuous voltage
or current variations that represent
real-world phenomena like sound,
temperature, light, pressure, and
more.
 Some time measured signals are noisy
and hence to be corrected using signal
conditioning circuits.
E.g: High pass filter to remove high
frequency noise
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 ADC…
 An ADC has n-bit resolution where n is 8, 10, 12, 16 or even 24 bits. The higher
resolution, ADC provides smaller step size, where step size is the smallest change
in input analog voltage, an ADC can detect.
 If the full scale input voltage required to cause a digital output of all 1’s is VIFS, then
resolution (step size) can be given as,
Step size= VIFS / 2n -1
 It is observed that, there is an unavoidable uncertainty about the exact value of
input voltage for all digital output. This uncertainty is specified as quantization
error. Its value is ± ½ LSB.

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  The output(d) of ADC for an analog input voltage ‘e’ V is given as: ADC…
d= e/Resolution .
 Types of ADC: Flash Type(fastest),Successive Approximation, Delta Sigma
 The figure shows input and output proportionality 4 bit ADC.
Vmax = 7.5V 1111
7.0V 1110 4
6.5V 1101
6.0V 1100 3

analog input (V)

5.5V 1011
5.0V 1010 2
4.5V 1001
4.0V 1000
1
3.5V 0111
3.0V 0110
time
2.5V 0101 t1 t2 t3 t4
2.0V 0100
0100 1000 0110 0101
1.5V 0011
1.0V Digital output
0010
0.5V 0001
0V 0000
analog to digital
Proportionality
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Successive Approximation ADC: ADC…
 Slower than flash type ADC but faster than other types. The input voltage is successively
approximated to arrive at digital output.
 For the given an analog input signal whose voltage should range from 0(Vmin) to
15(Vmax) volts, and an 8-bit digital encoding is calculated for 5 volts as follows.
Resolution:15/255=0.058823; Digital Encoding=5/0.058823=85d=55h= 01010101

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Questions ADC…
 STM32F407VG MCU is hosting two 12 bits ADCs with analog input range 0 V to 3 V.
Calculate the resolution(step size) and quantization error.
 If ADC output is 0x100 with ADC specs as given in previous question, calculate the analog
output voltage.
 Identify different ways to increase resolution of an ADC.
 The figure below shows LMT86 Temperature sensor, corresponding IO characteristics and
minimal specs. Comment on ADC selection.

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ADC module in STM32F407VG MCU
 The 12-bit ADC is a successive
approximation ADC.
 It has up to 19 multiplexed channels allowing
it to measure signals from 16 external
sources and three internal sources(temp
sensor,VREFINT,VBAT)
 ADC module has a separate supply(VDDA),
which generally can be connected to the
general MCU power supply.
 ADC can have an external reference source
through VREF+ and VREF- that can be
 Note: VREF+ and VREF- decide dynamic range
brought through dedicated pins. In no of analog input signal(VREF- ≤VIN≤VREF+)
particular case, the analog supply voltage may
be as a reference internally.  *DR:Data register
*EOC: End of Conversion
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 ADC module in STM32F407VG MCU…
 Data Register(DR) is 12 bit hold the digital value. EOC(End of Conversion) flag is set
indicate conversion complete.
 The analog to digital conversion can be triggered by software(setting SWSTART bit in
ADC_CR2 register) or by Timer capture events after setting AD_ON bit in ADC_CR2
register.
 The timing associated with ADC module of STM32F407VG is shown below:

 tSTAB: time for ADC

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stabilization
 ADC module in STM32F407VG MCU…
Conversion time of ADC:
 The ADC clock(ADCCLK) is generated from the APB2 peripheral clock2(PCLK2)
divided by a programmable prescaler that allows the ADC to work at PCLK2 /2, /4, /6
or /8(default is 2).
 The total conversion time(for 12 bit resolution) is calculated as follows:
Tconv = Sampling time + 12 cycles
Example:
With ADCCLK = 30 MHz and sampling time = 3 cycles:
Tconv = 3 + 12 = 15 cycles = 0.5 μs with PCLK2 at 60 MHz

 Sampling time options: 3 cycles, 15 cycles, 28 cycles,56 cycles, 84 cycles, 112 cycles, 144
cycles, 480 cycles.

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STM32CubeMx Configurations for ADC 1: ADC module in STM32F407VG MCU…
HAL generated:
ADC_HandleTypeDef hadc1; //ADC handler

void MX_ADC1_Init();
HAL_StatusTypeDef
HAL_ADC_Start(ADC_HandleTypeDef* hadc);

HAL_StatusTypeDef
HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc,
uint32_t Timeout);

init16_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc}

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 ADC module in STM32F407VG MCU…

Questions
Use STM32CubeMX to configure ADC1 of STM32F407VG MCU to following
parameters:
Channel: IN1(PA1), PCLK2:60 MHz, ADCCLK:30MHz, Sampling time:3 ADCCLKs
Resolution:12 bits, Triggering: S/W controlled, Analog input range(dynamic range):0 V
to 3.3 V(DC)
Write application code in Keil IDE to use ADC to analog to digital conversion and display
equivalent digital value in debug window.

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 ADC module in STM32F407VG MCU…

Questions
Use STM32CubeMX to configure ADC1 of STM32F407VG MCU to following
parameters:
Channel: IN1(PA1), PCLK2:60 MHz, ADCCLK:30MHz, Sampling time:3
ADCCLKs
Resolution:12 bits, Triggering: S/W controlled, Analog input range(dynamic
range):0 V to 3 V(DC)
Write application code in Keil IDE to use ADC to analog to digital conversion and
generate PWM wave on GPIO pin PD9 in accordance to analog input voltage.

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Digital to Analog Converter(DAC)
 DAC converts digital data into analog signal, and is used in variety of applications.
 DACs usually generates voltage equivalent of digital input data.
 STM32F407VG has two 12 bit DACs and can used with ADC to perform signal
processing operations as shown in figure below.

 Digital inputs are converted to output voltages on a linear conversion between 0 and
VREF+.
 Two types of DAC: Weighted Resistor DAC and R-2R Ladder DAC.

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DAC module in STM32F407VG MCU DAC…
 Two DACs with separate output channels(OUT1-PA4 and OUT2-PA5).
• Each channel has separate control logic which is configured
through a single control register (CR).
• Data to be converted by channel x are written to data
holding register (DHRx). In response to a trigger event,
DHRx is transferred to the data output register (DORx)
and, after a settling time, the corresponding analog value
appears at the output.
• Trigger events can include the trigger signals from various
timers, an external interrupt, and software.
 Note: Settling time is time it takes for
• The DAC output voltage(in volts) is linear between 0 and
the DAC's output voltage to reach and
VREF + (3.3V on the discovery board) and is defined by
stay within a certain percentage of its
the following equation:
final value after a digital input code is
applied.
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STM32CubeMx Configurations for DAC:

HAL generated:
DAC_HandleTypeDef hdac;

void MX_DAC_Init(void);

HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef
*hdac, uint32_t Channel)

HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef
*hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)

Channel: DAC_CHANNEL_1, DAC_CHANNEL_2

Alignment: DAC_ALIGN_12B_R, DAC_ALIGN_12B_L

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 Questions
Use STM32CubeMX to configure ADC1 and DAC of STM32F407VG MCU.
ADC Channel: IN1(PA1), PCLK2:60 MHz, ADCCLK:30MHz, Resolution:12 bits,
Triggering: S/W controlled
DAC channel: OUT 1(PA4), tSETTLING=3 µs (Digital to analog conversion time)
Set the conversion time of ADC to match the settling time of DAC.
Input: sine signal of 2 VPP with 1V DC offset and frequency: 1 Hz to 50 KHz in steps 3 KHz

Write application code in Keil IDE to use ADC for analog to digital conversion and DAC to
reconstruct signal.

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