VLSI Technology and Design
VLSI Technology and Design
Evaluation Scheme
University Exam (Theory) (E) 70 Mid Sem Exam (Theory) (M) 30 Practical (I) 50
Sr. Course Content No 1. Introduction: Overview of VLSI design methodology, VLSI design flow, Design hierarchy, Concept of regularity, Modularity, and Locality, VLSI design style, Design quality, package technology, ,computer aided design technology. Fabrication of MOSFET : Introduction, Fabrication Process flow: Basic steps, C-MOS n-Well Process, Layout Design rules, full custom mask layout design. 3. MOS Transistor: The Metal Oxide Semiconductor (MOS) structure, The MOS System under external bias, Structure and Operation of MOS transistor, MOSFET CurrentVoltage characteristics, MOSFET scaling and small-geometry effects, MOSFET capacitances MOS Inverters: Static Characteristics: Introduction, Resistive load Inverter, Inverter with n-type MOSFET load (Enhancement and Depletion type MOSFET load), CMOS Inverter 5. MOS Inverters Switching characteristics and Interconnect Effects : Introduction, Delay-time definitions, Calculation of Delay times, Inverter design with delay constraints, Estimation of Interconnect Parasitic, Calculation of interconnect delay, Switching Power Dissipation of CMOS Inverters 6. Combinational MOS Logic Circuits: Introduction, MOS logic circuits with Depletion nMOS Loads, CMOS logic circuits, Complex logic circuits, CMOS Transmission Gates (TGs)
Total Hrs. 2
2.
4.
7.
Sequential MOS Logic Circuits : Introduction, Behaviour of Bistable elements, The SR latch circuit, Clocked latch and Flip-flop circuit, CMOS D-latch and Edge-triggered flip-flop
8.
Dynamic Logic Circuits : Introduction, Basic Principles of pass transistor circuits, Voltage Bootstrapping, Synchronous Dynamic Circuit Techniques, CMOS Dynamic Circuit Techniques, High-performance Dynamic CMOS circuits Chip I/P and O/P Circuits : On chip Clock Generation and Distribution, Latch Up and its Prevention
9.
10. Design for testability : Introduction, Fault types and models, Controllability and observability, Ad Hoc Testable design techniques, Scan based techniques, built-in Self Test (BIST) techniques, current monitoring IDDQ test 11. Introduction to Programmable Logic Devices: FPGA and CPLD
Text Book:
CMOS Digital Integrated circuits Analysis and Design by Sung Mo Kang, Yusuf Leblebici, TATA McGraw-Hill Pub. Company Ltd., Third Edition.
Reference Books:
(1) (2) (3) (4) Basic VLSI Design By Pucknell and Eshraghian, PHI,3rd ed. Introduction to VLSI Systems by Mead C and Conway, Addison Wesley Introduction to VLSI Circuits & Systems John P. Uyemura Fundamentals of Digital Logic Design with VHDL, Brown and Vranesic
For Laboratory:
1. Minimum 9 practicals Based on VHDL/Verilog 2. Minimum 3 Practicals Based on Pspice/spice of MOSFET Characteristics 3. Minimum 2 Practicals on Layout Tools VLSI design methodologies should be covered during Laboratory sessions.