Digital Electronics-Lecture1+2-Number system_Logic gates[2025]
Digital Electronics-Lecture1+2-Number system_Logic gates[2025]
Introduction
Analog Quantities
Most natural quantities that we see are analog and vary
continuously.
Temperature
(°F)
100
95
90
85
80
75
70
Time of day
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
A .M . P.M .
2
Introduction
Analog and Digital Systems
3
Introduction
Binary Digits and Logic Levels
4
Introduction
Digital Waveforms
LOW LOW
t0 t1 t0 t1
5
Introduction
Pulse Definitions
Actual pulses are not ideal but are described by the rise time,
fall time, amplitude, and other characteristics.
Overshoot
Ringing
Droop
90%
Amplitude tW
50%
Pulse width
10%
Ringing
6
Introduction
7
Introduction
Pulse Definitions
Pulse
width
Amplitude (A)
(tW)
Time
Period, T
8
Introduction
Timing Diagrams
9
Introduction
Serial and Parallel Data
1
Computer Printer
0
0
t0 t1
10
Introduction
Basic Logic Functions
11
Introduction
Basic System Functions
And, or, and not elements can be combined to form
various logic functions. A few examples are:
Two
binary A= B Outputs
numbers
B
A< B
12
Introduction
Basic System Functions
HIGH
9 Encoder
8
7
6 Binary code
5 for 9 used for
4 storage and/or
The encoding function 3 computation
2
7 8 9 1
4 5 6 0
1 2 3
0 . +/–
Calculator keypad
Binary input
7-segment display
13
Introduction
Basic System Functions
Switching Switching
sequence sequence
control input control input
14
Summary
Introduction
Basic System Functions
Counter Parallel
output lines Binary Binary Binary Binary Binary
code code code code code
1 2 3 4 5 for 1 for 2 for 3 for 4 for 5
Input pulses Sequence of binary codes that represent
the number of input pulses counted.
15
Introduction
Basic System Functions
16
Introduction
Integrated Circuits
Pins
17
Introduction
Integrated Circuits
DIP chips
In this case, testing can
be done by a computer
connected to the system.
18
Introduction
Integrated Circuits
Pin 1
19
Introduction
Integrated Circuits
SOIC PLCC
http://www.intersil.com/design/packages/
20
Introduction
Test and Measurement Instruments
The front panel controls for a general-purpose oscilloscope
can be divided into four major groups.
DISPLAY
PROBE COMP CH 1 CH 2 EXT TRIG
5V
INTENSITY
21
Introduction
Test and Measurement Instruments
The logic analyzer can display multiple channels of digital
information or show data in tabular form.
22
Introduction
Test and Measurement Instruments OFF V
Hz
electrical measurements. 10 A
A Range
Autorange
Touch/Hold
1s
1s
Voltage
40 m A COM
Fused
Resistance
Current
23
Introduction
Programmable Logic
Fixed OR
Programmable array and
AND array output logic
24
Selected Key Terms
25
Selected Key Terms
27
1. Compared to analog systems, digital systems
a. are less prone to noise
b. can represent an infinite number of values
c. can handle much higher power
d. all of the above
28
© 2008 Pearson Education
2. The number of values that can be assigned to a bit are
a. one
b. two
c. three
d. ten
29
© 2008 Pearson Education
3. The time measurement between the 50% point on the
leading edge of a pulse to the 50% point on the trailing edge
of the pulse is called the
a. rise time
b. fall time
c. period
d. pulse width
30
© 2008 Pearson Education
4. The time measurement between the 90% point on the
trailing edge of a pulse to the 10% point on the trailing edge of
the pulse is called the
a. rise time
b. fall time
c. period
d. pulse width
31
© 2008 Pearson Education
5. The reciprocal of the frequency of a clock signal is the
a. rise time
b. fall time
c. period
d. pulse width
32
© 2008 Pearson Education
6. If the period of a clock signal is 500 ps, the frequency is
a. 20 MHz
b. 200 MHz
c. 2 GHz
d. 20 GHz
33
© 2008 Pearson Education
7. AND, OR, and NOT gates can be used to form
a. storage devices
b. comparators
c. data selectors
d. all of the above
34
© 2008 Pearson Education
8. A shift register is an example of a
a. storage device
b. comparator
c. data selector
d. counter
35
© 2008 Pearson Education
9. A device that is used to switch one of several input lines to
a single output line is called a
a. comparator
b. decoder
c. counter
d. multiplexer
36
© 2008 Pearson Education
10. For most digital work, an oscilloscope should be coupled
to the signal using
a. ac coupling
b. dc coupling
c. GND coupling
d. none of the above
37
© 2008 Pearson Education
Answers:
1. a 6. c
2. b 7. d
3. d 8. a
4. b 9. d
5. c 10. b
38
Number systems, operations, and codes
Decimal Numbers
39
Number systems,
Summary
operations, and codes
Decimal Numbers
40
Number systems, operations, and codes
Binary Numbers
41
Number systems, operations, and codes
Decimal Binary
Binary Numbers Number Number
43
Number systems, operations, and codes
Binary Conversions
2 6 25 24 23 22 21 2 0.
64 32 16 8 4 2 1.
0 1 1 0 0 0 1.
44
Number systems, operations, and codes
Binary Conversions
45
Number systems, operations, and codes
Binary Conversions
46
Number systems, operations, and codes
Binary Addition
47
Number systems, operations, and codes
Binary Addition
Example Add the binary numbers 00111 and 10101 and show
the equivalent decimal addition.
Solution
0111
00111 7
10101 21
11100 = 28
48
Number systems, operations, and codes
Binary Subtraction
49
Number systems, operations, and codes
1’s Complement
0 0 1 1 0 1 0 1
50
Number systems, operations, and codes
2’s Complement
0 0 1 1 0 1 0 1
Input bits
Carry
Adder
in (add 1)
Output bits (sum)
0 0 1 1 0 1 1 0
51
Number systems, operations, and codes
Signed Binary Numbers
52
Number systems, operations, and codes
Signed Binary Numbers
Negative numbers are written as the 2’s complement of the
corresponding positive number.
The negative number −58 is written as:
−58 = 11000110 (complement form)
Sign bit Magnitude bits
An easy way to read a signed number that uses this notation is to
assign the sign bit a column weight of −128 (for an 8-bit number).
Then add the column weights for the 1’s.
Assuming that the sign bit = −128, show that 11000110 = −58
Example as a 2’s complement signed number:
Solution Column weights: −128 64 32 16 8 4 2 1.
1 1 0 0 0 1 1 0
−128 +64 +4 +2 = −58
53
Number systems, operations, and codes
Floating Point Numbers IEEE 754 binary formats
Floating point notation is capable of representing very large
or small numbers by using a form of scientific notation. A 32-
bit single precision number is illustrated.
S E (8 bits) F (23 bits)
Sign bit Biased exponent (+127) Magnitude with MSB dropped
Express the speed of light, c, in single precision floating point
Example notation. (c = 0.2998 x 109)
Solution In binary, c = 0001 0001 1101 1110 1001 0101 1100 00002.
In scientific notation, c = 1.001 1101 1110 1001 0101 1100 0000 x 228.
S = 0 because the number is positive. E = 28 + 127 = 15510 = 1001 10112.
F is the next 23 bits after the first 1 is dropped.
In floating point notation, c = 0 10011011 001 1101 1110 1001 0101 1100
55
Number systems, operations, and codes
Arithmetic Operations with Signed Numbers
56
Number systems, operations, and codes
Arithmetic Operations with Signed Numbers số bị trừ
57
Number systems, operations, and codes
Decimal Hexadecimal Binary
Hexadecimal Numbers 0 0 0000
1 1 0001
Hexadecimal uses sixteen characters to 2 2 0010
represent numbers: the numbers 0 3 3 0011
through 9 and the alphabetic characters 4 4 0100
A through F. 5 5 0101
6 6 0110
Large binary number can easily 7 7 0111
be converted to hexadecimal by 8 8 1000
grouping bits 4 at a time and writing 9 9 1001
the equivalent hexadecimal character. 10 A 1010
11 B 1011
Example Express 1001 0110 0000 11102 in
hexadecimal:
12 C 1100
13 D 1101
Solution Group the binary number by 4-bits 14 E 1110
starting from the right. Thus, 960E 15 F 1111
58
Number systems, operations, and codes
Decimal Hexadecimal Binary
Hexadecimal Numbers 0 0 0000
1 1 0001
Hexadecimal is a weighted number 2 2 0010
system. The column weights are 3 3 0011
powers of 16, which increase from 4 4 0100
5 5 0101
right to left. 6 6 0110
7 7 0111
Column weights {4096
3 2 1
16 16 16 16 .
256 16 1 .
0
8 8 1000
9 9 1001
Example Express 1A2F16 in decimal. 10 A 1010
11 B 1011
Solution 4096 256 16 1
Start by writing the column weights:
12 C 1100
13 D 1101
1 A 2 F16
14 E 1110
1(4096) + 10(256) +2(16) +15(1) = 670310 15 F 1111
59
Number systems, operations, and codes
Decimal Octal Binary
Octal Numbers 0 0 0000
1 1 0001
Octal uses eight characters the numbers 2 2 0010
0 through 7 to represent numbers. 3 3 0011
There is no 8 or 9 character in octal. 4 4 0100
5 5 0101
Binary number can easily be
6 6 0110
converted to octal by grouping bits 3 at 7 7 0111
a time and writing the equivalent octal 8 10 1000
character for each group. 9 11 1001
10 12 1010
Example Express 1 001 011 000 001 1102 in
octal:
11 13 1011
12 14 1100
Solution Group the binary number by 3-bits 13 15 1101
starting from the right. Thus, 1130168 14 16 1110
15 17 1111
60
Number systems, operations, and codes
Decimal Octal Binary
Octal Numbers 0 0 0000
1 1 0001
Octal is also a weighted number 2 2 0010
system. The column weights are 3 3 0011
powers of 8, which increase from right 4 4 0100
5 5 0101
to left. 6 6 0110
7 7 0111
Column weights {5128
3 82
64
81
8
80 .
1 . 8 10 1000
9 11 1001
Example Express 37028 in decimal. 10 12 1010
11 13 1011
Solution 512 64 8 1
Start by writing the column weights:
12 14 1100
13 15 1101
3 7 0 28
14 16 1110
3(512) + 7(64) +0(8) +2(1) = 198610 15 17 1111
61
Number systems, operations, and codes
Decimal Binary BCD
BCD 0 0000 0000
1 0001 0001
Binary coded decimal (BCD) is a 2 0010 0010
weighted code that is commonly 3 0011 0011
used in digital systems when it is 4 0100 0100
5 0101 0101
necessary to show decimal 6 0110 0110
numbers such as in clock displays. 7 0111 0111
The table illustrates the 8 1000 1000
difference between straight binary and 9 1001 1001
BCD. BCD represents each decimal 10 1010 0001 0000
digit with a 4-bit code. Notice that the 11 1011 0001 0001
codes 1010 through 1111 are not used in 12 1100 0001 0010
BCD. 13 1101 0001 0011
14 1110 0001 0100
15 1111 0001 0101
62
Number systems, operations, and codes
BCD
Question: What are the column weights for the BCD number
1000 0011 0101 1001?
Answer:
8000 4000 2000 1000 800 400 200 100 80 40 20 10 8 4 2 1
Note that you could add the column weights where there is
a 1 to obtain the decimal number. For this case:
8000 + 200 +100 + 40 + 10 + 8 +1 = 835910
63
Number systems, operations, and codes
BCD
A lab experiment in which BCD
is converted to decimal is shown.
64
Number systems, operations, and codes
Decimal Binary Gray code
Gray code 0 0000 0000
1 0001 0001
Gray code is an unweighted code 2 0010 0011
that has a single bit change between 3 0011 0010
one code word and the next in a 4 0100 0110
5 0101 0111
sequence. Gray code is used to 6 0110 0101
avoid problems in systems where an 7 0111 0100
error can occur if more than one bit 8 1000 1100
changes at a time. 9 1001 1101
10 1010 1111
11 1011 1110
12 1100 1010
13 1101 1011
14 1110 1001
15 1111 1000
65
Number systems, operations, and codes
Gray code
A shaft encoder is a typical application. Three IR
emitter/detectors are used to encode the position of the shaft.
The encoder on the left uses binary and can have three bits
change together, creating a potential error. The encoder on the
right uses gray code and only 1-bit changes, eliminating
potential errors.
Binary sequence
Gray code sequence
66
Number systems, operations, and codes
ASCII
67
ASCII American Standard Code for Information
ASCII
Interchange
68
…..Unicode
Extended ASCII
Number systems, operations, and codes
Parity Method
The parity method is a method of error detection for
simple transmission errors involving one bit (or an odd
number of bits). A parity bit is an “extra” bit attached to
a group of bits to force the number of 1’s to be either
even (even parity) or odd (odd parity).
Example The ASCII character for “a” is 1100001 and for “A” is
1000001. What is the correct bit to append to make both of
these have odd parity?
Solution The ASCII “a” has an odd number of bits that are equal to 1;
therefore the parity bit is 0. The ASCII “A” has an even
number of bits that are equal to 1; therefore the parity bit is 1.
70
Number systems, operations, and codes
Cyclic Redundancy Check
The cyclic redundancy check (CRC) is an error detection method
that can detect multiple errors in larger blocks of data. At the
sending end, a checksum is appended to a block of data. At the
receiving end, the check sum is generated and compared to the sent
checksum. If the check sums are the same, no error is detected.
71
Selected Key Terms
72
Selected Key Terms
74
© 2008 Pearson Education
2. The 2’s complement of 1000 is
a. 0111
b. 1000
c. 1001
d. 1010
75
© 2008 Pearson Education
3. The fractional binary number 0.11 has a decimal value of
a. ¼
b. ½
c. ¾
d. none of the above
76
© 2008 Pearson Education
4. The hexadecimal number 2C has a decimal equivalent
value of
a. 14
b. 44
c. 64
d. none of the above
77
© 2008 Pearson Education
5. Assume that a floating point number is represented in
binary. If the sign bit is 1, the
a. number is negative
b. number is positive
c. exponent is negative
d. exponent is positive
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© 2008 Pearson Education
6. When two positive signed numbers are added, the result
may be larger that the size of the original numbers, creating
overflow. This condition is indicated by
a. a change in the sign bit
b. a carry out of the sign position
c. a zero result
d. smoke
79
© 2008 Pearson Education
7. The number 1010 in BCD is
a. equal to decimal eight
b. equal to decimal ten
c. equal to decimal twelve
d. invalid
80
© 2008 Pearson Education
8. An example of an unweighted code is
a. binary
b. decimal
c. BCD
d. Gray code
81
© 2008 Pearson Education
9. An example of an alphanumeric code is
a. hexadecimal
b. ASCII
c. BCD
d. CRC
82
© 2008 Pearson Education
10. An example of an error detection method for
transmitted data is the
a. parity check
b. CRC
c. both of the above
d. none of the above
83
© 2008 Pearson Education
Answers:
1. c 6. a
2. b 7. d
3. c 8. d
4. b 9. b
5. a 10. c
84
85
Logic gates
A X
The Inverter
Input Output
A X
LOW (0) HIGH (1)
HIGH (1) LOW(0)
86
Logic gates
A X
The Inverter
Example waveforms:
A
X
A group of inverters can be used to form the 1’s complement
of a binary number: Binary number
1 0 0 0 1 1 0 1
0 1 1 1 0 0 1 0
1’s complement
87
Logic gates
A A
X & X
The AND Gate B
B
The AND gate produces a HIGH output when all inputs are
HIGH; otherwise, the output is LOW. For a 2-input gate,
the truth table is Inputs Output
A B X
0 0 0
0 1 0
1 0 0
1 1 1
88
Logic gates
A A
X & X
The AND Gate B
B
Example waveforms:
A
B
X
The AND operation is used in computer programming as a
selective mask. If you want to retain certain bits of a binary
number but reset the other bits to 0, you could set a mask with
1’s in the position of the retained bits.
Example If the binary number 10100011 is ANDed with
the mask 00001111, what is the result? 00000011
89
Logic gates
A X A ≥1 X
The OR Gate
B B
The OR gate produces a HIGH output if any input is HIGH;
if all inputs are LOW, the output is LOW. For a 2-input gate,
the truth table is Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 1
90
Logic gates
A X A ≥1 X
The OR Gate
B B
Example waveforms:
A
B
X
The OR operation can be used in computer programming to set certain
bits of a binary number to 1.
Example and a 0 in this position for capitals. (Bit positions are numbered
ASCII letters have a 1 in the bit 5 position for lower case letters
from right to left starting with 0.) What will be the result if you
OR an ASCII letter with the 8-bit mask 00100000?
Solution The resulting letter will be lower case.
91
Logic gates
A X A & X
The NAND Gate
B B
The NAND gate produces a LOW output when all inputs
are HIGH; otherwise, the output is HIGH. For a 2-input
gate, the truth table is Inputs Output
A B X
0 0 1
0 1 1
1 0 1
1 1 0
92
Logic gates
A X A & X
The NAND Gate
B B
Example waveforms:
A
B
X
The NAND gate is particularly useful because it is a
“universal” gate – all other basic gates can be constructed
from NAND gates.
93
Logic gates
A X A ≥1 X
The NOR Gate
B B
The NOR gate produces a LOW output if any input is
HIGH; if all inputs are HIGH, the output is LOW. For a
2-input gate, the truth table is
Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 0
The NOR operation is shown with a plus sign (+) between
the variables and an overbar covering them. Thus, the NOR
operation is written as X = A + B.
94
Logic gates
A X A ≥1 X
The NOR Gate
B B
Example waveforms:
A
B
X
The NOR operation will produce a LOW if any input is HIGH.
+5.0 V
95
Logic gates
A X A =1 X
The XOR Gate
B B
The XOR gate produces a HIGH output only when both
inputs are at opposite logic levels. The truth table is
Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 0
96
97
Logic gates
A X A =1 X
The XOR Gate
B B
Example waveforms:
A
B
X
Notice that the XOR gate will produce a HIGH only when exactly one
input is HIGH.
98
Logic gates
A X A =1 X
The XNOR Gate
B B
The XNOR gate produces a HIGH output only when both
inputs are at the same logic level. The truth table is
Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 1
The XNOR operation shown as X = AB + AB. Alternatively,
the XNOR operation can be shown with a circled dot
between the variables. Thus, it can be shown as X = A . B.
99
Logic gates
A X A =1 X
The XNOR Gate
B B
Example waveforms:
A
B
X
Notice that the XNOR gate will produce a HIGH when both inputs are the
same. This makes it useful for comparison functions.
100
Logic gates
Fixed Function Logic
Two major fixed function logic families are TTL and CMOS.
A third technology is BiCMOS, which combines the first
two. Packaging for fixed function logic is shown.
0.335 – 0.334 in.
0.740 – 0.770 in. 14 13 12 11 10 9 8
14 13 12 11 10 9 8
1 2 3 4 5 6 7
1 2 3 4 5 6 7
Pin no.1 Lead no.1
identifiers identifier
14
1 14
1
1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'00 ' 02 '04 '08
1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'10 '11 '20 '21
1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'27 '30 '32 '86
102
Logic gates
Fixed Function Logic
Logic symbols show the gates and associated pin numbers.
VCC
(14)
(1)
(3)
(2) (1) & (3)
(4) (2)
(6) (4)
(5) (6)
(5)
(9) (9)
(8) (8)
(10) (10)
(12) (12)
(11) (13) (11)
(13)
(7)
GND
103
Logic gates
Fixed Function Logic
Data sheets include limits and conditions set by the manufacturer as well as DC and
AC characteristics. For example, some maximum ratings for a 74LS00 are:
104
Logic gates
Programmable Logic
A Programmable Logic Device (PLD) can be programmed
to implement logic. There are various technologies
available for PLDs. Many use an internal array of AND
gates to form logic terms. Many PLDs can be programmed
multiple times. A A B B
105
Logic gates
Programmable Logic
Example
A text entry for a programming a PLD in VHDL/Verilog
HDL as a 2-input NAND gate is shown for reference in the
following slide. In this case, the inputs and outputs are first
specified. Then the signals are described. Although you are
probably not familiar with VHDL, you can see that the
program is simple to read.
106
Summary
Programmable Logic
VHDL Verilog
entity NandGate is module NAND2gate(A, B, F);
port(A, B: in bit; input A;
input B;
LED: out bit);
output F;
end entity NandGate; reg F;
architecture GateBehavior of NandGate is
signal A, B: bit; always @ (A or B)
begin F <= ~(A & B);
begin
end
X <= A nand B;
LED <= X; endmodule
end architecture GateBehavior;
107
Selected Key Terms
a. 0 0 0 b. 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 0
a. 0 0 0 b. 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 0
a. 0 0 0 b. 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 0
a. OR gate
b. AND gate
c. NOR gate
d. XOR gate
113
© 2008 Pearson Education
A X
5. The symbol B is for a(n)
a. OR gate
b. AND gate
c. NOR gate
d. XOR gate
114
© 2008 Pearson Education
6. A logic gate that produces a HIGH output only when
all of its inputs are HIGH is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate
115
© 2008 Pearson Education
7. The expression X = A + B means
a. A OR B
b. A AND B
c. A XOR B
d. A XNOR B
116
© 2008 Pearson Education
8. A 2-input gate produces the output shown. (X represents
the output.) This is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate
A
B
X
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© 2008 Pearson Education
9. A 2-input gate produces a HIGH output only when the
inputs agree. This type of gate is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. XNOR gate
118
© 2008 Pearson Education
10. The required logic for a PLD can be specified in an
Hardware Description Language by
a. text entry
b. schematic entry
c. state diagrams
d. all of the above
119
© 2008 Pearson Education
Answers:
1. c 6. b
2. b 7. c
3. a 8. d
4. a 9. d
5. d 10. d
120
Capacitors "C" of 100nf to 300nf provide smoothing
121
122
123
124