L D College of Engineering, Ahmedabad

ELECTRONICS & COMMUNICATION

DEPARTMENT

BE SEM IV

LAB MANUAL

ANALOG CIRCUIT DESIGN

 ACD LAB MANUAL 2

LD College of Engineering, Ahmedabad

CERTIFICATE

This is to certify that Mr./Miss.__________________________

of 4th EC, Enrolment no._________________ satisfactorily
completed his/her term work for Analog Circuit
Design(3141002) within four wall of L.D. College of
engineering, Ahmedabad affiliated to Gujarat Technological
University, in March 2023 to June 2023.

[ Subject In charge] [ Head of Department]

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INDEX

Sr. Name of Experiment Page Date Sign

No. No.

1 To design RC phase shift oscillator using

transistor.
2 To design Colpitts oscillators

3 To design Hartley oscillators

4 To design a Wein bridge oscillator

5 To design a Clapp oscillator

6 Measurement of Input bias current, Input

offset current, input and output offset voltage
of 741 ICs.
7 To configure op-amp in voltage follower
mode and to measure its slew rate.

8 To configure op-amp as Non-inverting

amplifier and measure its Gain and band
width.

9 To configure op-amp as inverting amplifier

and measure its Gain and band width.
10 To design Schmitt trigger circuit using op-
amp and take measurements.

11 To prepare half-wave rectifier using op-amp

and verify its output waveform.

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12 To design integrator circuit using the op-amp

and verify it.

13 To Design Differentiator Circuit Using The

Op-Amp And Verify It.

14 To Study Astable Multivibrator Using 741

Op-Amp
15 To design monostable multi-vibrators using
555 timer IC and verify their

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 ACD LAB MANUAL 5

NOTICE:EVERY ONE COME WITH BELOW MENTIONED IC’S ON VERY FIRST

DAY OF LAB

1. 741
2. LM307
3. ΜAF772
4. LF351/MC34001
5. LM318
6. NE/SE 566 VCO
7. 9400V/F
8. HA2500
9. FLT-U2 DATEL’S
10. MF5 NATIONAL SWITCHED CAPACITOR FILTER
11. SE/NE 565 PLL
12. SENE 555 TIMER
13. LM380
14. 7805/06/808/812/815/818/824
15. 7902/905/905.2/906/908/912/915/918/924
16. LM317/317H/317HV/317HVH/317L/317M
17. LM337/H/HV/HVH/LZ/M
18. MC1723,78S40

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 ACD LAB MANUAL 6

Experiment 1 Date:

AIM:
To design RC phase shift oscillator and to determine its frequency of oscillation for
different values of R and C.

Principle:
In a phase shift oscillator, the positive feedback from the output to the input is provided
by a series triple RC network which produces a phase shift of 180°.The transistor
produces a phase shift of 180° and hence the total phase shift of the oscillator is 360° or
0°.The feedback is so adjusted that the gain is more than 29 since the RC network
produces and attenuation of 1/29.

Apparatus:
• Transistors, Resistors, capacitors.
• Variable Power supply, Function generator, CRO.

• Breadboard, Digital Multimeter, connecting wires and probes.

Circuit Diagram:

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Theory:
A phase shift oscillator is a simple sine wave electronic oscillator. It contains an inverting
amplifier and a feedback filter which shifts the phase of amplifier output by 180° at
oscillation frequency.
The filter produces a phase shift that increases with frequency. It must have maximum
phase shift of considerably greater than 180° at high frequency.
One of the simplest implementations for this type of oscillator uses a transistor amplifier,
three capacitors and three resistors as shown in circuit diagram

Formula:
1
f= 4𝑅𝑐
2𝜋𝑅𝐶(6+ 𝑅 )1/2

f= frequency of oscillator
R and C = resistance and capacitance of the RC network
Rc = collector bias resistance.

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Procedure:
• Connect circuit diagram as shown in figure
• Set the component value such that loop gain of this circuit is 1.
• Calculate theoretical frequency which is generated by this circuit.
• Show the output waveform on oscilloscope.
• Compare theoretical frequency with practical frequency.
• Change component value follow above procedure.

Result:
The phase shift oscillator is constructed and its theoretical and experimental values of
frequencies are compared.

Calculation and Observation Table:

Sr. Design parameter Theoretical Practical
No. Frequency Frequency
R1 C1 R2 C2 R3 C3

Output Waveform:

C=0.047µF
Type equation here.

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Question time:
1. The circuit in figure employs positive feedback and is intended to generate sinusoidal
oscillation. If at a frequency fo, B(f) = Δ (Vf (f) / Vo (f)) = 1/6 ∟0° then to sustain oscillation
at this frequency
RF

VEE
4 -15V U1
R1
2
6
3
7 1 5 LM741H
VCC
15V
Vo(f)
Network
B(f)

(a) RF = 5R1 (b) RF = 6R1 (c) RF = R1/6 (d) RF = R1/5

Conclusion:

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 ACD LAB MANUAL 10

Experiment 2 Date:

AIM:
To design Colpitts oscillator using transistor.

Objective:
To measure different frequency, this is generated by circuit of Colpitts oscillator by
varying component value of circuit.
Apparatus:
• Transistors, Resistors, Inductor, capacitors.
• Variable Power supply, Function generator, CRO.

• Breadboard, Digital Multimeter, connecting wires and probes.

Circuit Diagram:

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Theory:
The Colpitt’s oscillator is designed for generation of high frequency sinusoidal
oscillations (radio frequencies ranging from 10KHz to 100MHz). They are widelyused in
commercial signal generators up to 100MHz. Colpitt's oscillator is same as Hartley
oscillator except for one difference. Instead of using a tapped inductance,Colpitt's
oscillator uses a tapped capacitance. The circuit diagram of Colpitt’s oscillator using BJT
is shown in circuit. It consists of an R-C coupled amplifier using an n-p-n transistor in CE
configuration. RB1 and RB2 are two resistors which form a voltage divider bias to the
transistor. A resistor RE is connected in the circuit which stabilizes the circuit against
temperature variations. A capacitor Ce is connected in parallel with RE, acts as a bypass
capacitor and provides a low reactive path to the amplified ac signal. The coupling
capacitor CC blocks dc and provides an ac path from the collector to the tank circuit. The
feedback network (tank circuit) consists of two capacitors C1 and C2 (in series) which
placed across a common inductor L. The centre of the two capacitors is tapped
(grounded). The feedback network (C1, C2 and L) determines the frequency of oscillation
of the oscillator. The two series capacitors C1and C2 form the potential divider led for
providing the feedback voltage. The voltage developed across the capacitor C1 provides
regenerative feedback which is essential for sustained oscillations.
When the collector supply voltage Vcc is switched on, collector current starts rising and
charges the capacitors C1 and C2. When these capacitors are fully charged, they discharge
through coil L setting up damped harmonic oscillations in the tank circuit. The oscillatory
current in the tank circuit produces an a.c. voltages across C1, C2. The oscillations across
C1 are applied to base emitter junction of the transistor and appears in the amplified form
in the collector circuit and overcomes the losses occurring in the tank circuit.
The feedback voltage ( across the capacitor C1) is 180° out of phase with the output
voltage ( across the capacitor C2), as the centre of the two capacitors is grounded. A phase
shift of 180° is produced by the feedback network and a further phase shift of 180°
between the output and input voltage is produced by the CE transistor. Hence, the total
phase shift is 360° or 0°, which is essential for sustained oscillations, as per, the
Barkhausen criterion. So we get continuous undamped oscillations.

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The frequency of oscillation of the oscillator

1
𝑓=
2𝜋√𝐿𝐶
Where L = self inductance of coil
C = Capacitance of condenser.
C = C1C2 /(C1+C2)

Procedure:
• Connect circuit diagram as shown in figure
• Set the component value such that loop gain of this circuit is greater than 1.
• Calculate theoretical frequency which is generated by this circuit.
• Show the output waveform on oscilloscope.
• Compare theoretical frequency with practical frequency.
• The experiment is repeated by changing L or C1 or C2 or all. The readings are
noted in the table given.

Calculation and Observation Table:

Sr. No. Design Parameter Theoretical Practical
Frequency Frequency

C1 C2 L

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 ACD LAB MANUAL 13

Output Waveforms:

C = 2mH

C=4mH

Question time:
1. For the BJT circuit shown, assume that the β of transistor is very large and V BE =0.7V.
The mode of operation of the BJT is

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 ACD LAB MANUAL 14

10kΩ
Q1

10 V

2V 1kΩ

(a) Cut-off (b) saturation (c) normal active (d) Reverse active

Conclusion:

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 ACD LAB MANUAL 15

Experiment 3 Date:

AIM:
To design Hartley oscillator using transistor.

Objective:
To measure different frequency, this is generated by circuit of Hartley oscillator by
varying component value of circuit.

Apparatus:
• Transistors, Resistors, Inductor, capacitors.
• Variable Power supply, Function generator, CRO.

• Breadboard, Digital Multimeter, connecting wires and probes.

Circuit Diagram:

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 ACD LAB MANUAL 16

Theory:
The Hartley oscillator is designed for generation of sinusoidal oscillations in the R.F range
(20 KHz - 30 MHz). It is very popular and used in radio receivers as a local oscillator.The
circuit diagram of Hartley oscillator (parallel or shunt-fed) using BJT is shown in circuit.
It consists of an R-C coupled amplifier using an n-p-n transistor in CEconfiguration. RB1
and RB2 are two resistors which form a voltage divider bias to thetransistor. A resistor
RE is connected in the circuit which stabilizes the circuit againsttemperature variations.
A capacitor Ce is connected in parallel with RE, acts as a bypasscapacitor and provides a
low reactive path to the amplified ac signal. The coupling capacitor Cc blocks dc and
provides an ac path from the collector to the tank circuit. TheL-C feedback network (tank
circuit) consists of two inductors L1, and L2 (in series) whichare placed across a common
capacitor C and the centre of the two inductors is tapped. The feedback network (L1, L2
and C) determines the frequency ofoscillation of the oscillator.
When the collector supply voltage Vcc is switched on, collector current starts rising and
charges the capacitor C. When this capacitor is fully charged, it dischargesthrough coils
L1 and L2, setting up damped harmonic oscillations in the tank circuit. Theoscillatory
current in the tank circuit produces an a.c. voltage across L1 which is appliedto the base
emitter junction of the transistor and appears in the amplified form in thecollector circuit.
Feedback of energy from output (collector emitter circuit) to input(base-emitter circuit is)
accomplished through auto transformer action. The output of theamplifier is applied
across the inductor L1, and the voltage across L2 forms the feedbackvoltage. The coil L1,
is inductively coupled to coil L2, and the combination acts as anauto-transformer. This
energy supplied to the tank circuit overcomes the losses occurringin it. Consequently the
oscillations are sustained in the circuit.The energy supplied to the tank circuit is in phase
with the generated oscillations.The phase difference between the voltages across L1 and
that across L2 is always 180°because the centre of the two is grounded. A further phase
of 180° is introduced betweenthe input and output voltages by the transistor itself. Thus
the total phase shift becomes360 (or zero), thereby making the feedback positive or
regenerative which is essentialfor oscillations, So continuous undamped oscillations are
obtained.

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 ACD LAB MANUAL 17

The frequency of oscillation of the oscillator

1
𝑓=
2𝜋√𝐿𝐶
Where L = L1+L2 = Resultant inductance of series combination
C = Capacitance of condenser.

Procedure:
• Connect circuit diagram as shown in figure
• Set the component value such that loop gain of this circuit is greater than 1.
• Calculate theoretical frequency which is generated by this circuit.
• Show the output waveform on oscilloscope.
• Compare theoretical frequency with practical frequency.
• Change component value follow above procedure.

Result:
The experimental value of the frequency agrees fairly with the theoretical value.

Calculation and Observation Table:

Sr. No. Design Parameter Theoretical Practical
Frequency Frequency

L1 L2 C

Output Waveforms:

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 ACD LAB MANUAL 18

C = 0.01mF

C = 0.02mF

C=0.0047mF

Conclusion:

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 ACD LAB MANUAL 19

Experiment 4 Date:

AIM: To design a Wein bridge oscillator.

Objective: To measure different frequency, this is generated by circuit of Wein bridge

oscillator by varying component value of circuit.

Apparatus:
• Transistors, Resistors, Inductor, capacitors.
• Variable Power supply, Function generator, CRO.

• Breadboard, Digital Multimeter, connecting wires and probes.

Circuit Diagram:

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 ACD LAB MANUAL 20

Theory:
Another type of popular audio frequency oscillator is the Wien bridge oscillator circuit.
This is mostly used because of its important features. This circuit is free from the circuit
fluctuations and the ambient temperature.
The main advantage of this oscillator is that the frequency can be varied in the range of
10Hz to about 1MHz whereas in RC oscillators, the frequency is not varied.
The circuit construction of Wien bridge oscillator can be explained as below. It is a two-
stage amplifier with RC bridge circuit. The bridge circuit has the arms R 1C1, R3, R2C2 and
the tungsten lamp Lp. Resistance R3 and the lamp Lp are used to stabilize the amplitude of
the output.
The above following circuit diagram shows the arrangement of a Wien bridge oscillator.
The transistor T1 serves as an oscillator and an amplifier while the other transistor
T2 serves as an inverter. The inverter operation provides a phase shift of 180o. This circuit
provides positive feedback through R1C1, C2R2 to the transistor T1 and negative feedback
through the voltage divider to the input of transistor T2.
The frequency of oscillations is determined by the series element R 1C1 and parallel
element R2C2 of the bridge.

If R1 = R2 and C1 = C2 = C
Then,

The oscillator consists of two stages of RC coupled amplifier and a feedback network. The
voltage across the parallel combination of R and C is fed to the input of amplifier 1. The
net phase shift through the two amplifiers is zero.
The usual idea of connecting the output of amplifier 2 to amplifier 1 to provide signal
regeneration for oscillator is not applicable here as the amplifier 1 will amplify signals
over a wide range of frequencies and hence direct coupling would result in poor
frequency stability. By adding Wien bridge feedback network, the oscillator becomes
sensitive to a particular frequency and hence frequency stability is achieved.

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 ACD LAB MANUAL 21

Procedure:
• Connect circuit diagram as shown in figure
• Set the component value such that loop gain of this circuit is greater than 1.
• Calculate theoretical frequency which is generated by this circuit.
• Show the output waveform on oscilloscope.
• Compare theoretical frequency with practical frequency.
• The experiment is repeated by changing C1 or C2 or R1 or R2 or all. The
readings are noted in the table given.

Result:
The experimental value of frequency agrees fairly with the theoretical value.

Calculation and Observation Table:

Sr. Design Parameter Theoretical Practical Frequency
No. Frequency

C1 C2 R1 R2

Output Waveforms:

C=0.01µF

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 ACD LAB MANUAL 22

C=0.02µF

Conclusion:

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 ACD LAB MANUAL 23

Experiment 5 Date:

AIM: To design a clapp oscillator.

Objective: To measure different frequency, this is generated by circuit of Clapp oscillator

by varying component value of circuit.

Apparatus:
• Transistors, Resistors, Inductor, capacitors.
• Variable Power supply, Function generator, CRO.
• Breadboard, Digital Multimeter, connecting wires and probes.

Circuit Diagram :

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 ACD LAB MANUAL 24

Theory:
A Clapp oscillator (also known as a Gouriet oscillator) is an LC electronic oscillator that
uses a particular combination of an inductor and three capacitors to set the oscillator’s
frequency (see circuit diagram below). LC oscillators use a transistor (or vacuum tube or
other gain element) and a positive feedback network.

A Clapp oscillator is a variation of a Colpitts oscillator where an additional capacitor

(C3) is added into the tank circuit to be in series with the inductor in it, as shown in the
circuit diagram above.

Apart from the presence of an extra capacitor, all other components and their
connections remain similar to that in the case of Colpitts oscillator.
Hence, the working of this circuit is almost identical to that of the Colpitts, where the
feedback ratio governs the generation and sustainity of the oscillations. However the
frequency of oscillation in the case of a Clapp oscillator is given by

Usually, the value of C3 is chosen to be much smaller than the other two capacitors. This
is because, at higher frequencies, the smaller the C3, the larger will be the inductor,
which eases the implementation as well as reduces the influence of stray inductance.
Nevertheless, the value of C3 is to be chosen with utmost care. This is because, if it is
chosen to be very small, then the oscillations will not be generated as the L-C branch
will fail to have a net inductive reactance.
However, here it is to be noted that when C3 is chosen to be smaller in comparison with
C1 and C2, the net capacitance governing the circuit will be more dependent on it.
Thus the equation for the frequency can be approximated as

Further, the presence of this extra capacitance will make the Clapp oscillator preferable
over Colpitts when there is a need to vary the frequency as is the case with Variable
Frequency Oscillator (VCO). The reason behind this can be explained as follows.
In the case of the Colpitts oscillator, the capacitors C1 and C2 need to be varied
in order to vary their frequency of operation. However during this process,
even the feedback ratio of the oscillator changes which in turn affects its
output waveform.
One solution to this problem is to make both C1 and C2 to be fixed in nature
while achieving the variation in frequency using a separate variable capacitor.

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 ACD LAB MANUAL 25

As could be guessed, this is what the C3 does in the case of the Clapp
oscillator, which in turn makes it more stable over Colpitts in terms of
frequency.
The frequency stability of the circuit can be even more increased by enclosing the entire
circuit in a chamber with constant temperature and by using a Zener diode to ensure
constant supply voltage.
In addition, it is to be noted that the values of the capacitors C1 and C2 are prone to the
effect of stray capacitances unlike that of C3.

Procedure:
• Connect circuit diagram as shown in figure
• Set the component value such that loop gain of this circuit is greater than 1.
• Calculate theoretical frequency which is generated by this circuit.
• Show the output waveform on oscilloscope.
• Compare theoretical frequency with practical frequency.
• The experiment is repeated by changing L or C1 or C2 or C3 or all. The readings
are noted in the table given.

Calculation and Observation Table:

Sr. Design Parameter Theoretical Practical Frequency
No. Frequency

C1 C2 C3 L

Conclusion:

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 ACD LAB MANUAL 26

Experiment 6 Date:

AIM: For op-amp(μA741) Measurement of:

I. Input bias current
II. Input offset current
III. Input offset voltage
IV. Input and output voltage ranges
HARDWARE REQUIRED:
V. Power supply : Dual variable regulated low voltage DC source
VI. Equipments : CRO, DMM (Digital Multimeter)
VII. Resistors :100k,100
VIII. Semiconductor : IC741 op-amp
IX. Miscellaneous : Bread board and wires
THEORY:
Input offset current (𝑰𝒊𝒐)is algebraic difference between currents into inverting
and non inverting terminals,

𝐼𝑖𝑜 = |𝐼𝐵1 − 𝐼𝐵2 |

Where 𝐼𝐵1 Is current into noninverting input and 𝐼𝐵2 Iscurrent into inverting input

Input bias

Input bias current(𝑰𝑩 )is average of currents that flow into inverting and
noninverting input terminal of op-amp,

𝐼𝐵1− 𝐼𝐵2
𝐼𝐵 =
2
Input offset voltage is voltage that must be applied between two input terminals
of an op-amp to null output
Input voltage range is maximum voltage that can be applied to both terminals
without disturbing proper functioning of op-amp.

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 ACD LAB MANUAL 27

Fig:1:Input bias and input offset current measurement circuit

Fig:2:Input offset voltage measurement circuit

Fig:3:Input voltage range measurement circuit

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 ACD LAB MANUAL 28

OBSERVARTION TABLE:
Input bias and offset current measurement:

DC DC 𝐼𝐵+ 𝐼𝐵− Input bias Input

voltage voltage 𝑉+ 𝑉− current offset
= =
at non- at 220𝐾 220𝐾 current
𝐼𝐵1 + 𝐼𝐵2
inverting inverting 𝐼𝐵 = 𝐼𝑖𝑜
2
terminal terminal = |𝐼𝐵1
− 𝐼𝐵2 |
𝑉+ 𝑉−

Input offset voltage measurement:

Vout Vin=Vout/1000

PROCEDURE:
Measurement of input bias and offset current:
i. Connect the circuit of figure 1.
ii. Using a DMM, measure the dc voltage at the (-) terminal & record
the values in Table 1-2-1.
iii. By ohm’s law, calculate the input currents; IB+ and IB-.
iv. Average these values to find out the input Bias current.
v. Also, find the difference between these two currents to know the
input offset current. Record these values in Table

Measurement of input offset voltage:

vi. Connect the circuit of Figure 1.
vii. Measure the DC output voltage at pin 6 using multimeter and record
the result in Table
viii. Calculate the input offset voltage using the formula Vi = Vout / 1000
and record the value in table

Measurement of input voltage range:

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 ACD LAB MANUAL 29

i. Assemble the voltage follower circuit as shown in Figure 3 with R1 =

R2 = 100 kΩ. Use op-amp dc power supply voltages of ±9 V.
ii. Apply ±5 V, 100 Hz sinusoidal input, Observe on a CRO the voltages
at the non-inverting input and output pins simultaneously. Increase
the signal amplitude until distortion is observed at the peak value of
the output. Measure the positive and negative input voltage peak
values.
iii. This gives the op-amp input voltage range.
iv. Change the circuit of Figure 3 to an inverting amplifier. Connect R 1
between the source and inverting input. Ground the non-inverting
input. Choose R1 = 10 kΩ, R2 = 100 kΩ. Repeat same procedure. This
gives the op-amp output voltage range.

CONCLUSION:

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 ACD LAB MANUAL 30

Experiment 7 Date:

AIM: To configure op-amp in voltage follower mode and to measure its slew rate
and bandwidth
HARDWARE REQUIRED:
I. Power supply : Dual variable regulated low voltage DC source
II. Equipments : CRO, DMM (Digital Multimeter)
III. Resistors :100k,100
IV. Semiconductor : IC741 op-amp
V. Miscellaneous : Bread board and wires

THEORY:
Slew rate: Among all specifications affecting the ac operation of the op-amp, slew
rate is the most important because it places a severe limit on a large signals
operation. Slew rate is defined as the maximum rate at which the output voltage
can change. The 741 op-amp has a typical slew rate of 0.5 volts per microsecond
(V/μs). This is the ultimate speed of a typical 741; its output voltage can change
no faster than 0.5V/μs. If we drive a 741 with large step input, it takes 20μs (0.5
V/μsX10V) for the output voltage to change from 0 to 10V.

Band width: Slew rate distortion of a sine wave starts at a point where the initial
slope of the sine wave equals the slew rate of the op-amp. The maximum
frequency at which the op-amp can be operated without distortion is

𝑆𝑅
𝑓𝑚𝑎𝑥 =
2𝜋𝑉𝑃

where SR=slew rate of op-amp, VP= peak voltage of output sine wave. As an
example, if the output sine wave has a peak voltage of 10V and the op-amp slew
rate is 0.5 V/μs, the maximum frequency for large signal operation is Frequency
ƒmax is called bandwidth of op-amp. The 741 op-amp has a bandwidth of

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 ACD LAB MANUAL 31

approximately 8 KHz. This means the undistorted band width for large signal
operation is 8 KHz.

Fig:1:Slew rate and Bandwidth Measurement Circuit

OBSERVATION TABLE:
𝛥W 𝛥T 𝛥𝑊
SR= 𝛥𝑇 BW

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 ACD LAB MANUAL 32

PROCEDURE:
I. Connect the circuit of Figure 1.
II. Provide a 1V peak to peak square wave with a frequency of 25 KHz.
III. With an oscilloscope, observe the output of OPAMP. Adjust the
oscilloscope timing the get a couple of cycles.
IV. Measure the voltage change ΔV and time change ΔT of the output
waveform.
V. Record the results in Table.
VI. Calculate the slew rate using the formula SR = ΔV / ΔT.
VII. Using the circuit of figure 1, set the input at 1KHz. Adjust the signal
level to get 20Vpeak – to – peak (20 VPP) out of the op-amp.
VIII. Increase the frequency and watch the waveform somewhere above 10
KHz, slew rate distortion will become evident.
IX. That maximum frequency ƒ max at which the op-amp can be operated
is called bandwidth of an op-amp record the value in Table.

Output Waveform:

CONCLUSION:

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 ACD LAB MANUAL 33

Experiment 8 Date:

Aim: To configure op-amp as Non-inverting amplifier and measure its Gain and band
width.

Apparatus: IC 741c, CRO, Bread Board, Resistors, DMM, Connecting wires, Variable
power supply.

Theory: Operational amplifiers are found in many applications in control system. The
non-inverting amplifier using OP-Amp is shown in diagram. As its name suggests, it is
non-inverting means input and output signals are in phase with each other. Input is
applied at the non-inverting terminal of op-amp. Negative feedback is introduced via
feedback resistor to the inverting terminal of op-amp.

𝑅𝑓 𝑅𝑓
𝐴𝑣 = 1 + 𝑖𝑒 𝑉𝑜 = (1 + ) ∗ 𝑉𝑖𝑛
𝑅1 𝑅1

Circuit Diagram:

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 ACD LAB MANUAL 34

Procedure:
I. Connect the circuit components on breadboard as shown in figure.
II. Set the value for Vcc and Vee supply accordingly +14V and -14V.
III. Generate the signal using generator with frequency of 1 KHz.
IV. Now connect Vcc and Vee supply and input signal to the circuit.
V. Then connect the output of circuit to the CRO and measure the output signal.
VI. Now vary the amplitude of signal and measure the corresponding output.
VII. Now vary the frequency of signal and measure the corresponding output.
VIII. Draw the graph of frequency response of this non-inverting op-amp.

Observation Table:
To measure Gain:

Sr no. Vin(mV) Vo Gain |Gain|(dB)

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 ACD LAB MANUAL 35

10

11

12

To measure Bandwidth:

Sr No. Frequency Vo Gain |Gain|(dB)

10

11

12

Result:
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 ACD LAB MANUAL 36

Value of gain= ________ (Theoretical)

Value of |Gain|(dB) = ________ (Theoretical)

From Graph:
Value of cut-off frequency = Bandwidth = _______ KHz

Conclusion:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 37

Experiment 9 Date:

Aim: To configure op-amp as inverting amplifier and measure its Gain and band
width.

Apparatus: IC 741c, CRO, Bread Board, Resistors, DMM, Connecting wires, Variable
power supply.

Theory: Operational amplifiers are found in many applications in control system. The
inverting amplifier using OP-Amp is shown in diagram.

As its name suggests, it is inverting means input and output signals have 180 degree
phase shift with each other. Input is applied at the inverting terminal of op-amp.

Negative feedback is introduced via feedback resistor to the inverting terminal of op-
amp.

𝑅𝑓 𝑅𝑓
𝐴𝑣 = − 𝑖𝑒 𝑉𝑜 = (− ) ∗ 𝑉𝑖𝑛
𝑅1 𝑅1

Circuit Diagram:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 38

Procedure:
I. Connect the circuit components on breadboard as shown in figure.
II. Set the value for Vcc and Vee supply accordingly +14V and -14V.
III. Generate the signal using generator with frequency of 1 KHz.
IV. Now connect Vcc and Vee supply and input signal to the circuit.
V. Then connect the output of circuit to the CRO and measure the output signal.
VI. Now vary the amplitude of signal and measure the corresponding output.
VII. Now vary the frequency of signal and measure the corresponding output.
VIII. Draw the graph of frequency response of this inverting op-amp.

Observation Table:
To measure Gain:

Sr no. Vin(mV) Vo Gain |Gain|(dB)

10

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 39

To measure Bandwidth:

Sr No. Frequency Vo Gain |Gain|(dB)

10

Result:
Value of gain= ________ (Theoretical)

Value of |Gain|(dB) = ________ (Theoretical)

From Graph:
Value of cut-off frequency = Bandwidth = _______ KHz

Conclusion:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 40

Experiment 10 Date:

AIM: To design Schmitt trigger circuit using op-amp and take

measurements.

Hardware Required:

I. Power supply : Dual variable regulated low voltage DC source

II. Equipments : CRO, DMM (Digital Multimeter)
III. Resistors :56k,1k
IV. Semiconductor : IC741 op-amp
V. Miscellaneous : Bread board and wires

Theory:

Schmitt trigger

Figure shows an inverting comparator with positive feedback. This circuit

converts an irregular-shaped waveform to square wave or pulse. The circuit is
known as Schmitt trigger or squaring circuit. The input voltage vin triggers
(changes the states of) the output vo every time it exceeds certain voltage level
called the upper voltage Vut and lower threshold voltage Vlt.

The threshold voltages are obtained by using the voltage divider R 1-R2 ,
where the voltage across R1 is fed back to the (+) input. The voltage across R1 is a
variable reference threshold voltage that depends on the value and polarity of the
output voltage vo. when vo =+Vsat, the voltage across R1 is called the upper threshold
voltage, Vut. The input voltage vin must be slightly more positive than Vut in order
to cause the output vo to switch from +Vsat to –Vsat. As long as Vin<Vut, vo is at +Vsat.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 41

Using the voltage divider rule,

Vut= R1 (+ Vsat) (5-1a)

R1+R2

On the other hand, when vo=-Vsat, the voltage across R1 is referred to as the
lower threshold voltage, Vlt is given by the following equation:

Vlt = R1 (- Vsat) (5-1b)

R1+R2

Thus, if the threshold voltages Vut and Vlt are made larger than the input
noise voltages, the positive feedback will eliminate the false output transitions.
Also, the positive feedback, because of its regenerative action, will make vo switch
faster between + Vsat and - Vsat.

The output the Schmitt trigger is a square wave when the input is sine
wave. When the input is triangular wave, the output of the Schmitt trigger is a
square wave, whereas if the input is a saw-tooth wave, output of the Schmitt
trigger is a pulse waveform.

The comparator with positive feedback is said to be exhibit hysteresis, a

dead-band condition. That is, when the input of the comparator exceeds Vut , its
output switch from +Vsat to –Vsat and reverts back to its original state, +Vsat , when
input goes below Vlt . The hysteresis voltage is, of course, equal to the difference
between Vut and Vlt. Therefore,

Vhy = Vut - Vlt

= R1 (+ Vsat - (- Vsat)) (5-2)

R1+R2

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 42

Observation Table:
R1=1 k ohm , R2=56 k ohm , Vin=1 Vpp

Vsat Vut Vlt Vhy

Procedure:
I. Connect the circuit as given in Figure 5.
II. Give the input 1 VPP as given in Figure 5.
III. Observe the output waveform and draw in graph paper with proper
scale.
IV. Observe value of +ve and –ve saturation voltage in output waveform and
calculate the value of upper and lower voltages using eq n (5-1a) and (5-
2a) respectively.
V. Find out the value of Vhy using eqn (5-2).
VI. Draw the hysteresis characteristic with proper scale.

Output Waveform:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 43

Conclusion:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 44

Experiment 11 Date:

AIM: To prepare half-wave rectifier using op-amp and verify its output waveform.

Hardware Requirements:

I. Power supply : Dual variable regulated low voltage DC source

II. Equipments : CRO, DMM (Digital Multimeter)
III. Resistors :10k,1k
IV. Semiconductor : IC741 op-amp, Diodes
V. Miscellaneous : Bread board and wires

Theory:

Negative half wave Rectifier:

Negative half wave rectifier is shown in figure 6.1. in this circuit two
diodes are used so that the output vo’ of the op-amp does not saturate.

This minimizes the response time and increase the operating frequency
range of the op-amp. However notice that the op-amp is used in the inverting
configuration and the output is measured at the anode of diode D1 with respect to
ground. Also, the output resistance is nonuniform since it depends on the state of diode
D1. In other words, the output

Impedance is low when D1 is on and high (~= RF) when D1 is off. This
problem however, can be cured by connecting a voltage follower stage at the output.

During the positive half-cycle of vin , output vo’ negative, which forward biases diode

D1 and closes the loop through RF. R1 =RF, vo= vin .. However, on the negative alternation

of vin , output vo is positive; hence diode D2 is forward biased. In fact, it is this diode that

prevents the op-amp from going into positive Saturation. Since diode D1 is off, output vo
=0 to obtain positive half wave rectified outputs, diode D1 and D2 must be reversed.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 45

R1 RF=R1

1k
D2

11
D1N4002
I2 2

V-
Vin -
AC 1
OUT
3

V+
+
R3

4
1k

D3
D1N4002

Fig 6.1: Negative half-wave rectifier

Positive half wave Rectifier:

Negative half wave rectifier is shown in figure 6.2. in this circuit two
diodes are used so that the output vo’ of the op-amp does not saturate.

This minimizes the response time and increase the operating frequency
range of the op-amp. However notice that the op-amp is used in the inverting
configuration and the output is measured at the anode of diode D1 with respect to
ground. Also, the output resistance is nonuniform since it depends on the state of diode
D1. In other words, the output

Impedance is low when D1 is off and high (~= RF) when D1 is on. This
problem however, can be cured by connecting a voltage follower stage at the
output.

During the positive half-cycle of vin , output vo’ negative, which reverse biases diode D1..

however , on the negative alternation of vin , output vo is positive; hence diode D1 is

forward biased and closes the feedback loop through RF since R1 =RF , vo= vin . In fact,
it is this diode that prevents the op-amp from going into positive Saturation.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 46

R1 RF=R1

1k
D2

11
D1N4002
I2 2

V-
Vin -
AC 1
OUT
3 D3

V+
+
R3 D1N4002

4
1k

Fig: 6.2 : Positive half-wave rectifier

Procedure:

I. Connect the circuit as given in Figure 6.1

II. Give the input to the circuit as shown in Figure 6.1
III. Observe the output waveform and draw in graph paper with proper scale.
IV. Repeat the above all step for circuit shown in Figure 6.2

Output Waveform:

Negative half wave rectifier

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 47

Positive half wave clipper

Conclusion:
After performing this experiment, we can conclude that it is possible to
generate half wave rectifier using OP-AMP.

Also we can conclude that half wave rectifier using OP-AMP with two diode will
give the better result compare to OP-AMP with one diode.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 48

Experiment 12 Date:

AIM: To design integrator circuit using the op-amp and verify it.

Hardware Required:
I. Power supply : Dual variable regulated low voltage DC source
II. Equipments : CRO, DMM (Digital Multi meter)
III. Resistors and capacitors :
IV. Semiconductor : IC741 op-amp
V. Miscellaneous : Bread board and wires

Theory:
A circuit in which the output voltage waveform is the integral of the
input voltage waveform is the integrator or the integrator amplifier. Such a
circuit is obtained by using a basic inverting amplifier configuration if the
feedback resister 𝑅𝐹 is replaced by a capacitor 𝐶𝐹 .

The expression for the output voltage 𝑉𝑜 can be obtained by writing

Kirchhoff’s current equation at node 𝑉2 :
𝑖1 = 𝐼𝐵 + 𝑖𝐹
Since IB is negligibly small,
i1 𝑖1 ≈ 𝑖𝐹
Recall that the relationship between current through and voltage
across the capacitor is
𝑑𝑣𝑐
𝑖𝑐 = 𝐶
𝑑𝑡
Vin −V2 d
Therefore, = 𝐶𝐹 dt (V2 − Vo )
R1

However, 𝑉1 = 𝑉2 ≈ 0 because A is very large. Therefore,

𝑉𝑖𝑛 d
= CF dt (−𝑉𝑜 )
𝑅1

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 ACD LAB MANUAL 49

+Vcc

7
3
+
6
2
-

4
-Vee

R1 CF
RL

Vin

Fig: (6.1): Integrator circuit.

The output voltage can be obtained by integrating both the sides with
respect to time:
t t
Vin d
∫ dt =∫ 𝐶𝐹 (−𝑉𝑜 )dt
R1 dt
0 0
= 𝐶𝐹 (-Vo) + Vo| t = 0

Therefore,

t
1 Vin
Vo =− 𝑅 ∫ dt + C (6.1)
1 CF R1
0

Where C is the integration constant and is proportional to the value of the

output voltage Vo at time t= 0 seconds.

The frequency response of the basic integrator is shown in fig (6.1) .In this
figure, fb is the frequency at which the gain is 0 dB and is given by

1
𝑓𝑏 = (2∏𝑅 (6.2)
1 𝐶𝐹 )

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 ACD LAB MANUAL 50

Both the stability and the low frequency roll off problems can be corrected by the
addition of the resister RF as shown in the practical integrator of fig. (6.3). The term
stability refers to a constant gain as frequency of an input signal is varied over a certain
range. Also, low frequency roll off refers to the rate of decrease in gain at lower
frequencies. The frequency response of the practical integrator is shown in fig. (6.2) by a
dashed line. In this figure ,f is some relative operating frequency , and for frequencies f
to fa to gain RF/R1 is constant .The gain limiting frequency fa is given by ,

1
fa = 2𝜋R (6.3)
F CF

+Vcc

7
Rom=R1
3
+
6 Vo
1k
2
-
4

-Vee

R1 CF

RL

Vin RF

Fig (6.3): Practical integrator.

Generally, the value of fa and in turn 𝑅1 𝐶𝐹 and 𝑅𝐹 𝐶𝐹 values should
be selected such that 𝑓𝑎 < 𝑓𝑏 .For example, if 𝑓𝑎 =𝑓𝑏 /10, then 𝑅𝐹 = 10𝑅1 .In
fact, the input signal will be integrated properly if the time period of the
signal is larger than or equal to𝑅𝐹 𝐶𝐹 . That is,

T ≥ 𝑅𝐹 𝐶𝐹 (6.4)

1
Where, 𝑅𝐹 𝐶𝐹 =2𝜋f
a

The integrator is most commonly used in analog computer and

analog–to–digital (ADC) and signal–wave shaping circuits.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 51

Observation Table:
R1= , CF= , RF=
𝟏 𝟏 T ≥ 𝑹𝑭 𝑪𝑭
𝒇𝒂 = 𝒇𝒃 =
𝟐𝝅𝑹𝑭 𝑪𝑭 𝟐𝝅𝑹𝟏 𝑪𝑭

Procedure:
I. Connect the circuit as given in the fig (6.1).
II. Give the square, triangular and sinusoidal wave as an input to the
circuit as given in the fig (6.1).
III. Calculate the value of fa and fb from equation (6.2) and (6.3)
respectively.
IV. Verify the output waveform for a given input wave.
V. Draw the output waveform with a proper scale in a graph.

Output Waveform:

Square wave as input and we received triangular wave as output.

Conclusion:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 52

After doing this experiment we can conclude that integration of

input waveform is possible with a frequency in between 𝑓𝑎 and 𝑓𝑏 only .Also we
can conclude that time period of input waveform should be greater than or
equal to 𝑅𝐹 𝐶𝐹 time constant.

Experiment 13 Date:

AIM: To Design Differentiator Circuit Using The Op-Amp And Verify It.

Hardware Requirements:
i. Power supply : Dual variable regulated low voltage DC source
ii. Equipments : CRO, DMM (Digital Multi meter)
iii. Resistors

iv. Semiconductor : IC741 op-amp

v. Miscellaneous : Bread board and wires

Theory:
The differentiator or differentiation amplifier. As its name implies,
the circuit performs the mathematical operation of differentiation; that is, the
output waveform is the derivative of the the input waveform. The
differentiator may be constructed from a basic inverting amplifier if an input
resistor R1 is replaced by a capacitor C1.
The expression for the output voltage can be obtained from
Kirchhoff’s current equation written at the node V2 as follows:

iC=iV+iF

Since IB≈0,
iC =iF
C1d/dt(Vin-V2)=(V2-V1)/RF

But V1=V2= 0 V, because A is very large. Therefore

C1d(Vin)/dt = -Vo/RF
Or

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 ACD LAB MANUAL 53

Vo=-R1C1(dVin/dt) (8.1)
C1 RF

11
2

V-
Vin -
AC 1
OUT
3 RL

V+
+
ROM

4
Fig: 8.1 : Basic differentiator

CF

R1 C1 RF 11

Vin 2
V-

-
AC
1
OUT
3 RL
V+

+
ROM
4

Fig: 8.2 : Practical differentiator

Thus the input Vo is equal to 𝑅𝐹 𝐶1 times the negative instantaneous rate of

change of the input voltage Vin with time .since the differentiator performs the reverse of
the integrator’s function a cosine wave will produce a sine wave output ,or a triangular
input will produce square wave output. However, the differentiator of figure: 8.1 will not
do this because it has some practical problems. The gain of the circuit (RF/XC1) increases
with increase in frequency at the rate of 20db/decade. This makes the unstable. Also the
input impedance XC1 decrease with increase in frequency which makes the circuit vary
susceptible to high frequency noise. When amplified this noise can completely overwrite

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 54

the differentiated output signal. The frequency response of basic differentiator is shown
in figure: 8.2. In this figure fa is the frequency at which the gain is 0dB and is given by

fa = 1/2ΠRFC1 (8.2)

Also fc is the unity gain bandwidth of the op-amp and f is some relative
operating frequency.

Both the stability and the high frequency noise problem can be corrected by the
addition of two components R1 and CF shown in the figure: 8.1. This circuit is practical
differentiator the frequency response of which is shown in figure: 8.3 by dashed line.
From frequency f to fb the gain increase is 20db/decade. However after fb the gain
decrease at 20db/decade. This 40db/decade change in the gain caused by the R 1C1 and
RFCF combinations. The gain limiting frequency fb given by

fb=1/2ΠR1C1 (8.3)

Where R1C1 = RFCF. Thus R1C1 and RFCF has to reduce significantly the
effect of high frequency input amplifier noise and offsets. Above all R 1C1 and RFCF
make the more stable by preventing the increase in the gain with frequency. Generally
the value of fb and the in turn R1C1 and RFCF value should be selected such that

fa <fb <fc (8.4)

fa=1/2ΠRFC1

fb=1/2π RFCF

fc=unity gain bandwidth

The input signal will be differentiated properly if the time period T of the
input signal is larger than or equal to 𝑅𝐹 𝐶1 that is.

T≥ 𝑅𝐹 𝐶1

Observation Table:
R1= , CF= , RF=
𝟏 𝟏 T ≥ 𝑹𝑭 𝑪𝑭
𝐟𝐚 = 𝐟𝐛 =
𝟐𝝅𝐑 𝐅 𝐂𝐅 𝟐𝝅𝐑 𝟏 𝐂𝐅

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 ACD LAB MANUAL 55

Procedure:
VI. Connect the circuit as given in the fig (8.2).
VII. Give the square, triangular and sinusoidal waveform as an input to
the circuit as given in the fig (8.2).
VIII. Calculate the value of fa and fb from equation (8.2) and (8.3)
respectively.
IX. Verify the output waveform for a given input waveform.
X. Draw the output waveform with a proper scale in a graph.

Output Waveform:

Triangular waveform as input and square waveform as output.

Conclusion:
After doing this experiment we can conclude that the differentiation of
input wave form is possible using differentiator circuit using op-amp.
Also for proper differentiation frequency of input waveform not less than
𝑓𝑎 and also not more than𝑓𝑏 .
Also we can conclude that time period of wave form should be greater than
or equal to 𝑅𝐹 𝐶1 time constant.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 56

Experiment 14 Date:

AIM: To Study Astable Multivibrator Using 741 Op-Amp

Hardware Requirement:
I. Power supply : Dual variable regulated low voltage DC source
II. Equipments : CRO, DMM (Digital Multimeter)
III. Resistors :10k,20k(potentiometer)
IV. Semiconductor : IC741 op-amp
V. Capacitors:0.05uF
VI. Miscellaneous : Bread board and wires

Theory:
Square Wave Generator :
The square wave generator is also called free running or astable
multivibrator. The output of the op-amp in the circuit will be positive to negative
saturation, depending on whether the differential voltage V id is negative or positive
respectively.

Assume that the voltage across capacitor C is 0 volts at the instant the dc
supply voltage +VCC and –VEE are applied, this means that the voltage across the
inverting terminal is zero initially. At the same instant however the voltage V 1 at the
noninverting terminal is a very small finite value that is a function of the output offset
voltage VOOT and the values of the resistors R1 and R2. Thus the differential input
voltage VID is equal to the voltage V1 at the non-inverting terminal. Although very
small, voltage V1 will start to drive the op-amp in to saturation. For example, suppose
that the output offset VOOT is positive and that, therefore, voltage V1 is also positive.
Since initially the capacitor C acts as short circuit ,the gain of op-amp is very
large(A),hence V1 drives the output of the opamp to its positive saturation +Vsat .With
the output voltage of the op-amp at +Vsat; the capacitor starts charging towards +Vsat
through resistor R.However, as soon as the voltage V2 across capacitor C is slightly
more positive than V1,the output of the op-amp is forced to switch a negative
saturation,-Vsat.With the op-amp’s output voltage at negative saturation,-Vsat,the
voltage V1 across R1 is also negative, since

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 57

V1=R1*(-Vsat)/(R1+R2) (9.1)

C R

.05uF 10k

11
2

V-
-
1
R1 OUT
3

V+
+
10k

4
R2
1 2

11.6k(20k pot)

Fig: 9.1: Square wave generator

Thus the net differential voltage Vid=V1-V2 is negative, which holds the output of
the op-amp in negative saturation. The output remains in negative saturation until
the capacitor C discharges and then recharges to a negative voltage slightly higher
than –V1.Now,as soon as the capacitor’s voltage V2 becomes more negative then –
V1, the net differential voltage Vid becomes positive and hence drives the output
of the op-amp back to its positive saturation +Vsat.This completes one cycle. With
output at +Vsat, voltage V1 at the noninverting input is

V1=R1(+Vsat)/(R1+R2) (9.2)

The time period T of the output waveform is given by

T=2RC*ln((2R1+R2)/R2) (9.3)

Or

fo=1/(2RC*ln((2R1+R2)/R2) (9.4)

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 58

This equation indicate that the frequency of the output fo is not only the function
of RC time constant but also of the relationship between R1 and R2.For example if
R2=1.16R1 equation becomes

fo=1/(2RC) (9.5)

NO. Output Time period Frequency Voltage across

voltage of output T of output f0 capacitor V1 (V)
value Vsat (ms) (KHz)
(V)

Th P Th P Th P Th P

Procedure:
I. Connect circuit as given in the fig: 4.1.
II. Give the positive trigger voltage to non-inverting terminal of op-amp
III. Observe the output waveform and voltage waveform across capacitor
IV. Note the value of V1, T, f0 and output voltage amplitude.
V. Draw the waveform with proper scale.

Conclusion:

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 59

Experiment 15 Date:

AIM: To design monostable multi-vibrators using 555 timer IC and verify their
operation using measurements.

Hardware Requirement:
I. Power supply : Regulated low voltage DC source
II. Equipments : CRO, DMM (Digital Multimeter)
III. Resistors and capacitors :10k , 0.1𝛍F

IV. Semiconductor : 555 Timer IC

V. Miscellaneous : Bread board and wires

Theory:

Fig: 1: Pin Diagram

• Pin 1:Ground:
– All voltages are measured with respect to this terminal
• Pin 2:Trigger:
– Output of timer depends on amplitude of external trigger pulse applied to
this pin
– Output is low if voltage at this pin is greater than 2/3VCC
E.C. DEP. L.D.C.E.
 ACD LAB MANUAL 60

– When negative going pulse of amplitude larger than 1/3 Vcc is applied to
this pin,comparator-2 output goes low, which in turn switches output of
timer high
– Output remains high as long as trigger terminal is held at low voltage
• Pin 3: output :
– Load connected between pin 3 and ground (pin 1) or between pin 3 and
supply voltage +Vcc(pin 8)
– When output is low, load current flows through load connected between
pin3 and +Vcc into output terminal and is called sink current
– However current through grounded load is zero when output is low
– So, load connected between pin 3 and +Vcc is called normally on load and
that connected between pin 3 and ground is called normally off load
– On other hand, when output is high, current through load connected
between pin 3 and +Vcc (normally on load ) is zero
– However output terminal supplies current to normally off load, called
source current.
• Pin 4: Reset:
– 555 timer can be reset(disable) by applying negative pulse to this pin
– When reset function is not in use, reset terminal should be connected to
+Vcc to avoid any possibility of false triggering
• Pin 5 : Control voltage :
– An external voltage applied to this terminal changes threshold as well as
trigger voltage
– By imposing voltage on this pin or by connecting pot between this pin and
ground, pulse width of output waveform can be varied
– When not used, control pin should be bypassed to ground with 0.01uF
capacitor to prevent any noise problems
• Pin 6 : Threshold :
– This is noninverting input terminal of comparator-1,which monitors
voltage across external capacitor

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 ACD LAB MANUAL 61

– When voltage at this pin is ≥ threshold voltage 2/3 Vcc, output of

comparator 1 goes high, which in turn switches o/p of timer low
• Pin 7 : Discharge :
– This pin is connected internally to collector of transistor Q1
– When output is high, Q1 is off and acts as open circuit to external capacitor
C connected across it
– On the other hand, when output is low, Q 1 is saturated and act as short
circuit , shorting out external capacitor C to ground
• Pin 8 : +Vcc :
– Supply voltage of +5v to +18v is applied to this pin with respect to
ground(pin 1)
• Application:
– Monostable and Astable multivibrators
– Dc-Dc converters
– Digital logic probes
– Waveform generators
– Analog frequency meters
– Burglar and toxic gas alarms
– Voltage regulators
– Electric eyes
Also called as one shot-multivibrator. Pulse generating circuit in which duration
of pulse is determined by RC network connected externally to 555 timer. At
standby state output of circuit is approximately zero or at logic-low level. When
external trigger pulse is applied output is forced to go high (≈VCC). Time the
output remains high is determined by external RC network connected to timer. At
end of timing interval, output automatically revert back to its logic low stable state
output stay low until trigger pulse again applied. Then cycle repeats. Monostable
circuit has only one stable state (output low), hence name is monostable. Belove
figures shows 555 configured for monostable operation.

E.C. DEP. L.D.C.E.

 ACD LAB MANUAL 62

Fig: 2: (a) Circuit diagram (b) Block diagram (c) Waveforms

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 ACD LAB MANUAL 63

When output is low, transistor Q1 is on and capacitor C is shorted out to ground.

Upon application of negative trigger pulse to pin-2, transistor Q1 is turnoff, which
release short circuit across external capacitor C and drives output high. C now
starts charging towards Vcc through RA.When voltage across capacitor equals 2/3
Vcc, comparator’s output switches from low to high, which in turn drives output
to its low state via output of flip-flop. At same time, output of flip-flop turns
transistor Q1 on, and capacitor C rapidly discharges through transistor. Output
remains low until trigger pulse is again applied. Than cycle repeats. Pulse width
of trigger input must be smaller than expected pulse width of output waveform.
Also trigger pulse must be negative going input signal with amplitude larger than
1/3Vcc. Time during which output remains high is given by
Tp=1.1RC (8.1)
Belove graph shows various combinations of RA and C necessary to
produce desired time delays. Output will not change its state even if input trigger
is applied again during this time interval Tp. Circuit can be reset during timing
cycle by applying negative pulse to reset terminal.

• Frequency Divider: To use constable multivibrator as a divide-by-2 circuit, timing

interval Tp must be slightly larger than time period T of trigger input signal as
shown in fig.

Fig: 3: 555 Timer as monostable multivibrator used as frequency divider

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 ACD LAB MANUAL 64

• Pulse Stretcher:
Output pulse width of constable multivibrator can be viewed as stretched version
of narrow input pulse. It is used to drive LED.

Fig: 4: 555 Timer as monostable multivibrator used as pulse stretcher

Observation Table:
Output voltage Voltage across Rise time
V capacitor Tp
Vc
Theoretical Practical Theoretical Practical Theoretical Practical

Procedure:
I. Connect the circuit as shown in figure
II. Give the trigger at pin no. 2
III. Observe the output wave from pin no. 3
IV. Also observe output waveform from pin no.7
V. Draw the waveforms in graph with proper scale

Conclusion:

E.C. DEP. L.D.C.E.