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Design_and_performance_analysis_of_2.4_GHz_power_amplifier_for_wireless_sensor_network

The document presents a design and performance analysis of a 2.4 GHz power amplifier using GaAs PHEMT technology for wireless sensor networks. The proposed amplifier achieves significant performance metrics, including an input return loss of -13.768 dB, output return loss of -12.754 dB, and a power gain of 34.091 dBm, with a power added efficiency of 42.184 dBm. The design methodology and simulation results indicate its suitability for various wireless communication applications.

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0% found this document useful (0 votes)
1 views

Design_and_performance_analysis_of_2.4_GHz_power_amplifier_for_wireless_sensor_network

The document presents a design and performance analysis of a 2.4 GHz power amplifier using GaAs PHEMT technology for wireless sensor networks. The proposed amplifier achieves significant performance metrics, including an input return loss of -13.768 dB, output return loss of -12.754 dB, and a power gain of 34.091 dBm, with a power added efficiency of 42.184 dBm. The design methodology and simulation results indicate its suitability for various wireless communication applications.

Uploaded by

Sampath Sam
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© © All Rights Reserved
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Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)

IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

Design and Performance Analysis of 2.4 GHz Power


Amplifier for Wireless Sensor Network
Prof. Vaibhav S. Girnale Prof. Harshavardhan B. Patil
EXTC Department EXTC Department
STC, SERT, Shegaon STC, SERT, Shegaon
[email protected] [email protected]

Abstract— Power Amplifier is one of the essential I. INTRODUCTION


component of WSN Transceiver. The main function of
Wireless sensor network is one of the special type of
power amplifier is increase the power level of input signal
network consist of number of sensors to observe the
in specially defined range. This paper present 2.4 GHz
environmental, physical conditions on the earth. The size of each
power amplifier using 0.5um GaAs PHEMT technology.
sensor is different. Increasing growth in radio frequency
For designing of proposed power amplifier advanced
applications has resulted into increasing demand of wireless
design system (ADS) tool is used. The proposed power
sensor networks devices such as receiver, transmitter,
amplifier consists of two stage as driver stage and power
transceiver. These devices are used in various short range to long
stage. This proposed power amplifier shows at 3.3V, input
range communication applications. Wireless sensor network
return loss is -13.768 dB and output return loss is -12.754
having great importance in industrial and military applications.
dB respectively. Gain or forward transmission coefficient
and isolation loss or reverse transmission coefficient of Power amplifier is one of the main component of transceiver
proposed power amplifier are 34.478 dB and -64.224 dB which plays an important role in Wireless sensor network.
respectively. The output power and power added efficiency Among all building blocks of transceiver power amplifier
of proposed power amplifier is 22.53dBm and 42.18 dBm contributes more power. The main role of power amplifier is to
respectively. The power gain of proposed power amplifier improve the power level of input signals. Power amplifier plays
is 34.091 dBm. Also for layout designing of proposed an important role in realization of many microwave systems.
power amplifier advanced design system software (ADS) is Power amplifier is used in many wireless communication
used. This PHEMT power amplifier is design for wireless applications like Bluetooth, wireless local area network. For
sensor network based applications. designing and fabrication of power amplifier various techniques
are implemented such as GaAs, GaN, CMOS, PHEMT. GaAs
Keywords—Gallium arsenide (GaAs), Two stage power
and GaN technologies are generally used for very high
amplifier, RFIC, advance design system (ADS), VLSI
frequency applications as compared with CMOS technology but
power dissipation is also high. The speed of GaAs, GaN
technology is higher as compared with other technology.
Pseudomorphic high electron mobility transistor (PHEMT)
GaAs technology having higher operating speed and high

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efficiency. For designing of proposed power amplifier o.5 um changes in the value of current. By connecting the resistor in
pseudomorphic high electron mobility transistor (PHEMT) between drain and gate the transistor M1 is in saturation.
technology is implemented.
Matching network are main parts of the radio frequency
For improving the performance of proposed power integrated circuit. The input matching network and output
amplifier voltage divider biasing technique is implement. matching networks are connected at input and output side
Voltage divider biasing technique is a universal biasing respectively to minimize the return losses in power amplifier. If
technique and it is easily implemented. Advance design system the losses are minimum then it is considered as circuit is properly
(ADS) tool is used for designing of proposed two stage power working.
amplifier. Wireless sensor network having great importance in
The main role of power stage is power amplification of
home automation applications and also in wireless
overall circuit. The size of transistors used in the power stage is A
communication applications.
big inductor is connected in between dc supply and drain of the
II. DESIGN METHODOLOGY large as compared to driver stage of power amplifier. This
inductor controls the flow of currents through the transistor M2. A
The design methodology of proposed two stage power
supply voltage of 3.3V is required for GaAs technology.
amplifier is shown in figure 2. The proposed two stage power
Designing of bias circuit is first step for proposed power amplifier.
amplifier consist of five stages as driver stage, input matching
The schematic of the bias circuit for GaAs PHEMT power
network, output matching network, intermediate biasing network
amplifier is shown in fig 2.
and power stage. Voltage divide biasing technique is implemented
in both driver and power stage of proposed power amplifier.

Fig 2: Bias circuit for two stage GaAs power amplifier.


Fig 1: proposed block diagram of GaAs power amplifier.
Driver stage and power stage is connected using
Driver stage is the first stage of two stages of power
intermediate biasing network. The output of the driver stage is
amplifier. The main role of driver stage is to drive the input
connected to the gate of the transistor M2 of power stage through
signals. The gate length of the driver transistor is fixed and the
the capacitor. Before applying input and output matching network
value of width of transistor is varied. The output power of driver
input and output sides are terminated by 50 ohm resistance in
stage is less as compared with power stage of proposed power
ADS tool. The complete schematic of two stage GaAs power
amplifier. An inductor of a large value is connected between the
amplifier is shown in fig 3.
drain of M1 and supply voltage Vdd. This inductor opposes the

364
Authorized licensed use limited to: Amrita School of Engineering. Downloaded on September 03,2024 at 11:33:41 UTC from IEEE Xplore. Restrictions apply.
Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

Fig 3 : Schematic of owo stage GaAs PHEMT power amplifier

III. SIMULATION RESULTS OF POWER AMPLIFIER connect 50 ohm resistor at input side and output side. These four
S- parameters are S (1,1) input return loss, S (2,2) output return
There are different types of simulation techniques are
loss, S (2,1) gain or forward transmission coefficient, S (1,2)
carried out for proposed two stage power amplifier like S
reverse transmission coefficient or isolation loss.
parameter simulation, DC simulation, AC simulation, Harmonic
Balance (HB) simulation. Input return loss or S (1,1) is nothing but the amount of
power is reflect back at the input side. The proposed power
A) S- parameter simulation:-
amplifier shows the input return loss of – 13.768 dBm as shown

S- parameters are important part of power amplifier. in figure 4.

After designing of power amplifier there are four main S-


Output return loss or S (2,2) is nothing but the amount
parameters are observed. S –parameter simulation is one of the
of power is reflected back at the output side. The proposed two
part of small signal AC simulation. For S- parameter simulation

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 365


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Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

stage power amplifier shows the output return loss of - 12.754


dB as shown in figure 5.

Fig 6: S (1,2) or gain of two stage power amplifier

S (2,1) or gain of two stage power amplifier is also


called as forward transmission coefficient. S (2,1) or gain of
proposed two stage power amplifier is 34.478 Db as shown in
Fig 4: S (1,1) input return loss of two stage power amplifier
figure 6. S (1, 2) or isolation loss of two stage power amplifier
is -64.224 Db as shown in figure 7. Stability factor of proposed
two stage power amplifier is 12.028 as shown in figure 8.

Fig 5 : S (2,2) output return loss of two stage power amplifier

Fig 7: S (1, 2) or isolation loss of two stage power amplifier

B) Harmonic Balance or HB analysis

HB simulation is a frequency domain analysis


technique which is used for simulating distortion in circuits.

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 366


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Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

After S- parameter analysis harmonic balance analysis is and input power to total dc power. Normally output power
important mainly in case of power amplifier designs. Harmonic and power added efficiency is calculated with respect to one
balance analysis is done for getting output power and power dBm input power. The power added efficiency of proposed
added efficiency. The graph of gain and input power is shown in two stage power amplifier is 42.184 dBm as shown in figure
figure 9. The graph of output power of two stage power 11.
amplifier with respect to input power is shown in figure 10. The
output power of proposed two stage power amplifier is
22.53dBm with respect to 1 dBm input power.

Fig 11 : Power added efficiency of power amplifier

IV. LAYOUT OF POWER AMPLIFIER

Advance Design System tool is used for design of


proposed two stage PHEMT GaAs power amplifier. Triquint
semiconductor invented tqped 0.5 um foundry for layout
Fig 9: Gain Vs input power of two stage power amplifier designing, which is implemented for proposed design of two
stage power amplifier.

Fig 10 : Output power Vs input power of power amplifier

Power added efficiency (PAE) of two stage power Fig 12: Layout of two stage PHEMT GaAs power amplifier.

amplifier is defined as ratio of difference in output power

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Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

V. CONCLUSION VI. REFERENCES

A 2.4 GHz two stage power amplifier using GaAs [1] G.Monprasert, P. Suebsombut , T Pongthavornkamol,
Pseudomrphic High Electron Mobility Transistor (PHEMT) S. Chalermwisutkul, “2.45 GHz GaN HEMT Class-AB RF
is presented. Simulation results of proposed power Power Amplifier Design for Wireless Communication
amplifier shows at 3.3V supply voltage, input return loss, Systems”.
output return loss are -13.768 dB and -12.754 dB
respectively. Small signal gain or forward transmission [2] Yongbing Qian, Wenyuan Li, Zhigong, “ 2.4-GHz
coefficient and isolation loss of proposed power amplifier 0.18-μm CMOS Highly Linear Power Amplifier”,
are 34.478 dB and -64.224Db respectively. This two stage Institute of RF- & OE-ICs, Southeast university, 210096
power amplifier achieves stability factor of 12.038. The Nanjing China, the 2010 International Conference on
power gain of proposed power amplifier is 34.091dBm. At 1 Advanced Technologies for Communications 2010 IEEE.
dB input power, the output power of proposed two stage
[3] Ravinder Kumar, Munish Kumar, Balraj, “Design and
power amplifier is 22. 539 dBm and power added efficiency
Implementation of a High Efficiency CMOS Power
ie 42.184 dBm respectively. The specifications of proposed
Amplifier for Wireless Communication at 2.45 GHz”,
two stage power amplifier are shown in table 1. This
2012 International Conference on Communication Systems
proposed two stage PHEMT GaAs power amplifier is
and Network Technologies, 2012 IEEE.
suitable for various wireless sensor network applications.
[4] Wenyuan Li, Yulong Tan, “ 2.4GHz Power Amplifier
with Adaptive Bias Circuit”, Institute of RF- & OE-ICs
Table 1: Specifications of proposed power amplifier Southeast University Nanjing, China, Institute of RF- &
OE-ICs Southeast University Nanjing, China, 2012
Parameters Value International Conference on Systems and Informatics
(ICSAI 2012), 2012 IEEE.
Operating Voltage 3.3 V
[5] Amiza Rasmi, A. Marzuki, M. Azmi Ismail, “Two-
0.50 μm RF PHEMT Stage MMIC Medium Power Amplifier using Depletion
Technology Mode PHEMT for 5.8GHz Applications”, 2013IEEE.
GaAs process

Operating Frequency 2.4 GHz ISM Band [6] Chien-Cheng Lin, Yu-Cheng Hsu, “Single-chip Dual-
band WLAN Power Amplifier using InGaP/GaAs HBT”.
S (1,1) Input Return Loss -13.768 dB
[7] Roberto Quaglia, Vittorio Camarchia, Tao Jiang , “K-
Band GaAs MMIC Doherty Power Amplifier for Microwave
S (2,2) Output Return Loss -12.754dB
Radio With Optimized Driver”, 2014 IEEE.
S (2,1) Gain 34.478dB [8] Cheng –chi Yen, Huey Ru Chuang, “A 0.25um 20-
dBm 2.4-GHz CMOS Power Amplifier With an Integrated
S (1,2) Isolation Loss -64.224 dB Diode Linearizer”, microwave and wireless components
letters, vol. 13, no.2, February 2003, 2003 IEEE.
Pout (1dB) Output Power 22.539 dBm
[9] K. W. Ho, H. C. Loung, “A 1-V CMOS Power
Power Gain 34.091 dB Amplifier for Bluetooth Applications”, 2002 IEEE.

Total DC Current 0.679 A [10] Thomas H. Lee, “The Design of CMOS Radio
Frequency Integrated Circuits”, Second Edition, Cambridge
PAE (1dB) Power Added University.
Efficiency at 1dB compression 42.184 %
point

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