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ESC201 Assignment 11 Solution_cfd23ba6-9321-40b1-9add-f39610a18e21

The document outlines the design of a 4-bit adder using combinatorial and sequential circuits, detailing the use of full adders and D flip-flops. It includes tasks such as sketching output waveforms, analyzing flip-flop operations, and creating state transition diagrams for various sequential circuits. Additionally, it describes the design of a synchronous counter with a specified repeating sequence.

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5 views

ESC201 Assignment 11 Solution_cfd23ba6-9321-40b1-9add-f39610a18e21

The document outlines the design of a 4-bit adder using combinatorial and sequential circuits, detailing the use of full adders and D flip-flops. It includes tasks such as sketching output waveforms, analyzing flip-flop operations, and creating state transition diagrams for various sequential circuits. Additionally, it describes the design of a synchronous counter with a specified repeating sequence.

Uploaded by

vaibhavgupta9126
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Questions

1. Consider the objective of designing a 4 bit adder. Show a combinatorics circuit which can add two 4
bit numbers with the help of multiple single bit full adders. Now, let us design a sequential circuit
with the help of only one single bit adder and D FFs.

Solution

combinatorics circuit
S3 S2 S1

C4 C3 C2 C1 0
FA FA FA FA

A3 B3 A2 B2 A1 B1 A0 B0

Sequential Circuit

4 times faster clock signal


D Q

clk
C4
C
A
FA
S
B

S3 S2 S1 S0

A3 A2 A1 A0

B3 B2 B1 B0 Serial-to-parallel shift register

parallel-to-serial shift register

2. The waveform of the clock as shown below excites the circuit shown. Sketch the output
waveform.
Solution

3. If initially Q0 = Q1 = 0, find the logic states of Q0 and Q1 immediately after 777th clock pulse.
4. A PN flip-flop has four operations, reset to 0, hold, complement and set to 1 when inputs PN are
00,01,10,11 respectively. Tabulate the characteristic table, excitation table and show how the PN FF
can be converted to a D FF.
5. A sequential circuit with two flip-flops A and B, two inputs x, y and a output z has the
following behavior:
A(t +1) = x.y + x.B;
B(t +1) = x.A + x.B;
z=A
Draw the logic diagram of the circuit, list the state table and draw the state transition graph.
6. Design a sequential circuit with two D flip-flops A and B and one input x such that when x = 0, the
state of the circuit remains the same. When x = 1, the circuit goes through the state transitions from
00 to 01, to 11, to 10 and back to 00, and repeats.
7. Design a synchronous counter that goes through the following repeating sequence 0, 2, 1, 4, 3,6,5,7.

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