Most ICs are made of silicon

Therefore, SiO2 acts as an insulating component for integrated circuits

Common wafer sizes range from 100-450 mm in diameter
VLSI is Very Large Scale Integration

Pentavalent impurities such as phosphorus (P), arsenic (As), antimony

(Sb), etc are called donor impurity.
Trivalent impurities such as Boron (B), Gallium (G), Indium (In), Aluminum (Al), etc are called
acceptor impurity

Integrated Circuit (IC) Fabrication: Etching is used to create patterns in the

silicon wafer during the fabrication of ICs. It helps define features such as
transistors, interconnects, and contact holes, allowing for the precise
arrangement of components on the chip.
Etching is used in IC fabrication to remove unwanted materials and leave a required pattern.
There are two main types: wet etching uses liquid chemicals, while plasma etching uses ion
bombardment in a plasma. Plasma etching is faster, easier, and more directional than wet
etching. It allows for anisotropic etching profiles with better resolution, cleanliness and process
control compared to isotropic wet etching.
 Diffusion is the oldest technique used to add impurity into the Substrate.
The main aim of the Diffusion Process in IC Fabrication is to change the
Conductivity of silicon substrate over a depth. The Diffusion Process in IC
Fabrication is used in bipolar device technology to form bases, emitters,
collectors ; while in MOS device technology to form source and drain
region.
lectron-beam lithography (EBL) uses a focused electron beam to create custom
shapes on a surface. The surface is covered with an electron-sensitive film called a
resist. The electron beam alters the solubility of the resist. This allows for the
selective removal of exposed or unexposed regions using a solvent. The main goal is
to create tiny structures in the resistance. These structures can then be transferred
to the substrate, often through etching.

What Is Moore's Law?

Moore's Law states that the number of components on a single chip doubles every
two years at minimal cost

What is Wafer Preparation in Integrated Circuit

(IC) Fabrication?
The most common method for silicon wafer preparation involves preparing a single
crystal seed and dipping it into molten silicon. Once in the liquid, the seed is pulled from
the molten silicon slowly, while the rod rotates.


 Wafer Fabrication:Doping techniques

Definition
Doping means the introduction of impurities into the semiconductor crystal to change its
conductivity due to deficiency or excess of electrons.

In contrast to the doping during the wafer fabrication, where the entire wafer is doped,

Diffusion

Molecular diffusion, often called simply diffusion, is a net transport of molecules from a region of
higher concentration to one of lower concentration by random molecular motion. The result of
diffusion is a gradual mixing of materials. To illustrate: a drop of ink in a glass of water is evenly
distributed after a certain amount of time. In a silicon crystal, one finds a solid lattice of atoms
through which the dopant has to move. This can be done in different ways:
 empty space diffusion: the impurity atoms can fill empty places in the crystal lattice which
are always present, even in perfect single crystals
 inter lattice diffusion: the impurity atoms move in-between the silicon atoms in the crystal
lattice.
 changing of places: the impurity atoms are located in the crystal lattice and are
exchanged with the silicon atoms.

The dopant can diffuse as long as either a concentration gradient is balanced, or the
temperature was lowered, so that the atoms can no longer move. The speed of the diffusion
process depends on several factors:
 dopant
 concentration gradient
 temperature
 substrate
 crystallographic orientation of the substrate
Diffusion with an exhaustible source
Diffusion with an exhaustible source means that the dopant is available in a limited amount
only. The longer the diffusion process continues, the lower the concentration at the surface, and
therefore the depth of penetration into the substrate increases. The diffusion coefficient of a
substance indicates how fast it moves in the crystal. Arsenic with a low diffusion coefficient
penetrates slower into the substrate, as for example phosphorus or boron.
Diffusion with an inexhaustible source
In diffusion processes with an inexhaustible source the dopants are available in unlimited
amount, and therefore the concentration at the surface remains constant during the process.
Particles that have penetrated into the substrate are continually replenished.

Diffusion methods
In the subsequent processes the wafers are placed in a quartz tube that is heated to a certain
temperature.
Diffusion from the gas phase
A carrier gas (nitrogen, argon, ...) is enriched with the desired dopant (also in gaseous form,
e.g. phosphine PH3 or diborane B2H6) and led to the silicon wafers, on which the concentration
balance can take place.
Diffusion with solid source
Slices which contain the dopants are placed in-between the wafers. If the temperature in the
quartz tube is increased, the dopant from the source discs diffuses into the atmosphere. With a
carrier gas, the dopant will be distributed uniformly, and thus reaches the surface of the wafers.
Diffusion with liquid source
As liquid sources boron bromide BBr3 or phosphoryl chloride POCl3 can be used. A carrier gas
is led through the liquids and thus transporting the dopant in gaseous state. Since not the entire
wafers should be doped, certain areas can be masked with silicon dioxide. The dopants can not
penetrate through the oxide, and therefore no doping takes place at these locations. To avoid
tensions or even fractions of the discs, the quartz tube is gradually heated (e.g. +10 °C per
minute) till 900 °C. Subsequent the dopant is led to the wafers. To set the diffusion process in
motion, the temperature is then increased up to 1200 °C.
Characteristic:

 since many wafers can be processed simultaneously, this method is quite favorable
 if there already are dopants in the silicon crystal, they can diffuse out in later processes due
to high process temperatures
 dopants can deposit in the quartz tube, and be transported to the wafers in later processes
 dopants in the crystal are spreading not only in perpendicular orientation but also laterally,
so that the doped area is enlarged in a unwanted manner
Ion implantation
In the ion implantation charged dopants (ions) are accelerated in an electric field and irradiated
onto the wafer. The penetration depth can be set very precisely by reducing or increasing the
voltage needed to accelerate the ions. Since the process takes place at room temperature,
previously added dopants can not diffuse out. Regions that should not be doped, can be
covered with a masking photoresist layer.

An implanter consists of the following components:

 ion source: the dopants in gaseous state (e.g. boron trifluoride BF3) are ionized
 accelerator: the ions are drawn with approximately 30 kiloelectron volts out of the ion
source
 mass separation: the charged particles are deflected by a magnetic field by 90 degrees.
Too light/heavy particles are deflected more/less than the desired ions and trapped with
screens behind the separator
 acceleration lane: several 100 keV accelerate the particles to their final velocity (200 keV
accelerate bor ions up to 2.000.000 m/s)
 Lenses: lenses are distributed inside the entire system to focus the ion beam
 distraction: the ions are deflected with electrical fields to irradiate the desired location
 wafer station: the wafers are placed on large rotating wheels and held into the ion beam
Illustration of an ion implanter

Penetration depth of ions in the wafer

In contrast to diffusion processes the particles do not penetrate into the crystal due to their own
movement, but because of their high velocity. Inside the crystal they are slowed down by
collisions with silicon atoms. The impact causes damage to the lattice since silicon atoms are
knocked from their sites, the dopants themselves are mostly placed interstitial. There, they are
not electrically active, because there are no bonds with other atoms which may give rise to free
charge carriers. The displaced silicon atoms must be re-installed into the crystal lattice, and the
electrically inactive dopants must be activated.
Recovery the crystal lattice and activation of dopants
Right after the implantation process, only about 5 % of the dopants are bond in the lattice. In a
high temperature process at about 1000 °C, the dopants move on lattice sites. The lattice
damage caused by the collisions have already been cured at about 500 °C. Since the dopants
move inside the crystal during high temperature processes, these steps are carried out only for
a very short time.
Channeling
The substrate is present as a single crystal, and thus the silicon atoms are regularly arranged
and form "channels". The dopant atoms injected via ion implantation can move parallel to these
channels and are slowed only slightly, and therefore penetrate very deeply into the substrate.
To prevent this, there are several possibilities:
 wafer alignment: the wafers are deflected by about 7° with respect to the ion beam. Thus
the radiation is not in parallel direction to the channels and the ions are decelerated by
collisions immediately.
 scattering: on top of the wafer surface a thin oxide is applied, which deflects the ions, and
therefore prevents a parallel arival

Characteristic:
 the reproducibility of ion implantation is very high
 the process at room temperature prevents the outward diffusion of other dopants
 spin coated photoresist as a mask is sufficient, an oxide layer, as it is used in diffusion
processes, is not necessary
 ion implanters are very expensive, the costs per wafer are relatively high
 the dopants do not spread laterally under the mask (only minimally due to collisions)
 nearly every element can be implanted in highest purity
 previous used dopants can deposit on walls or screens inside the implanter and later be
carried to the wafer
 three-dimensional structures (e.g. trenches) can not be doped by ion implantation
 the implantation process takes place under high vacuum, which must be produced with
several vacuum pumps
There are several types of implanters for small to medium doses of ions (1011 to 1015 ions/cm2)
or for even higher doses of 1015 to 1017 ions/cm2.

The ion implantation has replaced the diffusion mostly due to its advantages.
Doping using Alloy
For completeness it should be mentioned that besides ion implanation and diffusion there is an
alternative process: doping using alloy. Since this procedure, however, brings disadvantages
with it such as cracks in the substrate, it is not used in today's semiconductor technology any
more.

Ion implantation
Ion implantation is a doping method used in semiconductors that introduces impurities into a
semiconductor wafer, enabling conductivity. This process offers advantages over other doping
methods as it allows for optimal precision and control, helping to avoid damage.

Ion Implantation Process in IC Fabrication:

As we know, the conductivity of the semiconductor increases when small impurity is added to it. The
process of adding impurity is called doping while the impurity to be added is called dopant.
So ion implantation is a process of adding dopant to the silicon substrate. The ion implantation
process is controllable, reproducible and also there are no unwanted side effects.

The ion implantation process is prefered over diffusion because of following reasons.

 the impurity concentration is highly uniform typically within 1%, over the wafer,
 the degree of uniformity is maintained same from wafer to wafer,
 the layer can be formed any-where within substrate,
 the lateral spread is very small.

Basically the ion implantation process is low temperature process. In this process, the dopant atoms
are vaporised. They are accelerated by an accelerator and then bombarded on silicon substrate.
The entire wafer or selected part of it, is exposed to the beam of vaporized, accelerated dopant
atoms. The beam injects the dopant atoms into unmasked sections of the substrate. The depant
atoms directly enter the crystal lattice of the silicon. In the lattice, due to the collisions with silicon
atoms the dopant atoms starts loosing energy. When the energy is totally lost, the dopant atoms are
found at some depth within the lattice itself. The depth of penetrations is controlled by the
acceleration energy of the incident beam and the doping concentration. In general, the ion
implantation is made through thin oxide, as compared to masking which is made through thicker
layer of oxide.

The main objective of the basic Ion Implantation Process is to direct a beam of dopant atoms with
the appropriate acceleration and energy to the silicon substrate. The schematic diagram of a typical
ion-implanter is as shown in the Fig. 1.15.
The main blocks of the ion-implanter are ion source, bending analyzer magnet, aperture, acceration
tube, X-Y scanner plates, target chamber. There are two distinct parts of the system namely high
voltage chamber consisting number of system components producing desired ions, while other one
is target chamber consisting wafer holding and feeder assemby.

A gas source delivers a small amount of gas into the ion source. The gas used is BF 3. There are
molecules break into charged particles due to the heating filament. Now in the ion source, there
are desired ions along with other charged particles.
Due to the high voltage (about 20 kV), the charged ions are pulled out of the ion source into the
bending magnet analyzer. Note that the pressure in the system is maintained very low (of the order
of 10-6 Torr) so as to avoid scattering of ions due to gas molecules. The bending analyzer
magnet selects the ions with desired charge to mass ratio with the help of properly applied
magnetic field. Thus the desired ions only can travel through the analyzer, while the others impinge
on the analyzer walls. In the acceleration tube, the ions are accelerated to the suffeciently high
implantation energy.
The aperture focusses the beam of ions. The X-Y scanner plates adjust the sweep of the beam over
the wafer placed in target chamber. The wafer is slightly offset to the axis of the acceleration tube
so as to avoid deflection of ions on to the wafer. In typical ion-implanter, accelerator voltages range
from few kV to 250 kV for medium energy implanters, while upto 2 MV for high energy implanters.
Typically a medium energy implanter is 6m long, 3m wide and 2 m high. It process 200 wafers per
hour. The total number of ions enetering the target is called dose. The medium energy implantation
dosage extends from about 1010 to 1017 atoms/cm2.

X-ray lithography is a process used in semiconductor device fabrication industry to selectively

remove parts of a thin film of photoresist. It uses X-rays to transfer a geometric pattern from a
mask to a light-sensitive chemical photoresist, or simply "resist," on the substrate to reach
extremely small topological size of a feature. A series of chemical treatments then engraves the
produced pattern into the material underneath the photoresist.

It's less commonly used in commercial production due to prohibitively high costs of materials
(such as gold used for X-rays blocking) etc.[1]
X-ray optics is the branch of optics that manipulates X-rays instead of visible light. It deals with
focusing and other ways of manipulating the X-ray beams for research techniques such as X-
ray diffraction, X-ray crystallography, X-ray fluorescence, small-angle X-ray scattering, X-ray
microscopy, X-ray phase-contrast imaging, and X-ray astronomy.

Since X-rays and visible light are both electromagnetic waves they propagate in space in the
same way, but because of the much higher frequency and photon energy of X-rays they interact
with matter very differently. Visible light is easily redirected using lenses and mirrors, but
because the real part of the complex refractive index of all materials is very close to 1 for X-
rays,[1] they instead tend to initially penetrate and eventually get absorbed in most materials
without changing direction much.
 What is Vacuum Plasma?
Vacuum plasma is a process by which a gas is ionized in a vacuum chamber to form plasma. Oxygen and argon
plasmas are commonly used to clean, etch or activate a surface.

These treatments have been around since the early 1970s. It is often used as a way to clean organic impurities
and contaminants from a surface. Plasma is also useful in etching electronic products such as circuit boards.

Why is a vacuum required for plasma?

Plasma is created in a vacuum for many reasons, but there are two main reasons why a vacuum is required.

The gases we introduce to the chamber won't ionize under pressure, so the vacuum must be created before the
gases will ionize and the plasma is created.

Additionally, the vacuum allows us to control which gases are present in the chamber. This control is crucial to the
repeatability of our plasma processes.

How long does treatment last?

Most plasma treatments last approximately 48 hours if the treated surface remains clean and dry. This time can
vary depending on the treatment performed and the conditions parts are stored in.

If a longer shelf life is needed, vacuum packing immediately after cleaning will extend the shelf life.

Who uses vacuum plasma?

Plasma is used by many industries. A perfectly clean surface is imperative to allow an adhesive to bond with
surfaces that are dissimilar in bondability. For instance, when bonding a rubber part to a plastic tool. Plastic and
rubber would generally use different types of adhesives.

This creates a situation where the only way to use the same adhesive on both materials is to ensure that each
surface is clean and activated.

Plasma activation leaves a free radical on the surface of a plastic or rubber material to allow a stronger bond
between the surface of the material and the bonding agent.

These free radicals are created on the surface of the material and are chemically unstable; they attach to the
bonding agent with incredible strength.

Creating these free radicals is also useful when printing on a surface that would generally not accept ink well.
When printing on a shiny or glossy surface, plasma activation is required to allow the surface to accept the ink and
create a smear resistant printed surface.

Plasma can be used to coat a surface to increase its lustrous properties with a process called plasma
polymerization. This is particularly useful for a surface that you want to keep clean from hair and debris, such as
ear buds.

Vacuum plasma is used to etch away a layer of material a few atoms thick during the manufacturing of small
integrated circuit chips. Some IC chips are manufactured with only 10nm between electrical components, and there
are already manufacturers with plans to bring that down to 5nm!

PUT
MBE: Molecular beam epitaxy

Chemical vapor deposition (CVD) :is a vacuum deposition method used to produce high-quality, and
high-performance, solid materials.

epitaxy, the process of growing a crystal of a particular orientation on top of

another crystal, where the orientation is determined by the underlying crystal
The epitaxy (epi) process in semiconductor fabrication allows the growth of
a thin crystal layer on top of the crystal substrate in a given orientation.

Epitaxial growth process

 Epitaxial growth is the process used to grow a thin crystalline layer on a crystalline surface (substrate).
 the substrate wafer acts as seed crystal.
 In this process, crystal is grown below melting point , which uses an evaporation method.
 There are three techniques used in Epitaxial process :
 Chemical vapour Deposition (CVD)

 Molecular Beam Epitaxy (MBE)

 Liquid Phase Epitaxy (LPE)

Epitaxial processes are used to add varying proportions of donor or acceptor impurities as
per requirement.

Four silicon sources are used for growing Epitaxial silicon :

 Silicon tetrachloride

 Silane
  Di-chlorosilane

 Tri-chlorosilane

Optical lithography:

Optical lithography is a photon-based technique comprised of projecting, or shadow

casting, an image into a photosensitive emulsion (photoresist) coated onto the substrate of
choice. Today it is the most widely used lithography process in the manufacturing of nano-
electronics by the semiconductor industry,

Optical lithography’s ubiquitous use is a direct result of its highly parallel nature allowing
vast amounts of information (i.e., patterns) to be transferred in a very short time.

Optical lithography or photolithography is the most widespread micro/nanofabrication

method. It has been used in micro/nanoelectronics and MEMS, as well for the fabrication
of LoC devices using a top-down approach

optical lithography refers to an approach that utilizes light to transfer the geometric
pattern from a photomask to a light-sensitive chemical on the substrate and to accomplish
a certain nanostructure based on the patterned chemical.

Optical lithography (also known as photolithography) is a technique based on transferring

a pattern from a mask to a surface using a radiation source, such as visible UV light or X-
rays. For this process, a photosensitive material is exposed through a photomask and the
exposed areas suffer a change on its chemical properties. The photosensitive material is
deposited over the substrate by spin-coating, forming a thin and uniform film. Before this
step, the substrate must be coated with a semiconductor layer.
Electron beam lithography
Electron beam lithography (e-beam lithography) is a direct writing technique that uses an accelerated beam
of electrons to pattern features down to sub-10 nm on substrates that have been coated with an electron
beam sensitive resist. Exposure to the electron beam changes the solubility of the resist, enabling selective
removal of either the exposed or non-exposed regions of the resist by immersing it in a developer.[1]
The primary advantage of electron beam lithography is that it can write custom patterns with sub-10 nm
resolution. This form of direct writing has high resolution and low throughput, limiting its usage to photomask
fabrication, low-volume production of semiconductor devices, and research & development. [1]

Bipolar Technology
Following are the characteristics or benefits of Bipolar technology:
• Higher switching speed
• It offers high current drive per unit area and high gain
• Generally better noise performance and better high frequency characteristics
• It has better analogue capability compare to others.
• Improved I/O speed.
• It offers high power dissipation.
• lower input impedance (high drive current)
• low packing density.
• low voltage swing logic.
• It offers lower delay sensitivity to load.
• high gm (gm α Vin)
• It offers high unity gain bandwidth at low current
• They are basically unidirectional devices.

CMOS
Following are the characteristics or benefits of CMOS technology:
• It offers high noise margins.
• It has low static power dissipation compare to other technologies.
• It offers high packing density
• It offers high yield along with large integrated complex functions.
• It has low manufacturing cost per device.
• Scalable threshold voltage
• It has High input impedance and low drive current.
• It offers higher delay sensitivity to load (i.e. it has fan out limitation.)
• It has lower trans-conductance, here trans-conductance gm α Vin
• It has lower output drive current (This will have issue while driving higher capacitive loads)
• A near ideal switching device
• Bi-directional capability (drain & source are interchangeable)

BiCMOS
Following are the characteristics of BiCMOS technology:

BiCMOS combines both Bipolar and CMOS technologies in single IC. As we know CMOS has
merits over bipolar in areas of low power dissipation, large noise margins and greater packing
densities. Bipolar has merits over CMOS in areas of faster switching speed and large current
cababilities.

BiCMOS utilizes benefits of both Bipolar and CMOS technologies.

Refer BiCMOS basics and devices➤.
Above sections provides comparison between Bipolar, CMOS and BiCMOS technologies.
These are some of the points, for more information readers need to go through fabrication
procedure for Bipolar, CMOS and BiCMOS.