Boolean Algebra and Logic Gates

Prof. Wangrok Oh

Dept. of Information Communications Eng.

Chungnam National University

Prof. Wangrok Oh(CNU) 1 / 50

Overview

1 Axiomatic Definition of Boolean Algebra

2 Basic Theorems and Properties of Boolean Algebra

3 Boolean Functions

4 Canonical and Standard Forms

5 Other Logic Operations

6 Digital Logic Gates

7 Integrated Circuits

Prof. Wangrok Oh(CNU) 2 / 50

Axiomatic Definition of Boolean Algebra

In 1854, George Boole developed an algebraic system now called

Boolean algebra
1938, Claude E. Shannon introduced a two-valued Boolean algebra
called switching algebra
Boolean Algebra
1 Set of elements B
2 Two binary operators: ‘+’ and ‘·’
Boolean algebra satisfies following (Huntington) postulates:
1 The structure is closed with respect to the operators ‘+’ and ‘·’
2 ‘0’ and ‘1’ are an identity with respect to ‘+’ and ‘·’, respectively

x+0=0+x = x
x·1=1·x = x

3 The structure is commutative with respect to ‘+’ and ‘·’

x+y = y+x
x·y = y·x
Prof. Wangrok Oh(CNU) Axiomatic Definition of Boolean Algebra 3 / 50
Axiomatic Definition of Boolean Algebra

4 The operator ‘·’ is distributive over ‘+’ and the operator ‘+’ is
distributive over ‘·’

x · (y + z) = x·y+x·z
x + (y · z) = (x + y) · (x + z)

5 For every element x ∈ B, there exists an element x0 ∈ B (called the

complement of x) such that x + x0 = 1 and x · x0 = 0

x + x0 = 1
0
x·x = 0

6 There exist at least two elements x, y ∈ B such that x 6= y

Prof. Wangrok Oh(CNU) Axiomatic Definition of Boolean Algebra 4 / 50

 Our interest here is in the application of Boolean algebra to gate‐type circuits commonly
used in digital devices and computers.
Axiomatic Definition of Boolean Algebra
Two‐Valued Boolean Algebra
Two-Valued Boolean
A two‐valued Boolean Algebra
algebra is defined on a set of two elements, B = {0, 1}, with rules
for the
Atwo binary operators
two-valued and # as is
Boolean+algebra shown in the
defined onfollowing
a set of operator tables (the rule
two elements,
for the
Bcomplement operator
∈ {0, 1} with is for
rules for verification
the two binary of operators
postulate 5):
‘+’ and ‘·’

x y x#y x y x!y x x"

0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

These rules are exactly the same as the AND, OR and NOT
operations
Huntington postulates valid for the set B ∈ {0, 1}
1 Structure is closed with respect to the two operators ‘+’ and ‘·’
2 Identity elements: ‘0’ for ‘+’ and ‘1’ for ‘·’
3 Commutative laws are obvious from the symmetry of the binary
operators
4 Distributive law

Prof. Wangrok Oh(CNU) Axiomatic Definition of Boolean Algebra 5 / 50

 3. The commutative laws are obvious from the symmetry of the binary operator tables.
4. (a) The distributive law x # (y + z) = (x # y) + (x # z) can be shown to hold from
Axiomatic Definition of Boolean Algebra
the operator tables by forming a truth table of all possible values of x, y, and z. For
each combination, we derive x # (y + z) and show that the value is the same as the
value of (x # y) + (x # z):

x y z y!z x # ( y ! z) x#y x#z (x # y) ! (x # z)

0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 0 0 0 0
1 0 0 0 0 0 0 0
1 0 1 1 1 0 1 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1

(b) The distributive law of + over # can be shown to hold by means of a truth table
5 Complement of x
similar to the one in part (a).

5. From x x0 = 1 ←−
the+complement 00 =shown
table, it0is+easily = 1, 1 + 10 = 1 + 0 = 1
0 + 1that
0 0 0
(a) x +xx· !x= = since←−
1, 0 0 + 0! 0=· 0
0 +=1 0=· 1 = 0,1 1+ · 1!
1 and 1 ==11+· 00 =
= 01.
(b) x # x! = 0, since 0 # 0! = 0 # 1 = 0 and 1 # 1! = 1 # 0 = 0.
6 Two-valued Boolean algebra has two elements, ‘1’ and ‘0’ with 1 6= 0
Thus, postulate 1 is verified.
Two-valued Boolean algebra
6. Postulate 6 is satisfied because the two‐valued Boolean algebra has two elements,
1 and elements
1 Two 0, with 1 !10.and 0
2WeTwo
have binary operators:
just established ‘· equivalent
a two‐valued Booleanto algebra
AND, having
‘+’ equivalent
a set of twoto OR
elements,
1 andand
0, twoa binary
complement
operatorsoperator
with rulesequivalent
equivalent to tothe
NOT
AND and OR operations, and
a complement operator equivalent to the NOT operator. Thus, Boolean algebra has been
defined in a formal mathematical manner and has been shown to be equivalent to the
binary logic presented heuristically in Section 1.9. The heuristic presentation is helpful
Prof.
in understanding the Axiomatic
Wangrok Oh(CNU)
application of Boolean algebra to gate‐type circuits. The formal
Definition of Boolean Algebra 6 / 50
 the identity elements are interchanged. This important property of Boolean algebra is
called the duality principle and states that every algebraic expression deducible from
Basic Theorems and Properties of Boolean Algebra
the postulates of Boolean algebra remains valid if the operators and identity elements
are interchanged. In a two‐valued Boolean algebra, the identity elements and the ele-
ments of the set B are the same: 1 and 0. The duality principle has many applications. If
the dual of an algebraic expression is desired, we simply interchange OR and AND
operators and replace 1’s by 0’s and 0’s by 1’s.
Duality
Basic If
Theorems
the dual of an algebraic expression is desired, we simply
interchange
Table 2.1 listsOR and AND
six theorems and replace
of Boolean algebra1’s
and by
four0’s and
of its 0’s by The
postulates. 1’s notation
is simplified by omitting the binary operator whenever doing so does not lead to
confusion. The theorems
x+ andypostulates
= 1 ←→ x0 are
listed · y 0the 10 =basic
=most 0 relationships in Boolean

Table
Basic2.1Theorems
Postulates and Theorems of Boolean Algebra
Postulate 2 (a) x + 0 = x (b) x#1 = x
Postulate 5 (a) x + x! = 1 (b) x # x! = 0
Theorem 1 (a) x + x = x (b) x #x = x
Theorem 2 (a) x + 1 = 1 (b) x #0 = 0
Theorem 3, involution (x !)! = x
Postulate 3, commutative (a) x + y = y + x (b) x y = yx
Theorem 4, associative (a) x + (y + z) = (x + y) + z (b) x (yz) = (x y)z
Postulate 4, distributive (a) x (y + z) = x y + x z (b) x + yz = (x + y)(x + z)
Theorem 5, DeMorgan (a) (x + y)! = x !y! (b) (x y)! = x ! + y!
Theorem 6, absorption (a) x + xy = x (b) x (x + y) = x

Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 7 / 50

Basic Theorems and Properties of Boolean Algebra
Theorem (1(a): x + x = x)
x+x = (x + x) · 1
= (x + x) · (x + x0 )
= x + x · x0
= x+0
= x

Theorem (1(b): x · x = x)
x·x = x·x+0
= x · x + x · x0
= x · (x + x0 )
= x·1
= x

Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 8 / 50

Basic Theorems and Properties of Boolean Algebra

Theorem (2(a): x + 1 = 1, 2(b): x · 0 = 0)

x+1 = 1 · (x + 1)
= (x + x0 ) · (x + 1)
= x + x0 · 1
= x + x0
= 1
Theorem 2(b) can be proved by duality

Theorem (3: (x0 )0 = x)

From postulate 5, we have x + x0 = 1 and x · x0 = 0
The complement of x0 is x and is also (x0 )0

Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 9 / 50

Basic Theorems and Properties of Boolean Algebra

Theorem (6(a): x + xy = x, 6(b): x(x + y) = x)

x + xy = x · 1 + xy
= x(1 + y)
= x(y + 1)
= x·1
= x
Theorem 6(b) can be proved by duality

The theorems can be proved by means of truth tables

x y xy x + xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
The first DeMorgan’s theorem (x + y)0 = x0 y 0

Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 10 / 50

Basic Theorems and Properties of Boolean Algebra

x y x+y (x + y)0 x0 y0 x0 y 0
0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

The operator precedence for evaluating Boolean expressions

1 Parentheses
2 NOT
3 AND
4 OR

Prof. Wangrok Oh(CNU) Basic Theorems and Properties of Boolean Algebra 11 / 50

 tionship between binary variables and is evaluated by determining the binary value of
the expression for all possible values of the variables.
Boolean Functions
A Boolean function can be represented in a truth table. The number of rows in the
truth table is 2n, where n is the number of variables in the function. The binary combina-
tions for the truth table are obtained from the binary numbers by counting from 0
A Boolean function described by an algebraic expression consists of
through 2n - 1. Table 2.2 shows the truth table for the function F1. There are eight pos-
binary variables
sible binary and theforlogic
combinations operation
assigning symbols
bits to the three variables x, y, and z. The column
labeled F1 contains either 0 or 1 for each of these combinations. The table shows that
For a given value of the binary variables, the function can be equal
the function is equal to 1 when x = 1 or when yz = 01 and is equal to 0 otherwise.
to either 1 or 0function can be transformed from an algebraic expression into a circuit
A Boolean
diagram composed of logic gates = x + yin0 za particular structure. The logic‐circuit
F1connected
diagram (also called a schematic) for F1 is shown in Fig. 2.1. There is an inverter for input
Boolean function
y to generate with n variables
its complement. can
There is an ANDbe gate
represented in y!z
for the term a truth
and antable
OR gate

Table
Number of rows in the 2.2 table: 2n
truth
Truth Tables for F1 and F2
x y z F1 F2
0 0 0 0 0
0 0 1 1 1
0 1 0 0 0
0 1 1 0 1
1 0 0 1 1
1 0 1 1 1
1 1 0 1 0
1 1 1 1 0

Prof. Wangrok Oh(CNU) Boolean Functions 12 / 50

Boolean Functions

Boolean function can be transformed from an algebraic expression

into a circuit diagram composed of logic gates connected in a
particular structure
Logic circuit diagram (also called a Section 2.5 for
schematic) Boolean
F1 = xFunctions
+ y0 z 47

x
F1

y
z

FIGURE 2.1
There is only one way that a Boolean
Gate implementation of F 1 ! x " y!z
function can be represented in
a truth table
When the function is in algebraic form, it can be expressed in a
that combines
variety of x with
waysy!z. In logic‐circuit diagrams, the variables of the function are taken
as the inputs of the circuit and the binary variable F1 is taken as the output of the circuit.
The schematic expresses the relationship between the output of the circuit and its inputs.
Rather than listing each combination of inputs and outputs, it indicates how to compute
the logic
Prof. value
Wangrok of each output from Boolean
Oh(CNU) the logic values of the inputs.
Functions 13 / 50
Boolean Functions

By manipulating a Boolean expression according to the rules of

Boolean algebra, it is sometimes possible to obtain a simpler
expression and thus reduce the number of gates and the number of
inputs to the gate

F2 = x0 y 0 z + x0 yz + xy 0
48 Chapter 2 Boolean Algebra and Logic Gates

F2
z

(a) F2 ! x"y"z # x"yz # xy"

Prof. Wangrok Oh(CNU) Boolean Functions 14 / 50

 y
Boolean Functions
F2
z

F2 = x0 y 0 z + x0 yz + xy 0
= x0 z(y 0 + y) + xy 0
0
(a) F2 ! x"y"z # x"yz 0# xy"
= x z + xy

y
F2

(b) F2 ! xy" # x"z

In general, there are many equivalent representations of a logic
FIGURE 2.2
Implementation of Boolean function F2 with gates
function
Finding the most economic representation of the logic is an
important
produce thedesign task
same truth table, they are equivalent. Therefore, the two circuits have the
same outputs for all possible binary combinations of inputs of the three variables. Each
circuit implements the same identical function, but the one with fewer gates and fewer
inputs to gates is preferable because it requires fewer wires and components. In general,
there are many equivalent representations of a logic function. Finding the most eco-
Prof.
nomic representation of the logic Boolean
Wangrok Oh(CNU)
is an important
Functions
design task. 15 / 50
Boolean Functions
Algebraic Manipulation
When a Boolean expression is implemented with logic gates, each
term requires a gate and each variable within the term designates an
input to the gate
literal: a single variable within a term in complemented or
uncomplemented form

F2 = x0 y 0 z + x0 yz + xy 0
F2 has 3 terms and 8 literals

F2 = x0 z + xy 0

Simplified F2 has 2 terms and 4 literals

By reducing the number of terms, the number of literals or both, it is
often possible to obtain a simpler circuit
The manipulation of Boolean algebra consists mostly of reducing an
expression for the purpose of obtaining a simpler circuit
Functions of up to five variables can be simplified by the map
method described in the next chapter: Karnaugh Map

Prof. Wangrok Oh(CNU) Boolean Functions 16 / 50

Boolean Functions
Example (Simplify the Boolean functions)
1 x(x0 + y) = xx0 + xy = 0 + xy = xy
2 x + x0 y = (x + x0 )(x + y) = 1(x + y) = x + y
3 (x + y)(x + y 0 ) = x + xy + xy 0 + yy 0 = x(1 + y + y 0 ) = x
4 xy + x0 z + yz

xy + x0 z + yz = xy + x0 z + yz(x + x0 )
= xy + x0 z + xyz + x0 yz
= xy(1 + z) + x0 z(1 + y) = xy + x0 z

5 (x + y)(x0 + z)(y + z) = (x + y)(x0 + z) by duality of (4)

(1) and (2) are the dual of each other

(4) illustrates the fact that an increase in the number of literals
sometimes leads to a simpler final expression
(5) is not minimized directly, but can be derived from the dual of the
steps used to derive (4)
(4) and (5) are together known as the consensus theorem

Prof. Wangrok Oh(CNU) Boolean Functions 17 / 50

Boolean Functions
Complement of a Function
The complement of a function F is F 0 and is obtained from an
interchange of 0’s for 1’s and 1’s for 0’s in the value of F
The complement of a function may be derived algebraically through
DeMorgan’s theorems
DeMorgan’s Theorem

(A + B + C)0 = (A + x)0 ←− Let B + C = x

= A0 x0 ←− By Theorem 5(a) (DeMorgan)
= A0 (B + C)0
= A0 (B 0 C 0 ) = A0 B 0 C 0

DeMorgans theorems for any number of variables resemble the two

variable case

(A + B + C + · · · + F )0 = A0 B 0 C 0 · · · F 0
(ABC · · · F )0 = A0 + B 0 + C 0 + · · · + F 0

The complement of a function is obtained by interchanging AND

and OR operators and complementing each literal
Prof. Wangrok Oh(CNU) Boolean Functions 18 / 50
Boolean Functions

Example (Find the complement of the functions)

Let F1 = x0 yz 0 + x0 y 0 z and F2 = x(y 0 z 0 + yz)

F10 = (x0 yz 0 + x0 y 0 z)0 = (x0 yz 0 )0 (x0 y 0 z)0 = (x + y 0 + z)(x + y + z 0 )

0
F20 = x(y 0 z 0 + yz) = x0 + (y 0 z 0 + yz)0 = x0 + (y 0 z 0 )0 (yz)0


= x0 + (y + z)(y 0 + z 0 )
= x0 + yz 0 + y 0 z

A simpler procedure for deriving the complement of a function is to

take the dual of the function and complement each literal
This method follows from the generalized forms of DeMorgans
theorems
Remember that the dual of a function is obtained from the
interchange of AND and OR operators and 1’s and 0’s

Prof. Wangrok Oh(CNU) Boolean Functions 19 / 50

Boolean Functions

Example (Find the complement by taking their duals)

1 F1 = x0 yz 0 + x0 y 0 z
→ The dual of F1 is (x0 + y + z 0 )(x0 + y 0 + z)
→ Complement each literal: (x + y 0 + z)(x + y + z 0 ) = F10
2 F2 = x(y 0 z 0 + yz)
→ The dual of F2 is x + (y 0 + z 0 )(y + z)
→ Complement each literal: x0 + (y + z)(y 0 + z 0 ) = F20

Prof. Wangrok Oh(CNU) Boolean Functions 20 / 50

 In a similar fashion, n variables forming an OR term, with each variable being primed
or unprimed, provide 2n possible combinations, called maxterms, or standard sums. The
Canonical and Standard Forms
eight maxterms for three variables, together with their symbolic designations, are listed
in Table 2.3. Any 2n maxterms for n variables may be determined similarly. It is impor-
tant to note that (1) each maxterm is obtained from an OR term of the n variables, with
Minterms and Maxterms
each variable being unprimed if the corresponding bit is a 0 and primed if a 1, and (2)
each maxterm is the complement of its corresponding minterm and vice versa.
Consider two binary variables x and y combined with an AND
A Boolean function can be expressed algebraically from a given truth table by form-
operation
ing a minterm for each combination of the variables that produces a 1 in the function
and
Fourthen taking the
possible OR of all thosexy,
combinations: x0For
terms. 0
, x0 y 0the function f1 in Table 2.4 is
example,
y, xy
determined
Each of these by expressing
four AND the combinations 001, 100,
terms is called and 111 asorx!y!z,
a minterm xy!z!, and xyz,
a standard
respectively. Since each one of these minterms results in f1 = 1, we have
product
n variables can be f1 = x!y!z + xy!z!
combined + xyz2=n m
to form 1 + m4 + m7
minterms
n
n variables forming an OR term provide 2 possible combinations
Table 2.3
called maxterms or standard sums
Minterms and Maxterms for Three Binary Variables
Minterms Maxterms
x y z Term Designation Term Designation
0 0 0 x!y!z! m0 x + y + z M0
0 0 1 x!y!z m1 x + y + z! M1
0 1 0 x!yz! m2 x + y! + z M2
0 1 1 x!yz m3 x + y! + z! M3
1 0 0 xy!z! m4 x! + y + z M4
1 0 1 xy!z m5 x! + y + z! M5
1 1 0 xyz! m6 x! + y! + z M6
1 1 1 xyz m7 x! + y! + z! M7

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 21 / 50

Canonical and Standard Forms
Each maxterm is the complement of its corresponding midterm and
vice versa
52 Chapter 2 Boolean
A Boolean Algebra
function canand
beLogic Gatesby forming a minterm for each
expressed
combination of the variables that produces a 1 in the function and
then takingTable
the2.4
OR of all those terms
Functions of Three Variables
x y z Function f1 Function f2
0 0 0 0 0
0 0 1 1 0
0 1 0 0 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Similarly, it may be easily verified that

0 0
f1
=f2 = xx!yz xy 0 z+0 +
y z ++xy!z xyz+ =
xyz! xyzm=1 +
m3m+4 m
+5 m
+ 7m6 + m7
0 0 0
f = x yz + xy z + xyz + xyz = m
These examples demonstrate an important property of Boolean
2 3 + m 5 + m6 +Any
algebra: m7 Boolean
function can be expressed as a sum of minterms (with “sum” meaning the ORing of terms).
Now consider the complement
Prof. Wangrok Oh(CNU)
of a Boolean function. It may be read from the truth
Canonical and Standard Forms 22 / 50
Canonical and Standard Forms

Any Boolean function can be expressed as a sum of minterms

Now consider the complement of a Boolean function
1 Forming a minterm for each combination that produces a 0
2 Summing the terms
f10 = x0 y 0 z 0 + x0 yz 0 + x0 yz + xy 0 z + xyz 0
We can obtain the function f1 by taking the complement of f10

f1 = (x + y + z)(x + y 0 + z)(x + y 0 + z 0 )(x0 + y + z 0 )(x0 + y 0 + z)

= M0 · M2 · M3 · M5 · M6

Any Boolean function can be expressed as a product of maxterms

The procedure for obtaining the product of maxterms directly from
the truth table is as follows:
1 Form a maxterm for each combination of the variables that produces
a 0 in the function
2 Form the AND of all those maxterms
Boolean functions expressed as a sum of minterms or product of
maxterms are said to be in canonical form

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 23 / 50

Canonical and Standard Forms

Sum of Minterms
For n binary variables, one can obtain 2n distinct minterms
Any Boolean function can be expressed as a sum of minterms
The minterms whose sum defines the Boolean function are those
which give the 1’s of the function in a truth table
n
# of functions formed by n variables: 22
It is sometimes convenient to express a Boolean function in its
sum-of-minterms form
If the function is not in the sum-of-minterms form, it can be made
so:
1 Expanding the expression into a sum of AND terms
2 Inspecting each term to see if it contains all the variables
3 If it misses one or more variables, ANDing with an expression
(x + x0 ) where x is one of the missing variables

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 24 / 50

Canonical and Standard Forms

Example (Express F = A + B 0 C as a SUM of Minterms)

1 The first term A is missing two variables, B and C

A = A(B + B 0 ) = AB + AB 0
= AB(C + C 0 ) + AB 0 (C + C 0 )
= ABC + ABC 0 + AB 0 C + AB 0 C 0
2 The second term B 0 C is missing one variable A

B 0 C = B 0 C(A + A0 ) = AB 0 C + A0 B 0 C
3 Combining all terms

F = A + B0C
= ABC + ABC 0 + AB 0 C + AB 0 C 0 + AB 0 C + A0 B 0 C
4 The term AB 0 C appears twice → Since (x + x) = x, we can remove
one of those occurrences
F = A0 B 0 C + AB 0 C 0 + AB 0 C + ABC 0 + ABC
= m1 + m4 + m5 + m6 + m7

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 25 / 50

Canonical and Standard Forms

When a Boolean function is in its sum-of-minterms form, it is

sometimes convenient to express the function in the following brief
notation: X
F (A, B, C) = (1, 4, 5, 6, 7)
54 Chapter 2 procedure:
Alternative Boolean Algebra and Logic
Obtaining Gates table of the function
the truth
directly from the algebraic expression
Table 2.5
Truth table for F = A + B 0 C:
Truth Table for F ! A " B!C
A B C F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

F =m +m +m +m +m
1 4
1’s under F for those combinations 5
for which A 6= 1 and7BC = 01. From the truth table,
we can then read the five minterms of the function to be 1, 4, 5, 6, and 7.

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 26 / 50

Canonical and Standard Forms
Product of Maxterms
Each functions can be also expressed as a product of maxterms
1 Express each term with an OR form ←− Using the distributive law
2 Any missing variable x in each OR term is ORed with xx0

Example (Express F = xy + x0 z as a Product of Maxterms)

1 Convert the function into OR terms by using the distributive law

F = xy + x0 z = (xy + x0 )(xy + z)
= (x + x0 )(y + x0 )(x + z)(y + z)
= (x0 + y)(x + z)(y + z)
2 Each OR term is missing one variable

x0 + y = x0 + y + zz 0 = (x0 + y + z)(x0 + y + z 0 )
x+z = x + z + yy 0 = (x + y + z)(x + y 0 + z)
y+z = y + z + xx0 = (x + y + z)(x0 + y + z)
3 Combining all terms and removing terms appear more than once

F = (x + y + z)(x + y 0 + z)(x0 + y + z)(x0 + y + z 0 ) = M0 M2 M4 M5

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 27 / 50

Canonical and Standard Forms

A convenient way to express product of maxterms

Y
F (x, y, z) = (0, 2, 4, 5)

Q
The product symbol denotes the ANDing of maxterms
The numbers are the indices of the maxterms of the function
Conversion between Canonical Forms
The complement of a function expressed as the sum of minterms
equals the sum of minterms missing from the original function
Original function is expressed by those minterms which make the
function equal to 1
Complement is a 1 for those minterms for which the function is a 0
X
F (A, B, C) = (1, 4, 5, 6, 7)
X
F 0 (A, B, C) = (0, 2, 3) = m0 + m2 + m3

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 28 / 50

Canonical and Standard Forms

If we take the complement of F 0 by Demorgan’s theorem, we obtain

F in a different form
Y
F = (m0 + m2 + m3 )0 = m00 · m02 · m03 = M0 M2 M3 = (0, 2, 3)

Maxterm with subscript j is a complement of the minterm with the

same subscript j and vice versa

m0j = Mj

To convert from one canonical form to another:

P Q
1 Interchange the symbols and
2 List those numbers missing from the original form
3 Total number of minterms or maxterms is 2n

Prof. Wangrok Oh(CNU) Canonical and Standard Forms 29 / 50

Canonical and Standard Forms
56 Chapter 2 Boolean Algebra and Logic Gates

Table 2.6 F = xy + x0 z
Boolean expression
Truth Table for F ! xy " x"z
x y z F
0 0 0 0 Minterms
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1 Maxterms
1 1 1 1

X
F (x, y, z) = (1, 3, 6, 7)
Since there is a total of eight minterms or maxterms
Y in a function of three variables, we
determine the missing terms toFbe (x,0,y,2,z) = 5.(0,
4, and The2,function
4, 5) expressed as a product of
maxterms is
F(x, y, z) = !(0, 2, 4, 5)
the same answer as obtained in Example 2.5.
Prof. Wangrok Oh(CNU) Canonical and Standard Forms 30 / 50
Canonical and Standard Forms
Standard Forms
Canonical forms of Boolean algebra: Sum of minterms/Product of
maxterms
Each minterm or maxterm must contain all the variables
Another way to express Boolean functions is standard form
In standard form, the terms may contain any number of literals
There are two types of standard forms
1 Sum of products
2 Products of sums
Sum of products: F1 = y 0 + xy + x0 yz 0
The expression has three product terms with one, two, and three
literals Section 2.6 Canonical an
Their sum is an OR operation
y! x

x! y!
y F1
z! z

x x!
y
y z
(a) Sum of Products (b) P
This circuit configuration is referred to as a two-level implementation
FIGURE 2.3
Prof. Wangrok Oh(CNU) Two‐level
Canonical andimplementation
Standard Forms 31 / 50
 Canonical and Standard Forms

Product of Sums
A product of sums is a Boolean expression containing OR terms (sum
terms)
Each term may have any number of literals
The product denotes the ANDing of these terms
F2 = x(y 0 + z)(x0 + y + z 0 )

ThisSection
expression has three sum terms, with one, two,
2.6 Canonical and Standard Forms 57
and three literals
The product is an AND operation
x

y!
F1 F2
z
x!
y
z
(a) Sum of Products (b) Product of Sums
This standard type of expression results in a two level structure of
2.3
gates
el implementation

A
B
Prof. Wangrok Oh(CNU) Canonical and Standard Forms 32 / 50
 x! y!
Canonical and Standard Forms
y
z!
F1
z
F2

x x!
y
Ay Boolean function may be expressed in a nonstandard
z
form
(a) Sum of Products (b) Product of Sums
F3 = AB + C(D + E)
FIGURE 2.3
Two‐level implementation
This function is neither in sum-of-product nor in product-of-sum form
A
A B
B
C
C F3 F3
D
D
E C
E
(a) AB " C(D " E) (b) AB " CD " CE
FIGURE 2.4
Implementation
Three‐ requires two
AND gates and two OR gates
and two‐level implementation
There are three levels of gating in this circuit
It can be changed to a standard form by using the distributive law
A product of sums is a Boolean expression containing OR terms, called sum terms.
Each term may have any number of literals. The product denotes the ANDing of these
F3example
terms. An = ABof+a C(D + expressed
function E) = AB as a+product
CD +ofCE sums is
F2 = x(y! +because
Two-level implementation is preferred z)(x! + yit+produces
z!) the least
amountThis
of expression
delay has three sum terms, with one, two, and three literals. The product is an
AND operation. The use of the words product and sum stems from the similarity of the
However, the number of inputs to a given gate might not be practical
AND operation to the arithmetic product (multiplication) and the similarity of the OR
Prof. Wangrok Oh(CNU)
operation to the arithmetic sum (addition). The gate structure of the product‐of‐sums
Canonical and Standard Forms 33 / 50
 Although each function can be expressed in terms of the Boolean operators AND,
OR, and NOT, there is no reason one cannot assign special operator symbols for express-
Other Logic Operations
ing the other functions. Such operator symbols are listed in the second column of
Table 2.8. However, of all the new symbols shown, only the exclusive‐OR symbol, !,
is in common use by digital designers.
Each of the functions in Table 2.8 is listed with an accompanying name and a com-
ment that explains the function in some way.1 The 16 functions listed can be subdivided
into three categories:
1. Two functions
n that produce a constant 0 or 1.
There are 22 functions for n binary variables
2. Four functions with unary operations: complement and transfer.
For3. nTen
=functions with binary
2, the number ofoperators
possiblethat define eight
Boolean differentisoperations:
functions 16 AND,
OR, NAND, NOR, exclusive‐OR, equivalence, inhibition, and implication.
Therefore, AND and OR are only 2 of a total of 16 possible functions
Table
What2.7is the other 14 functions?
Truth Tables for the 16 Functions of Two Binary Variables
x y F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

1
The symbol ˆ is also used to indicate the exclusive or operator, e.g., xˆy. The symbol for the AND function is
sometimes omitted from the product of two variables, e.g., xy.

Prof. Wangrok Oh(CNU) Other Logic Operations 34 / 50

 Section 2.7 Other Logic Operations 59
Other Logic Operations
Table 2.8
Boolean Expressions for the 16 Functions of Two Variables
Operator
Boolean Functions Symbol Name Comments
F0 = 0 Null Binary constant 0
F1 = xy x#y AND x and y
F2 = xy! x/y Inhibition x, but not y
F3 = x Transfer x
F4 = x!y y/x Inhibition y, but not x
F5 = y Transfer y
F6 = xy! + x!y x!y Exclusive‐OR x or y, but not both
F7 = x + y x + y OR x or y
F8 = (x + y)! xTy NOR Not‐OR
F9 = xy + x!y! (x ! y)! Equivalence x equals y
F10 = y! y! Complement Not y
F11 = x + y! x!y Implication If y, then x
F12 = x! x! Complement Not x
F13 = x! + y x"y Implication If x, then y
F14 = (xy)! xcy NAND Not‐AND
F15 = 1 Identity Binary constant 1

Constants
Prof. Wangrok Oh(CNU) for binary functionsOther
canLogic
be equal to only 1 or 0. The complement function
Operations 35 / 50
Other Logic Operations
The 16 functions listed can be subdivided into three categories
1 2 functions that produce a constant 0 or 1
2 4 functions with unary operations: complement and transfer
3 10 functions with binary operators: AND, OR, NAND, NOR,
exclusive-OR, equivalence, inhibition and implication
A function that is equal to an input variable has been given the
name transfer
Inhibition and implication are used by logicians, but are seldom used
in computer logic
NOR is the complement of the OR (Not-OR)
NAND is the complement of AND (Not-AND)
Exclusive-OR (XOR) is similar to OR but excludes x = 1 and y = 1
It holds only when x and y differ in value
It is sometimes referred to as the binary difference operator
Equivalence is a function that is 1 when the two binary variables are
equal
Exclusive-OR and equivalence functions are the complements of each
other
Equivalence function is called exclusive-NOR (XNOR)
Prof. Wangrok Oh(CNU) Other Logic Operations 36 / 50
Digital Logic Gates Section 2.8 Digital Logic Gates 61

Graphic Algebraic Truth

Name symbol function table

x y F

x 0 0 0
AND F F!x·y
y 0 1 0
1 0 0
1 1 1

x y F

x 0 0 0
OR F F!x"y
y 0 1 1
1 0 1
1 1 1
x F
Inverter x F F ! x# 0 1
1 0
x F
Buffer x F F!x
0 0
1 1
x y F
x
F F ! (xy)# 0 0 1
NAND
y 0 1 1
1 0 1
Prof. Wangrok Oh(CNU) Digital Logic Gates 37 / 50
 x F
Digital Logic Gates
Buffer x F F!x
0 0
1 1
x y F
x
F F ! (xy)# 0 0 1
NAND
y 0 1 1
1 0 1
1 1 0
x y F

x 0 0 1
NOR F F ! (x " y)#
y 0 1 0
1 0 0
1 1 0
x y F

Exclusive-OR x F ! xy# " x#y 0 0 0

(XOR) F !x!y 0 1 1
y
1 0 1
1 1 0

x y F
Exclusive-NOR x F ! xy " x#y#
or 0 0 1
F ! (x ! y)#
equivalence y 0 1 0
1 0 0
1 1 1

FIGURE 2.5
Digital logic gates
Prof. Wangrok Oh(CNU) Digital Logic Gates 38 / 50
Digital Logic Gates
Extension to Multiple Inputs
The gates except for the inverter and buffer can be extended to have
more than two inputs
A gate can be extended to have multiple inputs if the binary
operation it represents is commutative and associative
The AND and OR operations possess these two properties

x+y = y + x ←− Commutative
(x + y) + z = x + (y + z) = x + y + z ←− Associative

inputs can be interchanged and that the OR function can be

extended to three or more variables
NAND and NOR functions are commutative and their gates can be
extended to have more than two inputs
We have to modify the definition of the operation slightly
NAND and NOR operators are not associative
0
(x + y)0 + z = (x + y)z 0 = xz 0 + yz 0

(x ↓ y) ↓ z =
0
x + (y + z)0 = x0 (y + z) = x0 y + x0 z

x ↓ (y ↓ z) =

Prof. Wangrok Oh(CNU) Digital Logic Gates 39 / 50

Digital Logic Gates Section 2.8 Digital Logic Gates 63

x
y

Section 2.8 Digital Logic Gates 63

(x y) z ! (x " y)z#
y
x
y

(x y) z ! (x " y)z#
y
x
x (y z) ! x# (y " z)

y
z
x
x (y z) ! x# (y " z)
FIGURE 2.6
To overcome this difficulty, we define the multiple NOR (or NAND)
Demonstrating they nonassociativity of the NOR operator: (x T y) T z ! x T (y T z)
gate as a complemented OR (or AND) gate
z
0
x
FIGURE 2.6
x ↓ y ↓ z = (xx+ y + z)
y (x " y " z)# y (xyz)#
z
Demonstrating the nonassociativity
x↑y↑z = of the z 0operator: (x T y) T z ! x T (y T z)
NOR
(xyz)
(a) 3-input NOR gate (b) 3-input NAND gate
x x
y (x " y " z)# y (xyz)#
z z
A (a) 3-input NOR gate (b) 3-input NAND gate
B
C
Prof. Wangrok Oh(CNU) Digital Logic Gates 40 / 50
 x
x (y z) ! x# (y " z)
Digital Logic Gatesy
z

FIGURE 2.6
Demonstrating the nonassociativity of the NOR operator: (x T y) T z ! x T (y T z)
In writing cascaded NOR and NAND operations, one must use the
correct xyparentheses to(xsignify the proper x sequence of the gates
" y " z)# y (xyz)#
z
h i0 z
(a) 3-input NOR gate 0 0 (b) 3-input NAND gate
F = (ABC) (DE) = ABC + DE

A
B
C
F ! [(ABC)# $ (DE)#]# ! ABC " DE
D
E
(c) Cascaded NAND gates
The
FIGURE 2.7second expression is obtained from one of DeMorgan’s theorems
Multiple‐input and cascaded
An expression NOR and NAND
in sum-of-products gates
form can be implemented with
NAND gates
of a three‐input exclusive‐OR function is shown in Fig. 2.8. This function is normally
implemented by cascading two‐input gates, as shown in (a). Graphically, it can be
represented with a single three‐input gate, as shown in (b). The truth table in (c) clearly
indicates that the output F is equal to 1 if only one input is equal to 1 or if all three inputs
are equal to 1 (i.e., when the total number of 1’s in the input variables is odd). (Exclusive‐
Prof. OR
Wangrok gates are discussed furtherDigital
Oh(CNU) in Section 3.9.)
Logic Gates 41 / 50
Digital Logic Gates
The exclusive-OR and equivalence gates are both commutative and
associative and can be extended to more than two inputs
However, multiple-input exclusive-OR gates are uncommon from the
hardware standpoint
In fact, even a two-input function is usually constructed with other
types of gates
The definition of the function must be modified when extended to
more than two variables
64 Chapter 2 Exclusive-OR
Boolean is anand
Algebra oddLogic
function: It is equal to 1 if the input variables
Gates
have an odd number of 1’s
x
x y z F
y
0 0 0 0
F!x!y!z 0 0 1 1
z
0 1 0 1
(a) Using 2-input gates 0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
x
y F!x!y!z 1 1 1 1
z
(c) Truth table
(b) 3-input gate

FIGURE 2.8
Three‐input
Prof. Wangrok Oh(CNU) exclusive‐OR gateDigital Logic Gates 42 / 50
 y
0 0 0 0
Digital Logicz Gates F!x!y!z 0 0 1 1
0 1 0 1
(a) Using 2-input gates 0 1 1 0
1 0 0 1
1 0 1 0
Positive and Negative Logic 1 1 0 0
x
y F!x!y!z 1 1 1 1
The binaryzsignal at the inputs and outputs of any gate has one of
(c) Truth table
two values except during
(b) 3-input gate transition
One signal
FIGURE 2.8 value represents logic 1 and the other logic 0
Since twoexclusive‐OR
Three‐input signal valuesgate are assigned to two logic values, there exist
two different assignments of signal level to logic value
Logic Signal Logic Signal
value value value value
1 H 0 H

0 L 1 L
(a) Positive logic (b) Negative logic

FIGURE 2.9
The higher signal level is designatedby H and the lower signal level
Signal assignment and logic polarity
by L
Positive logic: Choosing H to represent logic 1
Negative logic: Choosing L to represent logic 1
signal level to logic value, as shown in Fig. 2.9. The higher signal level is designated by
H and the lower signal level by L. Choosing the high‐level H to represent logic 1 defines
a positive logic system. Choosing the low‐level L to represent logic 1 defines a negative
logic system. The terms positiveDigital
Prof. Wangrok Oh(CNU)
andLogic
negative
Gates
are somewhat misleading, since both sig-
43 / 50
 H L L gate
y
H H H
x y z
Digital Logic Gates
(a)
LTruth
L tableL x
(b) Gate block diagram
Section 2.8 Digital
Digital Logic Gates 65
L with
HH andLL z
H L L gate
y
x H
H y z
H

LTruth
(a) L tableL x (b) Gate block diagram
L withHH andLL Digital z
xH yL zL gate
y
H H H
0 0 0
(a) (b) Gate block diagram
0 Truth
1 table0
1 with0 H and0 L x
z
1x 1y 1z y
(c) Truth table for (d) Positive logic AND gate
0positive
0 logic 0
0 1 0
1x 0y 0z x
z
1 1 1 y
(c)0Truth0 table 0for (d) Positive logic AND gate
0positive
1 logic 0
1 0 0 x
z
x1 y1 z1 y
(c)
1 Truth
1 table1for (d) Positive logic AND gate
1 positive
0 logic
1
0 1 1 x
z
0x 0y 0z y
(e)1Truth1 table 1for (f) Negative logic OR gate
1negative
0 logic
1
x
FIGURE 2.10 00x 10y 1z
y
z
The small triangles
Demonstration of
in0 and
the negative
inputs and output: Polarity indicator
1 positive
1 1 logic
(e)1Truth
Positive-logic AND 0 table
gate1for = Negative-logic (f) Negative
OR gate logic OR gate
0negative
1 logic
1 x
z
0 0 0 y
designate
FIGUREa2.10
polarity indicator, the presence of which along a terminal signifies that
Prof. Wangrok Oh(CNU) Digital Logic Gates 44 / 50
Digital Logic Gates

The conversion from positive logic to negative logic and vice versa is
essentially an operation that changes 1’s to 0’s and 0’s to 1’s in both
inputs and output
This operation produces the dual of a function

Prof. Wangrok Oh(CNU) Digital Logic Gates 45 / 50

Integrated Circuits

An integrated circuit (IC) is fabricated on a die of a silicon

semiconductor crystal called a chip containing the electronic
components for constructing digital gates
The various gates are interconnected inside the chip to form the
required circuit
The chip is mounted in a ceramic or plastic container and
connections are welded to external pins to form the integrated circuit
Each IC has a numeric designation printed on the surface of the
package for identification
Vendors provide data books, catalogs, and Internet websites that
contain descriptions and information about the ICs that they
manufacture

Prof. Wangrok Oh(CNU) Integrated Circuits 46 / 50

Integrated Circuits

Levels of Integration
Small-scale integration (SSI) devices
Contain several independent gates in a single package
The number of gates is usually fewer than 10
Medium-scale integration (MSI) devices
Have a complexity of approximately 10 to 1,000 gates
They usually perform specific elementary digital operations
Examples: Decoders, adders, and multiplexers, registers and counters
Large-scale integration (LSI) devices
Contain thousands of gates in a single package
They include digital systems such as processors, memory chips, and
programmable logic devices
Very large-scale integration (VLSI) devices
Contain millions of gates within a single package
Examples are large memory arrays and complex microcomputer chips
Because of their small size and low cost, VLSI devices have
revolutionized the computer system design technology

Prof. Wangrok Oh(CNU) Integrated Circuits 47 / 50

Integrated Circuits

Digital Logic Families

Integrated circuits are classified by the specific circuit technology
The circuit technology is referred to as a digital logic family
Basic circuit in each technology is a NAND, NOR or inverter gate
The most popular logic families
1 TTL: Transistor-transistor logic
2 ECL: Emitter-coupled logic
3 MOS: Metal-oxide semiconductor
4 CMOS: Complementary metal-oxide semiconductor
TTL is a logic family that has been in use for 50 years and is
considered to be standard
ECL has an advantage in systems requiring high speed operation
MOS is suitable for circuits that need high component density
CMOS is preferable in systems requiring low power consumption

Prof. Wangrok Oh(CNU) Integrated Circuits 48 / 50

Integrated Circuits

The most important parameters distinguishing logic families

Fan-out: Number of standard loads that the output of a typical gate
can drive without impairing its normal operation
Fan-in: number of inputs available in a gate
Power dissipation: power consumed by the gate that must be
available from the power supply
Propagation delay: average transition delay time for a signal to
propagate from input to output
Noise margin: maximum external noise voltage added to an input
signal that does not cause an undesirable change in the circuit output

Prof. Wangrok Oh(CNU) Integrated Circuits 49 / 50

Integrated Circuits

Computer Aided Design of VLSI Circuits

The design of digital systems with VLSI circuits containing millions
of transistors and gates is an enormous and formidable task
Systems of this complexity are usually impossible to develop and
verify without the assistance of computeraided design (CAD) tools
Electronic design automation (EDA) covers all phases of the design
of integrated circuits
Physical realization of a digital circuits
1 Application-specific integrated circuit (ASIC)
2 Field-programmable gate array (FPGA)
3 Programmable logic device (PLD)
4 Full-custom IC
An important development in the design of digital systems is the use
of a hardware description language (HDL)
Computer programming language specifically oriented to describing
digital hardware
Verilog and VHDL

Prof. Wangrok Oh(CNU) Integrated Circuits 50 / 50