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ESL Expt 3

The document outlines the implementation of a digital voltmeter using an A/D converter and LCD with the Freescale HCS12 application module, detailing the software and hardware requirements, as well as the programming and algorithm involved. It also describes additional projects involving a photo sensor and a potentiometer, highlighting their respective functionalities and control mechanisms. The results confirm successful interfacing and operation of the components as specified.

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0% found this document useful (0 votes)
3 views

ESL Expt 3

The document outlines the implementation of a digital voltmeter using an A/D converter and LCD with the Freescale HCS12 application module, detailing the software and hardware requirements, as well as the programming and algorithm involved. It also describes additional projects involving a photo sensor and a potentiometer, highlighting their respective functionalities and control mechanisms. The results confirm successful interfacing and operation of the components as specified.

Uploaded by

Nandhini P
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Ex.

No: 3a Date:

Digital Voltmeter

Aim :

To implement a digital voltmeter by interfacing A/D converter and LCD in Freescale


HCS12 application module with the following specifications:-

i) Only one conversion per sequence


ii) 8-bit resolution
iii) 16 A/D clocks per sample as the conversion time
iv) ATD clock module operates at 500KHz
v) Result should be right justified
vi) Unsigned number data representation
vii) Accepts only one input

Software Requirements:

Freescale code warrior development Studio version 5.0

Hardware Requirements:

i) Personal Computer
ii) MC9S12 Freescale Application Module
iii) Interface card
iv) Project Board PBMCUSLK

Theory:

Analog Subsystem:

The analog subsystem consists of a multiplexer, an input sample amplifier, a


resistor-capacitor digital-to-analog converter (RC DAC) array, and a high-gain comparator. The
multiplexer selects one of three internal or one of the external signal sources for conversion. The
sample amplifier pre-charges the sample capacitor before it gets connected to the input potential.
The RC DAC array provides the digital-to-analog comparison output necessary for successive
approximation conversion. The comparator indicates whether each successive output of the RC
DAC array is higher or lower than the sampled input. The ATD block diagram is shown in Figure.

3-1
Program:
#include <hidef.h> /* common defines and macros */
#include "derivative.h" /* derivative-specific definitions */
#include "math.h"

void SPI_Initialize(void);
void SPI_Send(unsigned char data);
void LCD_Initialize(void);
void LCD_SendCommand(unsigned char data);
void LCD_SendCharacter(unsigned char data);
void Delay(unsigned int time);
void LCD_SendString(int line, char *sptr);
void LCD_CursorPos(int line, int position);
void Display_integer(int line_no, int pos_no, int number);

void main(void) {
float digital,dig;
unsigned int var1,var2;
float res=0.01953;
SPI_Initialize();
LCD_Initialize();
ATD0CTL2=0x80;
ATD0CTL3=0x08;
ATD0CTL4=0xE3;
for(;;){

ATD0CTL5=0x82;
while(!(ATD0STAT0 & 0x80)) {
digital=ATD0DR0L * res;
var1=(unsigned int) digital;
Display_integer(1,0,var1);
LCD_CursorPos(1,1);
LCD_SendCharacter('.');
dig = digital - var1;
var2 =(unsigned int)(dig * 100);
Display_integer(1,2,var2);
LCD_CursorPos(1,5);
LCD_SendCharacter('v');
}
}
}

3-2
Algorithm:
i) Start.
ii) Declare a variable say Var1 as unsigned int and Declare two variables as float.
iii) Call the SPI_Initialize and LC_Initialize functions.
iv) Assign ATD register 2 with the control words 0x80.
v) Assign ATD register 3 with the control words 0x08.
vi) Assign ATD register 4 with the control words 0xE3.
vii) Inside the infinite forever loop Assign ATD register 5 with the control words 0x82.
viii) While ATD status’s MSB is not equal to 1 do the following operations.
ix) Assign the product of ATD0DR0L and resolution to the variable digital.
x) Convert the digital(float) into unsigned integer and pass it on to the variable Var1.
xi) Display the integer with the line number 1 and position 0.
xii) Move the LCD cursor position to 1 and print the character (‘.’).
xiii) To get the values after decimal, subtract the Var1 from digital and store it in a new variable.
xiv) Multiply the new variable with 100 to get the number and again convert the new variable
into unsigned int and store it in variable Var1.
xv) Move the cursor position to last and print the character(‘V’) for Voltage unit.
xvi) End.

Digital Control SubSystem:

The digital control subsystem contains registers and logic to control the conversion process
and conversion sequences. Control registers and associated logic select the conversion resolution
(eight or ten bits), multiplexer input, and conversion sequencing mode, sample time, and ADC
clock cycle. As each input is converted, the digital control subsystem stores the result, one bit at a
time, in the successive approximation register (SAR) and then transfers the result to one of the
result registers. Each result is available in three formats (right-justified unsigned, left-justified
signed, and left-justified unsigned).

Modes of Operation:

The analog to digital conversion process can be configured for:

• Converter resolution

• Sample time length

• Module clock frequency

• Result data format

3-3
3-4
ATD Control Register Definitions:

ATD Control Register 2 (ATDCTL2):

– This register controls power down, interrupt and external trigger

– ATD Power Down

– ATD Fast Flag Clear All

– ATD Power Down in Wait Mode

– External Trigger Level/Edge Control

– External Trigger Polarity

– External Trigger Mode Enable

– ATD Sequence Complete Interrupt Enable

– ATD Sequence Complete Interrupt Flag

– ATD Control Register 3 (ATDCTL3)

– This register controls the conversion sequence length, FIFO for results registers and
behavior in Freeze Mode

– Result Register FIFO Mode

– Background Debug Freeze Enable

3-5
3-6
• ATD Control Register 4 (ATDCTL4):

– This register selects the conversion clock frequency, the length of the second phase
of the sample time and the resolution of the A/D conversion

– A/D Resolution Select

– Sample Time Select

– ATD Clock Prescaler

Bus Clock = 4MHz

ATD Clock operates between 500kHz – 2 MHz

• ATD Control Register 5 (ATDCTL5)

– This register selects the type of conversion sequence and the analog input
channels sampled

– Result Register Data Justification


• 0 Left justified data in the result registers
• 1 Right justified data in the result registers

3-7
3-8
– Result Register Data Signed or Unsigned Representation
• 0 Unsigned data representation in the result registers
• 1 Signed data representation in the result registers
– Continuous Conversion Sequence Mode
• 0 Single conversion sequence
• 1 Continuous conversion sequences (scan mode)
– Multi-Channel Sample Mode
• 0 Sample only one channel
• 1 Sample across several channels
– Analog Input Channel Select Code
– These bits select the analog input channel(s) whose signals are sampled and
converted to digital codes
• ATD Status Register 0 (ATDSTAT0)
– This read-only register contains the sequence complete flag, overrun flags for
external trigger and FIFO mode, and the conversion counter

– Sequence Complete Flag


– External Trigger Overrun Flag
– FIFO Over Run Flag
– Conversion Counter

Result:
Thus, the implementation of digital voltmeter by interfacing the A/D converter and
LCD using freescale HCS12 application module with the given specification has been performed

3-9
3-10
Ex. No: 3b Date:

Photo Sensor Interfacing with A/D


Aim :

To toggle the LEDs depending on the intensity of the light by interfacing A/D converter
and LCD in Freescale HCS12 application module.

Software Requirements:

Freescale code warrior development Studio version 5.0

Hardware Requirements:

i) Personal Computer
ii) MC9S12 Freescale Application Module
iii) Interface card
iv) Project Board PBMCUSLK

Theory:

Photo-Sensor:
A 4mm photocell light sensor exhibiting 23K – 33K ohms of output resistance has
been provided. Output resistance is inversely related to incident light intensity. Further the
intensity of light is inversely proportional to the distance. A gain stage (U5) amplifies the sensor
output before connecting to the MCU. The SENSOR connects to analog input PAD04/AN04 on
the MCU. Table 1 shows the associated signal connection for the sensor. Table 2 shows the
associated USER enable position to enable the sensor.
Table 1: User I/O

3-11
Program:
#include <hidef.h> /* common defines and macros */
#include "derivative.h" /* derivative-specific definitions */
#include "math.h"

void delay(void);
void main(void){
DDRB=0xF0;
PORTB=0xFF;
ATD0CTL2=0x80;
ATD0CTL3=0x08;
ATD0CTL4=0xE3;
for(;;){

ATD0CTL5=0x84;
while(!(ATD0STAT0 & 0x80)){
PORTB=ATD0DR0L;
if ((PORTB > 0x00) && (PORTB<0xFF)){
PORTB = 0xFF; //LED IS OFF
delay();
PORTB=0x00;
delay();
}
else if (PORTB == 0xFF)//FF->255
{
PORTB=0x00;
}
else {
PORTB=0xFF;
}
}
}
}

void delay(void){

int i,j;
for (i=0;i<100;i++){
for (j=0;j<100;j++){
}
}
}

3-12
Algorithm:
i) Start.
ii) Declare upper 4 pins of PORTB as output.
iii) Make the PORTB LED’s in Off state initially.
iv) Assign the ATD register 2 with the control register 0x80.
v) Assign the ATD register 3 with the control register 0x08.
vi) Assign the ATD register 4 with the control register 0xE3.
vii) Inside the infinite forever loop Assign ATD register 5 with the control words 0x84.
viii) While ATD status register’s MSB is not equal to 1, do the following.
ix) Assign ATD0DR0L to PORTB.
x) If the intensity of light is less, switch off the LED’s.
xi) If the intensity of light is in between 0 to 255, toggle the LED’s.
xii) If the intensity of light is maximum, switch on the LED’s.
xiii) End.

Result:
Thus, the interfacing of Photo sensor with A/D converter has been done and the toggling
of LED’s depending on the intensity of light has been performed.

3-13
3-14
Ex. No: 3c Date:

Interfacing Potentiometer with A/D and activate the Buzzer


Aim :

To toggle the state of buzzer depending on the potentiometer value by interfacing A/D
converter in Freescale HCS12 application module.

Software Requirements:

Freescale code warrior development Studio version 5.0

Hardware Requirements:

i) Personal Computer
ii) MC9S12 Freescale Application Module
iii) Interface card
iv) Project Board PBMCUSLK

Theory:

POT:

A single-turn, 3/8 inch, 5K ohm trimmer potentiometer (POT) has been provided as user,
analog input. The part is decoupled to minimize noise during adjustment. The POT connects to
analog input PAD05/AN05 on the MCU. Table 1 shows the associated connection signal for the
POT.

Table 1 : User I/O

3-15
Program:

Interfacing Buzzer with A/D Converter


#include <hidef.h>
#include "derivative.h"
void delay(void){
int i,j;
for(i=0;i<10;i++){
for(j=0;j<10;j++){
}
}
}
void main(void){

ATD0CTL2=0x80;
ATD0CTL3=0x08;
ATD0CTL4=0xE3;
for (;;){

ATD0CTL5 = 0x85;
DDRT=0xFF;
DDRB=0xFF;
PTT=0x20;
while(!(ATD0STAT0&0x80)) {

PORTB=ATD0DR0L;
if(ATD0DR0L>0x02) {

PTT=0x01;
delay();
}

else{
PTT=0x00;
}
}
}
}

3-16
Algorithm:

i) Start.
ii) Declare PORT T as output.
iii) Assign the ATD register 2 with control word 0x80.
iv) Assign the ATD register 3 with control word 0x08.
v) Assign the ATD register 2 with control word 0xE3.
vi) Inside the infinite forever loop, assign the ATD register 5 with control word 0x85.
vii) While the ATD status register flag is not set, do the following.
viii) If ATD data register value is greater than say 0x02, turn on the buzzer.
ix) If the ATD data register value is less than 0x02, turn off the buzzer.
x) End.

Result:

Thus, the interfacing of potentiometer with the A/D converter and activating the buzzer
using potentiometer has been performed using HCS12 application module.

3-17

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