SLOS065D − MARCH 1991 − REVISED APRIL 2002

D 2.5-V Virtual Ground for 5-V/GND Analog D Excellent Regulation Characteristics

Systems − Output Regulation
D High Output-Current Capability −45 µV Typ at IO = 0 to −10 mA
Sink or Source . . . 20 mA Typ +15 µV Typ at IO = 0 to + 10 mA
− Input Regulation = 1.5 µV/V Typ
D Micropower Operation . . . 170 µA Typ
D Low-Impedance Output . . . 0.0075 Ω Typ
D Macromodel Included

description OUTPUT REGULATION

100
In signal-conditioning applications using a single VI = 5 V
power source, a reference voltage is required for 80

O − Output Voltage Change − µV

termination of all signal grounds. To accomplish
this, engineers have typically used solutions 60
TA = − 40°C
consisting of resistors, capacitors, operational 40 TA = 0°C
amplifiers, and voltage references. Texas Instru- TA = − 55°C
ments has eliminated all of those components 20
with one easy-to-use 3-terminal device. That
0 TA = 125°C
device is the TLE2425 precision virtual ground. TA = 25°C
TA = 25°C
−20
Use of the TLE2425 over other typical circuit
solutions gives the designer increased dynamic −40
signal range, improved signal-to-noise ratio,
∆VV)

lower distortion, improved signal accuracy, and −60 TA = 125°C

easier interfacing to ADCs and DACs. These −80 TA = − 55°C
benefits are the result of combining a precision
micropower voltage reference and a high-perfor- −100
−10 −8 −6 −4 −2 0 2 4 6 8 10
mance precision operational amplifier in a single IO − Output Current − mA
silicon chip. It is the precision and performance of
these two circuit functions together that yield such
dramatic system-level performance.
The TLE2425 improves input regulation as well as output regulation and, in addition, reduces output impedance
and power dissipation in a majority of virtual-ground-generation circuits. Both input regulation and load
regulation exceed 12 bits of accuracy on a single 5-V system. Signal-conditioning front ends of data acquisition
systems that push 12 bits and beyond can use the TLE2425 to eliminate a major source of system error.

AVAILABLE OPTIONS
PLASTIC
SMALL OUTLINE
TA TO-226AA
(D)
(LP)
0°C to 70°C TLE2425CD TLE2425CD
−40°C to 85°C TLE2425ID TLE2425ID
−55°C to 125°C TLE2425MD —
† The D package is available taped and reeled. Add R suffix to
the device type (e.g., TLE2425CDR).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

          !"# $% Copyright  2002, Texas Instruments Incorporated
$   ! ! &   ' 
$$ ()% $ !* $  #) #$
*  ## !%

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

D, OR JG PACKAGE LP PACKAGE
(TOP VIEW) (TOP VIEW)

OUT 1 8 NC IN
COMMON 2 7 NC
COMMON
IN 3 6 NC
NC 4 5 NC OUT

NC − No internal connection

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Continuous input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80 mA
Duration of short-circuit current at (or below) 25°C (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C-suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I-suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
M-suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D package . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or LP package . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation
rating is not exceeded.
DISSIPATION RATING TABLE
TA ≤ 25
25°C
C DERATING FACTOR TA = 70
70°C
C TA = 85
85°C
C TA = 125
125°C
C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING
D 725 mV 5.8 mW/°C 464 mW 377 mW 145 mW
JG 1050 mV 8.4 mW/°C 672 mW 546 mW 210 mW
LP 775 mV 6.2 mW/°C 496 mW 403 mW 155 mW

recommended operating conditions

C-SUFFIX I-SUFFIX M-SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX
Input voltage, VI 4 40 4 40 4 40 V
Operating free-air temperature, TA 0 70 −40 85 −55 125 °C

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

electrical characteristics at specified free-air temperature, VI = 5 V, IO = 0 (unless otherwise noted)

TLE2425C
PARAMETER TEST CONDITIONS TA† UNIT
MIN TYP MAX
25°C 2.48 2.5 2.52
Output voltage V
Full range 2.47 2.53
Temperature coefficient of output voltage 25°C 20 ppm/°C
25°C 170 250
Bias current IO = 0 µA
A
Full range 250
25°C 1.5 20
VI = 4.5 V to 5.5 V µV
V
Full range 25
Input voltage regulation
25°C 1.5 20
VI = 4 V to 40 V µV/V
V/V
Full range 25
Ripple rejection f = 120 Hz, ∆VI(PP) = 1 V 25°C 80 dB
25°C −160 −45 160
IO = 0 to − 10 mA
Output voltage regulation (source current)‡ Full range −250 250 µV
IO = 0 to − 20 mA 25°C −450 −150 450
25°C −160 15 160
IO = 0 to 10 mA
Output voltage regulation (sink current)‡ Full range −250 250 µV
IO = 0 to 20 mA 25°C −235 65 235
Long-term drift of output voltage ∆t = 1000 h, Noncumulative 25°C 15 ppm
Output impedance 25°C 7.5 22.5 mΩ
Short-circuit output current (sink current) VO = 5 V 30 55
25°C mA
Short-circuit output current (source current) VO = 0 −30 −50
Output noise voltage, rms f = 10 Hz to 10 kHz 25°C 100 µV
VO to 0.1%, CL = 0 110
IO = ± 10 mA CL = 100 pF 115
Output voltage response to output current step 25°C µss
VO to 0.01%, CL = 0 180
IO = ± 10 mA CL = 100 pF 180
VI = 4.5 to 5.5 V, VO to 0.1% 12
Output voltage response to input voltage step 25°C µss
VI = 4.5 to 5.5 V, VO to 0.01% 30
VI = 0 to 5 V, VO to 0.1% 125
Output voltage turn-on response 25°C µss
VI = 0 to 5 V, VO to 0.01% 210
† Full range is 0°C to 70°C.
‡ The listed values are not production tested.

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

electrical characteristics at specified free-air temperature, VI = 5 V, IO = 0 (unless otherwise noted)

TLE2425I
PARAMETER TEST CONDITIONS TA† UNIT
MIN TYP MAX
25°C 2.48 2.5 2.52
Output voltage V
Full range 2.47 2.53
Temperature coefficient of output voltage 25°C 20 ppm/°C
25°C 170 250
Bias current IO = 0 µA
A
Full range 250
25°C 1.5 20
VI = 4.5 V to 5.5 V µV
V
Full range 75
Input voltage regulation
25°C 1.5 20
VI = 4 V to 40 V µV/V
V/V
Full range 75
Ripple rejection f = 120 Hz, ∆VI(PP) = 1 V 25°C 80 dB
25°C −160 −45 160
IO = 0 to − 10 mA
Output voltage regulation (source current)‡ Full range −250 250 µV
IO = 0 to − 20 mA 25°C −450 −150 450
25°C −160 15 160
IO = 0 to 8 mA
Output voltage regulation (sink current)‡ Full range −250 250 µV
IO = 0 to 20 mA 25°C −235 65 235
Long-term drift of output voltage ∆t = 1000 h, Noncumulative 25°C 15 ppm
Output impedance 25°C 7.5 22.5 mΩ
Short-circuit output current (sink current) VO = 5 V 30 55
25°C mA
Short-circuit output current (source current) VO = 0 −30 −50
Output noise voltage, rms f = 10 Hz to 10 kHz 25°C 100 µV
VO to 0.1%, CL = 0 110
IO = ± 10 mA CL = 100 pF 115
Output voltage response to output current step 25°C µss
VO to 0.01%, CL = 0 180
IO = ± 10 mA CL = 100 pF 180
VI = 4.5 to 5.5 V, VO to 0.1% 12
Output voltage response to input voltage step 25°C µss
VI = 4.5 to 5.5 V, VO to 0.01% 30
VI = 0 to 5 V, VO to 0.1% 125
Output voltage turn-on response 25°C µss
VI = 0 to 5 V, VO to 0.01% 210
† Full range is − 40°C to 85°C.
‡ The listed values are not production tested.

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

electrical characteristics at specified free-air temperature, VI = 5 V, IO = 0 (unless otherwise noted)

TLE2425M
PARAMETER TEST CONDITIONS TA† UNIT
MIN TYP MAX
25°C 2.48 2.5 2.52
Output voltage V
Full range 2.47 2.53
Temperature coefficient of output voltage 25°C 20 ppm/°C
25°C 170 250
Bias current IO = 0 µA
A
Full range 250
25°C 1.5 20
VI = 4.5 V to 5.5 V µV
V
Full range 100
Input voltage regulation
25°C 1.5 20
VI = 4.5 V to 40 V µV/V
V/V
Full range 100
Ripple rejection f = 120 Hz, ∆VI(PP) = 1 V 25°C 80 dB
25°C −160 −45 160
IO = 0 to − 10 mA
Output voltage regulation (source current)‡ Full range −250 250 µV
IO = 0 to − 20 mA 25°C −450 −150 450
25°C −160 15 160
IO = 0 to 3 mA
Output voltage regulation (sink current)‡ Full range −250 250 µV
IO = 0 to 20 mA 25°C −235 65 235
Long-term drift of output voltage ∆t = 1000 h, Noncumulative 25°C 15 ppm
Output impedance 25°C 7.5 22.5 mΩ
Short-circuit output current (sink current) VO = 5 V 30 55
25°C mA
Short-circuit output current (source current) VO = 0 −30 −50
Output noise voltage, rms f = 10 Hz to 10 kHz 25°C 100 µV
VO to 0.1%, CL = 0 110
IO = ± 10 mA CL = 100 pF 115
Output voltage response to output current step 25°C µss
VO to 0.01%, CL = 0 180
IO = ± 10 mA CL = 100 pF 180
VI = 4.5 to 5.5 V, VO to 0.1% 12
Output voltage response to input voltage step 25°C µss
VI = 4.5 to 5.5 V, VO to 0.01% 30
VI = 0 to 5 V, VO to 0.1% 125
Output voltage turn-on response 25°C µs
VI = 0 to 5 V, VO to 0.01% 210
† Full range is − 55°C to 125°C.
‡ The listed values are not production tested.

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

TYPICAL CHARACTERISTICS

Table Of Graphs
FIGURE
Distribution 1
Output voltage
vs Free-air temperature 2
Output voltage hysteresis vs Free-air temperature 3
vs Input voltage 4
Input bias current
vs Free-air temperature 5
Input voltage regulation 6
Ripple rejection vs Frequency 7
Output voltage regulation 8
Output impedance vs Frequency 9
Short-circuit output current vs Free-air temperature 10
Spectral noise voltage density vs Frequency 11
Wide-band noise voltage vs Frequency 12
Output voltage change with current step vs Time 13
Output voltage change with voltage step vs Time 14
Output voltage power-up response vs Time 15
Output current vs Load capacitance 16

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

TYPICAL CHARACTERISTICS†
OUTPUT VOLTAGE
DISTRIBUTION OF vs
OUTPUT VOLTAGE FREE-AIR TEMPERATURE
24 2.53
VI = 5 V 100 Units Tested VI = 5 V
TA = 25°C From 1 Wafer Lot IO = 0
20 2.52
Percentage of Units − %

O − Output Voltage − V
16 2.51

12 2.5

8 2.49

VV)
4 2.48

0 2.47
2.48 2.49 2.5 2.51 2.52 −75 −50 −25 0 25 50 75 100 125
VO − Output Voltage − V TA − Free-Air Temperature − °C

Figure 1 Figure 2

OUTPUT VOLTAGE HYSTERESIS INPUT BIAS CURRENT

vs vs
FREE-AIR TEMPERATURE INPUT VOLTAGE
4 250
VI = 5 V IO = 0
Normalized to First 25°C VO TA = 25°C
2
Output Voltage Hysteresis − mV

200
I IB − Input Bias Current − µ A

Start Point
0
End Point
150
−2

−4
100

−6
IIB

50
−8

−10 0
−75 −50 −25 0 25 50 75 100 125 0 5 10 15 20 25 30 35 40
TA − Free-Air Temperature − °C VI − Input Voltage − V

Figure 3 Figure 4

† Data at high and low temperatures are applicable within rated operating free-air temperature ranges of the various devices.

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

TYPICAL CHARACTERISTICS†
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE INPUT VOLTAGE REGULATION
172 80
VI = 5 V IO = 0
170 IO = 0 TA = 25°C
168

O − Output Voltage Change − µV

60
I IB − Input Bias Current − µ A

166

164
40
162
160

158 20

156
IIB

∆ VV)
154

152

150 −20
−75 −50 −25 0 25 50 75 100 125 0 10 20 30 40
TA − Free-Air Temperature − °C VI − Input Voltage − V

Figure 5 Figure 6

RIPPLE REJECTION
vs
FREQUENCY OUTPUT VOLTAGE REGULATION
90 100
VI = 5 V
80
80
O − Output Voltage Change − µV

60 TA = − 40°C
70 TA = 0°C
40
Ripple Rejection − dB

TA = − 55°C
60 20

50 0 TA = 125°C
TA = 25°C TA = 25°C
−20
40
−40
∆VV)

30
VI = 5 V −60 TA = 125°C
∆VI(PP) = 1 V
20 TA = − 55°C
IO = 0 −80
TA = 25°C
10 −100
10 100 1k 10 k 100 k 1M −10 −8 −6 −4 −2 0 2 4 6 8 10
f − Frequency − Hz IO − Output Current − mA

Figure 7 Figure 8

† Data at high and low temperatures are applicable within rated operating free-air temperature ranges of the various devices.

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE SHORT-CIRCUIT OUTPUT CURRENT
vs vs
FREQUENCY FREE-AIR TEMPERATURE
56
100
VI = 5 V IO = 0 IOS
TA = 25°C

I OS − Short-Circuit Output Current − mA

54 Output Sink, VO = 5 V
10
z o − Output Impedance − Ω

52 −IOS
Output Source, VO = 0
IO = 10 mA 50
1
48

0.1 46

IO = − 10 mA 44
0.01

IOS
42
VI = 5 V
0.001 40
10 100 1k 10 k 100 k 1M −75 −50 −25 0 25 50 75 100 125
f − Frequency − Hz TA − Free-Air Temperature − °C

Figure 9 Figure 10

SPECTRAL NOISE VOLTAGE DENSITY WIDE-BAND NOISE VOLTAGE

vs vs
FREQUENCY FREQUENCY
1400 80
VI = 5 V
Vn − Spectral Noise Voltage Density − nV/ Hz

1200 70 TA = 25°C
1 Hz to Frequency Indicated
V rms

60
1000
Wide-Band Noise Voltage − µV

1 Pole Low Pass

50
800
40
600
30

400
20
2 Pole Low Pass
200 10
VI = 5 V
TA = 25°C
0 0
1 10 100 1k 10 k 100 k 10 100 1k 10 k 100 k
f − Frequency − Hz f − Frequency − Hz

Figure 11 Figure 12

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

TYPICAL CHARACTERISTICS

OUTPUT VOLTAGE RESPONSE OUTPUT VOLTAGE RESPONSE

TO OUTPUT CURRENT STEP TO INPUT VOLTAGE STEP
vs vs
TIME TIME
1.5 V 500

4 4 IO = 0
∆V O − Change In Output Voltage − mV

VI = 5 V

∆V O − Change In Output Voltage − mV

3 CL = 100 pF
3 CL = 100 pF
TA = 25°C 0.1 %
0.1 % TA = 25°C
2 2

1 1 0.01 %
0.01 %
0
0 VO Response
VO Response 0.01 %
−1
−1
VI = 5.5 V
−2 −2
10 mA 0.1 %
0.1 %
−3 IO Step −3 VI = 4.5 V VI = 4.5 V
0
−4 VI Step
−4 −10 mA
−500
−1.5 V
0 0 50 100 150 200
150 300 450 600 750 900 1050
t − Time − s t − Time
s

Figure 13 Figure 14

STABILITY RANGE
OUTPUT VOLTAGE POWER-UP RESPONSE OUTPUT CURRENT
vs vs
TIME LOAD CAPACITANCE
3 20
IO = 0
0.1 %
CL = 100 pF VI = 5 V
TA = 25°C 15 Unstable
TA = 25°C

2 10
O − Output Voltage − V

I O − Output Current − mA

5
Output Voltage Response
1 0

−5 Stable
VV)

0 −10

5 −15
Input Voltage Step
0
−20
0 10 20 130 10 −6 10 −5 10 −4 10 −3 10 −2 10 −1 10 0 10 1 10 2
t − Time
s CL− Load Capacitance − F

Figure 15 Figure 16

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

macromodel information
* TLE2425 OPERATIONAL AMPLIFIER “MACROMODEL” SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.03 ON 08/21/90 AT 13:51
* REV (N/A) SUPPLY VOLTAGE: 5 V
* CONNECTIONS: INPUT
* | COMMON
* | | OUTPUT
* | | |
.SUBCKT TLE2425 3 4 5
*

* OPAMP SECTION
C1 11 12 21.66E − 12
C2 6 7 30.00E − 12
C3 87 0 10.64E − 9
CPSR 85 86 15.9E − 9
DCM+ 81 82 DX
DCM− 83 81 DX
DC 5 53 DX
DE 54 5 DX
DLN 92 90 DX
DLP 90 91 DX
DP 4 3 DX
ECMR 84 99 (2,99) 1
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
EPSR 85 0 POLY(1) (3,4) −16.22E−6 3.24E−6
ENSE 89 2 POLY(1) (88,0) 120E−6 1
FB 7 99 POLY(6) VB VC VE VLP VLN VPSR O 74.8E6 −10E6 10E6 10E6
+ −10E6 74E6
GA 6 0 11 12 320.4E−6
GCM 0 6 10 99 1.013E−9
GPSR 85 86 (85,86) 100E−6
GRC1 4 11 (4,11) 3.204E−4
GRC2 4 12 (4,12) 3.204E−4
GRE1 13 10 (13,10) 1.038E−3
GRE2 14 10 (14,10) 1.038E−3
HLIM 90 0 VLIM 1K
HCMR 80 1 POLY(2) VCM+ VCM− 0 1E2 1E2
IRP 3 4 146E−6
IEE 3 10 DC 24.05E−6
IIO 2 0 .2E−9
I1 88 0 1E−21
Q1 11 89 13 QX
Q2 12 80 14 QX
R2 6 9 100.0E3
RCM 84 81 1K
REE 10 99 8.316E6
RN1 87 0 2.55E8
RN2 87 88 11.67E3

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SLOS065D − MARCH 1991 − REVISED APRIL 2002

macromodel information (continued)

RO1 8 5 63
RO2 7 99 62
VCM+ 82 99 1.0
VCM− 83 99 −2.3
VB 9 0 DC 0
VC 3 53 DC 1.400
VE 54 4 DC 1.400
VLIM 7 8 DC 0
VLP 91 0 DC 30
VLN 0 92 DC 30
VPSR 0 86 DC 0
RFB 5 2 1K
RIN 30 1 1K
RCOM 34 4 .1
*REGULATOR SECTION
RG1 30 0 20MEG
RG2 30 31 .2
RG3 31 35 400K
RG4 35 34 411K
RG5 31 36 25MEG
HREG 31 32 POLY(2) VPSET VNSET 0 1E2 1E2
VREG 32 33 DC 0V
EREG 33 34 POLY(1) (36,34) 1.23 1
VADJ 36 34 1.27V
HPSET 37 0 VREG 1.030E3
VPSET 38 0 DC 20V
HNSET 39 0 VREG 6.11E5
VNSET 40 0 DC −20V
DSUB 4 34 DX
DPOS 37 38 DX
DNNEG 40 39 DX
.MODEL DX D(IS=800.0E−18)
.MODEL QX PNP(IS=800.0E−18 BF=480)
.ENDS

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 PACKAGE OPTION ADDENDUM

www.ti.com 7-Apr-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

TLE2425CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2425C Samples

TLE2425CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2425C Samples

TLE2425CLP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 2425C Samples

TLE2425CPS ACTIVE SO PS 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM Q2425 Samples

TLE2425CPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM Q2425 Samples

TLE2425ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2425I Samples

TLE2425IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2425I Samples

TLE2425IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2425I Samples

TLE2425ILP ACTIVE TO-92 LP 3 1000 RoHS & Green SN N / A for Pkg Type 2425I Samples

TLE2425MD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 2425M Samples

TLE2425MDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 2425M Samples

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 7-Apr-2024

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Dec-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLE2425CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLE2425CPSR SO PS 8 2000 330.0 16.4 8.35 6.6 2.4 12.0 16.0 Q1
TLE2425IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Dec-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLE2425CDR SOIC D 8 2500 350.0 350.0 43.0
TLE2425CPSR SO PS 8 2000 356.0 356.0 35.0
TLE2425IDR SOIC D 8 2500 350.0 350.0 43.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Dec-2023

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TLE2425CD D SOIC 8 75 505.46 6.76 3810 4
TLE2425CPS PS SOP 8 80 530 10.5 4000 4.1
TLE2425ID D SOIC 8 75 505.46 6.76 3810 4
TLE2425IDG4 D SOIC 8 75 505.46 6.76 3810 4
TLE2425MD D SOIC 8 75 505.46 6.76 3810 4

Pack Materials-Page 3
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
LP0003A SCALE 1.200 SCALE 1.200
TO-92 - 5.34 mm max height
TO-92

5.21
4.44

EJECTOR PIN
OPTIONAL
5.34
4.32

(1.5) TYP

(2.54) SEATING
2X NOTE 3 PLANE
4 MAX
(0.51) TYP
6X
0.076 MAX
SEATING
PLANE
3X
12.7 MIN

0.43
2X 0.55 3X
3X 0.35
2.6 0.2 0.38
2X 1.27 0.13
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL STRAIGHT LEAD OPTION
TO STRAIGHT LEAD OPTION

2.67
3X
2.03 4.19
3.17
3 2 1

3.43 MIN

4215214/B 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.

www.ti.com
 EXAMPLE BOARD LAYOUT
LP0003A TO-92 - 5.34 mm max height
TO-92

FULL R
0.05 MAX (1.07) TYP
ALL AROUND METAL 3X ( 0.85) HOLE
TYP TYP

2X
METAL
(1.5) 2X (1.5)

2X
SOLDER MASK
OPENING
1 2 3
(R0.05) TYP 2X (1.07)
(1.27)
SOLDER MASK
(2.54)
OPENING

LAND PATTERN EXAMPLE

STRAIGHT LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X

0.05 MAX ( 1.4) 2X ( 1.4)

ALL AROUND METAL
TYP 3X ( 0.9) HOLE

METAL

2X
1 2 3 SOLDER MASK
(R0.05) TYP
(2.6) OPENING
SOLDER MASK
OPENING (5.2)

LAND PATTERN EXAMPLE

FORMED LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X

4215214/B 04/2017

www.ti.com
 TAPE SPECIFICATIONS
LP0003A TO-92 - 5.34 mm max height
TO-92

13.7
11.7

32
23

(2.5) TYP 0.5 MIN

16.5
15.5

11.0 9.75
8.5 8.50

19.0
17.5

2.9 6.75 3.7-4.3 TYP

TYP
2.4 5.95
13.0
12.4

FOR FORMED LEAD OPTION PACKAGE

4215214/B 04/2017

www.ti.com
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