Session2

Digital Circuits

Acronyms Common Resources

SPLD = Simple Programmable Logic Device Configurable Logic Blocks (CLB)
• Memory Look-Up Table
PAL = Programmable Logic Array • AND-OR Planes
FPGA = Field Programmable Gate Array • Simple gates
Input / Output Blocks (IOB)
ASIC = Application Specific IC
• Bidirectional , laches , inverters, pullup/pulldowns
Interconnect or Routing
• Zeinab
Locl, Kalantari
internal feedback, and global
Full Custom

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ASIC (Application Specific IC)
• ASIC : Application Specific Integrated Circuits
• Semi-Custom ASIC
• Standard Cells
• ‫ﻋﻨﺎﺻﺮ در ردﯾﻒ ﻫﺎ ﭼﯿﺪه ﻣﯽ ﺷﻮﻧﺪ‬
• (‫ روي ﺳﻠﻮل ﻫﺎ‬: ‫ﭘﻮرت ﻫﺎ در ﺑﺎﻻ و ﭘﺎﯾﯿﻦ ﺳﻠﻮل ﻫﺎ )ﺗﮑﻨﻮﻟﻮژي ﺟﺪﯾﺪ‬
• Gate Array
• ‫آراﯾﻪ اي از ﺳﻠﻮل ﻫﺎي ﻣﺸﺎﺑﻪ‬
• PLD (Programmable Logic Device)

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 ‫ﺳﻠﻮل ﻫﺎي اﺳﺘﺎﻧﺪارد‬

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Mixed
• Full custom & Standard cells

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Gate Array (Uncommitted)
• Using a professional chip with active
devices like NAND gates.
• Later, interconnected according to a
custom order by adding metal layers in the
factory environment.

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Gate Array (Committed)
• MPGA: mask-programmed gate array C
• MPLD: mask-programmed logic device
A
• A base of pre-designed transistors
• Customized wiring during manufacturing
process
→Each design require custom mask for
wiring B
• Mask-making costs

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Programmable Logic Devices
• A programmable logic device or PLD is an electronic component used
to build digital circuits.

• Unlike a logic gate, which has a fixed function, a PLD has an

undefined function at the time of manfacture.

• Before the PLD can perform in a circuit it must be programmed.

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Digital Technology Tradeoffs

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Semicustom technologies
“PROGRAMMABLE”

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Programmable?
• One time programmable
• Fuses
(destroy internal links with
current)
• Anti-fuses (grow internal
links)
• PROM
• Reprogrammable
• EPROM
• EEPROM non-volatile
• Flash
• SRAM→ volatile
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‫‪Antifuse‬‬
‫• ﺟﺮﯾﺎن ﺑﺮﻧﺎﻣﻪ رﯾﺰي ﺑﺎﻻ ← ﻋﺎﯾﻖ ‪ ONO‬را ذوب ﻣﯽ ﮐﻨﺪ ← اﺗﺼﺎل دارﯾﻢ‪.‬‬
‫• ﺑﻪ ﻋﻠﺖ ﮐﻮﭼﮑﯽ‪ PLD ،‬ﻫﺎي آﻧﺘﯽ ﻓﯿﻮز ﻇﺮﻓﯿﺖ ﺑﺴﯿﺎر ﺑﺎﻻﯾﯽ دارﻧﺪ‪.‬‬

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‫‪Antifuse‬‬
‫• ﻣﺰاﯾﺎ‪:‬‬
‫• ﻋﺪم ﻧﯿﺎز ﺑﻪ ﺣﺎﻓﻈﻪ ﺧﺎرﺟﯽ‬
‫• ﻣﺴﺎﺣﺖ ﺑﺴﯿﺎر ﮐﻢ )ﺗﻘﺮﯾﺒﺎ ﻫﻢ اﻧﺪازه ﺑﺎ ‪ via‬ي ﺳﯿﻢ ﻫﺎي ﻓﻠﺰي(‬
‫• ﻗﺎﺑﻠﯿﺖ اﻃﻤﯿﻨﺎن ﺑﺴﯿﺎر ﺑﺎﻻ‬
‫• )‪ TDDB(Time-Dependent Dielectric Breakdown‬ﺣﺪود ‪ 40‬ﺳﺎل‬
‫ﻣﻘﺎوﻣﺖ ﮐﻢ در ﺣﺎﻟﺖ روﺷﻦ )در ﻃﯽ زﻣﺎن ﻫﻢ ﮐﻢ ﻣﯽ ﻣﺎﻧﺪ(‬ ‫•‬
‫ﺧﺎزن ﭘﺎرازﯾﺘﯽ ﺑﺴﯿﺎر ﮐﻤﺘﺮ‬ ‫•‬
‫اﻣﻨﯿﺖ ﺑﺎﻻي ﻃﺮح در ﺑﺮاﺑﺮ ﺳﺮﻗﺖ‬ ‫•‬
‫ﺗﻮان ﻣﺼﺮﻓﯽ ﺑﺴﯿﺎر ﮐﻤﺘﺮ‬ ‫•‬
‫• ﻣﻌﺎﯾﺐ‬
‫• ﻋﺪم اﻣﮑﺎن ﺑﺮﻧﺎﻣﻪ رﯾﺰي ﻣﺠﺪد‬
‫• ﺑﺮﻧﺎﻣﻪ رﯾﺰي آن ﻧﯿﺎز ﺑﻪ ﻣﺪار اﺿﺎﻓﯽ دارد )ﺑﺎﯾﺪ وﻟﺘﺎژ و ﺟﺮﯾﺎن ﺑﺎﻻ اﯾﺠﺎد ﮐﻨﺪ(‬

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Programmable ROM (PROM)
• First ones had fusible links
• High voltage would blow out links
• Fast to program
• Single use

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UV EPROM
• Erasable PROM
• Common technologies used UV light to erase complete device
• Took about 10 minutes
• Holds states as charge in very well insulated areas of the chip
• Nonvolatile for several (10?)

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EPROM
• Electrically Erasable PROM
• Similar technology to UV EPROM
• Erased in blocks by higher voltage
• Programming slower than reading
• some called flash memory
• Digital cameras, MP3 players, BIOS
• Limited life
• Some support individual word write, some block
• Has a boot block that is carefully protected

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‫‪EPROM/EEPROM/Flash‬‬

‫• وﻟﺘﺎژ ﺑﺮﻧﺎﻣﻪ رﯾﺰي ﺑﺎﻻ ← ﻣﺤﺒﻮس اﻟﮑﺘﺮون ﻫﺎ ←‬

‫‪ Vdd‬ﻧﻤﯽ ﺗﻮاﻧﺪ ﺗﺮاﻧﺰﯾﺴﺘﻮر را روﺷﻦ ﮐﻨﺪ‪.‬‬
‫• ‪ : EEPROM‬ﺑﺎزﮔﺮداﻧﺪن اﻟﮑﺘﺮون ﻫﺎ ﺑﺎ ﻣﯿﺪان‬
‫اﻟﮑﺘﺮﯾﮑﯽ )ﻇﺮﻓﯿﺖ ﮐﻤﺘﺮ از ‪( EPROM‬‬
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SRAM

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‫‪SRAM‬‬
‫• ﻣﺰاﯾﺎ‬
‫• ﺑﺮﻧﺎﻣﻪ رﯾﺰي ﻣﺠﺪد ﺳﺮﯾﻊ‬
‫• ﺑﺮﻧﺎﻣﻪ رﯾﺰي ‪ on-chip‬ﺑﻪ دﻓﻌﺎت ﻧﺎﻣﺤﺪود‬
‫• ‪ prototyping‬در داﺧﻞ ﺳﯿﮑﻞ ﻃﺮاﺣﯽ‬
‫• ﮐﺎرﺧﺎﻧﻪ ﺳﺎزﻧﺪه ﻣﯽ ﺗﻮاﻧﺪ ﻫﻤﻪ ﻣﺴﯿﺮﻫﺎ را ﺑﺎ ‪ reprogram‬ﮐﺮدن ‪ FPGA‬ﺗﺴﺖ ﮐﻨﺪ‬
‫)←ﮐﺎرﺑﺮ‪ ،‬آي ﺳﯽ ﮐﺎﻣﻼ ﺗﺴﺖ ﺷﺪه را ﻣﯽ ﮔﯿﺮد و ﻧﯿﺎزي ﺑﻪ اﯾﺠﺎد اﻟﮕﻮﻫﺎي ﺗﺴﺖ و ﻣﺪارﻫﺎي ‪ DFT‬ﻧﺪارد(‬
‫• ﻣﻌﺎﯾﺐ‬
‫ﻣﺴﺎﺣﺖ )اﺷﮑﺎل اﺻﻠﯽ( ‪ :‬ﭘﻨﺞ ﺗﺮاﻧﺰﯾﺴﺘﻮر ﺑﺮاي ﻫﺮ ﺳﻠﻮل ‪ SRAM‬ﺑﻪ اﺿﺎﻓﻪ ﯾﮏ ﺗﺮاﻧﺰﯾﺴﺘﻮر ﺑﺮاي ﺳﻮﺋﯿﭻ‬ ‫•‬
‫ﻧﯿﺎز ﺑﻪ ﺣﺎﻓﻈﻪ ﺧﺎرﺟﯽ ‪) non-volattile‬داراي ﻣﺪار ﺣﺴﮕﺮ ‪ power-on‬اﺳﺖ ﺑﺮاي ‪( initialization‬‬ ‫•‬
‫اﻣﻨﯿﺖ ﮐﻢ ﻃﺮح در ﺑﺮاﺑﺮ ﺳﺮﻗﺖ )‪(intellectual property‬‬ ‫•‬
‫ﺗﻮان ﻣﺼﺮﻓﯽ ﺑﺎﻻي ﺳﻠﻮل ﻫﺎي ‪ ) SRAM‬ﺣﺘﯽ وﻗﺘﯽ ﮐﻪ ﺑﺮﻧﺎﻣﻪ آن ﺗﻐﯿﯿﺮ ﻧﻤﯽ ﮐﻨﺪ(‬ ‫•‬

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PROGRAMMABLE LOGIC DEVICE
(PLD)

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Three FPLD Types
• Simple Programmable Logic Device (SPLD)
• LSI device (Less than 1000 logic gates)
• PLA or PAL
• Fixed internal routing, deterministic propagation delays
• Complex Programmable Logic Device (CPLD)
• VLSI device (Higher logic capacity than SPLDs)
• Multiple SPLDs onto a single chip
• Programmable interconnect
• Field Programmable Gate Array (FPGA)
• VLSI device (Higher logic capacity than CPLDs)
• An array of logic blocks
• Large number of gates, user selectable interconnection , delays depending on design and
routing
• A high ratio of flip-flops to logic resources

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Simple PLD (SPLD)
• Popular SPLD Architecture Types
• Programmable Logic Array, PLA
• Programmable Array Logic, PAL
• General Array Logic, GAL
• others
• Architecture Differences
• AND versus OR implementation
• Programmability (e.g. EE)
• Fundamental logic block

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PAL & PLA

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SPLD-PLA

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SPLD - PAL

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SPLD - PAL
• An actual PAL device
• PAL 16L8
• 32 input AND gate
• up to 8 output functions

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PAL Outputs

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PAL Product Terms

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PAL Example

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PAL Example

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CPLD

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CPLD
• PALs and GALs are available only in small sizes
• equivalent to a few logic gated
• For bigger logic circuits, complex PLDs or CPLDs can be used.
• CPLDs contain the equivalent of several PALs/GALs
• linked by programmable interconnections
• all in one integrated circuits(IC)
• CPLDs can replace thousands , or even hundreds of thousands, of
individual logic gates
• increased integration density

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CPLD

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Programmable Interconnect Array
• Consist of connectors that run throughout the CPLD to connect the
microcells in each LAB
• the PIA also connects the AND gate and other elements of the
microcells

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