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Exp3 Final Report Grp6

This document outlines Experiment No. 3 focused on the Arithmetic Logic Unit (ALU), detailing objectives such as building a circuit with an ALU using IC 74181 and performing various arithmetic and logic operations. It includes materials needed, procedures for setting up the circuit, and observations made during the experiment, highlighting the ALU's capabilities and limitations. The conclusion emphasizes the understanding gained about the ALU's operations and the importance of the 4-bit processing capacity.

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0% found this document useful (0 votes)
2 views

Exp3 Final Report Grp6

This document outlines Experiment No. 3 focused on the Arithmetic Logic Unit (ALU), detailing objectives such as building a circuit with an ALU using IC 74181 and performing various arithmetic and logic operations. It includes materials needed, procedures for setting up the circuit, and observations made during the experiment, highlighting the ALU's capabilities and limitations. The conclusion emphasizes the understanding gained about the ALU's operations and the importance of the 4-bit processing capacity.

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gg7266522206602
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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NAME/GROUP:

GROUP 6

BALAGUER, AERIEL JOHN RATING:

DE LA CRUZ, MARIANE IRISH C. INSTRUCTOR: ENGR. EDWIN PURISIMA

JANABAN, JOHN MARK

PECHO, JOHN LEATHNER

VILLANUEVA, ABIGAIL JOY

TIME / SECTION: MH 1:30PM-4:30 PM / CEIT - 03 - 602A

EXPERIMENT NO. 3

THE ARITHMETIC LOGIC UNIT (ALU)

I.OBJECTIVES:

1. To build a circuit containing an ALU using IC 74181 and program it to perform various
arithmetic and logic operations.

2. To predict the results from the ALU if given specific input conditions and operations.

3. To use an ALU to design and build a 4-bit adder with an overflow indicator.

II. MATERIALS NEEDED

1 – 74175 quad D flip-flop or equivalent 1 – 74181 ALU

1 – 7400 2-input NAND

10 – LED indicators
10 – 1k ohms resistor, ½ watt

III. PROCEDURE:

1. Connect the circuit shown in Figure 4. Clear the accumulator by sorting the CLR input
to the ground.

1.
Add the value in the B register (0011) to the value in the accumulator (0000) with no
carry input. To do so, find the SELECT code and the correct MODE setting (on the ALU
pin specification). Note that the add function is shown with the “+” sign.

What is the correct SELECT logic for S0, S1, S2, and S3?

S0 = HIGH S2 = LOW S1 = LOW S3 = HIGH

What is the correct MODE logic? M = LOW

The Cn input is interpreted as the Cn for an Active High data. This is equivalent to Carry (C1).
Connect Cn to a HIGH to indicate no CARRY input.

What is the correct carry input logic? Cn = HIGH

When you have set up the SELECT, MODE, AND Cn logic connect the clock and observe the
result in the A register for one clock transition. List the output.

A result = 0011 F = A + B 0110 Cn+4 HIGH_______________

Note that the Cn+4 outputs are interested as Cn+4 for active high data. Also, as shown on
the data sheet, the A + B output is not valise unless the ALU is in the subtract mode. Observe
the output after two or more clock transitions, and verify that the result in the accumulator
is 1001

What is the logic level of the Cn+4 and A + B outputs?


Cn+4 = HIGH A + B =1100

2. Select the SELECT switches for performing an XOR of the data in A (1001) with the
data in B (0011). Show the logic level necessary to perform this operation.

S0 = LOW M = HIGH

S1 = HIGH Cn = HIGH S2 = HIGH

S3 = LOW

What is the result in A after one clock transition?

A = 1010

3. Without changing the SELECT and MODE switches, what happens after another clock
transition?

A =1001

4. Leave the result from step 4 in the A register. Set SELECT and MODE switches as
shown below and predict what output will appear.

S0 = H M =H S1 = L

S2 = L S3 = H

Predicted result:

A = 0101 F = 1001
Set the logic given above and provide one clock transition and check if your predicted result
is in the same as the output?

IV. QUESTIONS:

1. For each of the active HIGH logic functions listed in the 74181 function table, predict
the result assuming that A = 1001 and B = 0011_. Make another table showing your
predictions.

2. Repeat for ACTIVE LOW functions. Make another table.

V. OBSERVATION:

During our experiment with the ALU (Arithmetic Logic Unit), we observed that it
operates using two main 4-bit binary inputs, labeled A and B. These inputs are processed
based on control signals (S0, S1, S2, S3) that determine which arithmetic operation to
perform. As we ran the experiment, we noticed that all the calculations shown on the
display were a result of operations carried out by the ALU. We used the given values in
the circuit diagram to cycle through different values, which were then sent to the
selection inputs of the ALU. This allowed the ALU to perform calculations in real time.
We discovered that the ALU is not only capable of performing various operations, but it
can also retain previous results. However, one key limitation is that it can only handle 4-
bit inputs and outputs, meaning the calculations are confined to 4-bit values.

VI. CONCLUSION:
Through this experiment, we gained a clearer understanding of how the ALU works. We saw
that the ALU can perform basic arithmetic operations like addition, subtraction,
multiplication, and division, as well as logic operations like AND, OR, XOR, and NOT. By using
4-bit inputs for A and B, we observed how the ALU processes binary data. We also verified
the ALU's functions by building a truth table and running simulations. LEDs connected to the
outputs helped us visualize the data flow, making the behavior of the circuit easier to follow.
While the setup is fast and reliable, its limited flexibility and 4-bit processing capacity restrict
the range of operations it can handle.
VII. FIGURE 4
TABLE 1:

SELECTION M = HIGH (LOGICAL FUNCTIONS)

S3 S2 S1 S0 LOGICAL FUNCTIONS A F

L L L L F = A' 1001 0110

L L L H F = (A+B)' 0110 1000

L L H L F = A'B 1000 0011

L L H H F=0 0011 0000

L H L L F = (AB)' 0000 1111

L H L H F = B' 1111 1100

L H H L F=A⊕B 1100 1111

L H H H F = AB' 1111 1100

H L L L F = A'+B 1100 0011

H L L H F = (A⊕B)' 0011 1111

H L H L F=B 1111 0011

H L H H F = AB 0011 0011

H H L L F=1 0011 1111

H H L H F = A+B' 1111 1111

H H H L F = A+B 1111 1111

H H H H F=A 1111 1111


TABLE 2:

SELECTION M = LOW (ARITHMETIC OPERATION)

S3 S2 S1 S0 Cn = L (w/ NO CARRY) A F

L L L L F=A+1 1001 1010

L L L H F = (A+B) + 1 1010 1100

L L H L F = (A+B') + 1 1100 1101

L L H H F = ZERO 1101 0000

L H L L F = A+ AB'+ 1 0000 0001

L H L H F = (A+B) + AB'+ 1 0001 0100

L H H L F=A-B 0100 0001

L H H H F = AB' 0001 0000

H L L L F = A + AB + 1 0000 0001

H L L H F=A+B+1 0001 0101

H L H L F = (A+B') + AB + 1 0101 1111

H L H H F = AB 1111 0011

H H L L F=A+A+1 0011 0111

H H L H F = (A+B) + A + 1 0111 1111

H H H L F = (A+B') + A + 1 1111 1111

H H H H F=A 1111 1111


TABLE 3:

SELECTION M = LOW (ARITHMETIC OPERATION)

S3 S2 S1 S0 Cn = H (w/ CARRY) A F

L L L L F=A 1001 1001

L L L H F = (A+B) 1001 1011

L L H L F = A + B' 1011 1111

L L H H F = MINUS 1 (2's Complement) 1111 1111

L H L L F = A+AB' 1111 1011

L H L H F = (A+B) + AB' 1011 0011

L H H L F=A-B-1 0011 1111

L H H H F = AB'- 1 1111 1011

H L L L F = A + AB 1011 1110

H L L H F = A+B 1110 0111

H L H L F = (A+B') + AB 0111 0010

H L H H F = AB - 1 0010 0001

H H L L F = A+A 0001 0010

H H L H F = (A+B) + A 0010 0101

H H H L F = (A+B') + AB 0101 0010

H H H H F = A-1 0010 0001

FINAL REPORT LINK:

https://drive.google.com/file/d/15R-X1lJH1vU3Zgnln8sgxO56gIkyksLR/view?usp=drivesdk

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