NXP Semiconductors Document Number: A2I20D020N

Technical Data Rev. 1, 05/2017

RF LDMOS Wideband Integrated

Power Amplifiers A2I20D020NR1
The A2I20D020N wideband integrated circuit is designed with on--chip
A2I20D020GNR1
matching that makes it usable from 1400 to 2200 MHz. This multi--stage
structure is rated for 20 to 32 V operation and covers all typical cellular base
station modulation formats. 1400–2200 MHz, 2.5 W AVG., 28 V
1800–2200 MHz AIRFAST RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
 Typical Single--Carrier W--CDMA Characterization Performance:
VDD = 28 Vdc, IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA, Pout = 2.5 W Avg.,
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.(1)
Gps PAE ACPR
Frequency (dB) (%) (dBc)

1800 MHz 31.0 19.7 –44.3 TO--270WB--17

PLASTIC
1900 MHz 31.0 21.7 –45.0 A2I20D020NR1
2000 MHz 31.1 22.1 –45.2
2100 MHz 31.4 21.1 –45.2
2200 MHz 32.0 19.6 –44.8
1. All data measured in fixture with device soldered to heatsink.
TO--270WBG--17
PLASTIC
Features A2I20D020GNR1
 Extremely wide RF bandwidth
 RF decoupled drain pins reduce overall board space
 On--chip matching (50 ohm input, DC blocked)
 Integrated quiescent current temperature compensation with
enable/disable function (2)

2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF. Select Documentation/Application Notes -- AN1977 or AN1987.

 2016–2017 NXP B.V. A2I20D020NR1 A2I20D020GNR1

RF Device Data
NXP Semiconductors 1
 VDS1A
VBWA 17
VDS1A 1 VBWA(2)
VGS2A 2
RFinA RFout1/VDS2A VGS1A 3 16
RFinA 4 RFout1/VDS2A
N.C. 5
VGS1A GND 6
Quiescent Current 15 GND
GND 7
VGS2A Temperature Compensation (1)
N.C. 8
RFinB 9 14
VGS1B Quiescent Current VGS1B 10 RFout2/VDS2B
VGS2B Temperature Compensation (1) VGS2B 11
VDS1B 12 13
VBWB(2)

RFinB RFout2/VDS2B (Top View)

Note: Exposed backside of the package is
VDS1B VBWB the source terminal for the transistor.

Figure 1. Functional Block Diagram Figure 2. Pin Connections

1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated 2. Device can operate with VDD current
Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit supplied through pin 13 and pin 17.
Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.

Table 1. Maximum Ratings

Rating Symbol Value Unit
Drain--Source Voltage VDSS –0.5, +65 Vdc
Gate--Source Voltage VGS –0.5, +10 Vdc
Operating Voltage VDD 32, +0 Vdc
Storage Temperature Range Tstg –65 to +150 C
Case Operating Temperature Range TC –40 to +150 C
Operating Junction Temperature Range (3,4) TJ –40 to +225 C

Table 2. Thermal Characteristics

Characteristic Symbol Value (4,5) Unit
Thermal Resistance, Junction to Case RJC C/W
Case Temperature 74C, 2.5 W, 2000 MHz
Stage 1, 28 Vdc, IDQ1(A+B) = 30 mA 7.8
Stage 2, 28 Vdc, IDQ2(A+B) = 110 mA 2.9

Table 3. ESD Protection Characteristics

Test Methodology Class
Human Body Model (per JESD22--A114) 1A
Machine Model (per EIA/JESD22--A115) A
Charge Device Model (per JESD22--C101) II

Table 4. Moisture Sensitivity Level

Test Methodology Rating Package Peak Temperature Unit
Per JESD22--A113, IPC/JEDEC J--STD--020 3 260 C
3. Continuous use at maximum temperature will affect MTTF.
4. MTTF calculator available at http://www.nxp.com/RF/calculators.
5. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.

A2I20D020NR1 A2I20D020GNR1
RF Device Data
2 NXP Semiconductors
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Stage 1 -- Off Characteristics (1)
Zero Gate Voltage Drain Leakage Current IDSS — — 10 Adc
(VDS = 65 Vdc, VGS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current IDSS — — 1 Adc
(VDS = 32 Vdc, VGS = 0 Vdc)
Gate--Source Leakage Current IGSS — — 1 Adc
(VGS = 1.0 Vdc, VDS = 0 Vdc)
Stage 1 -- On Characteristics
Gate Threshold Voltage (1) VGS(th) 0.8 1.2 1.6 Vdc
(VDS = 10 Vdc, ID = 2 Adc)
Gate Quiescent Voltage VGS(Q) — 1.9 — Vdc
(VDS = 28 Vdc, IDQ1(A+B) = 32 mAdc)
Fixture Gate Quiescent Voltage VGG(Q) 7.5 8.2 9.0 Vdc
(VDD = 28 Vdc, IDQ1(A+B) = 32 mAdc, Measured in Functional Test)

Stage 2 -- Off Characteristics (1)

Zero Gate Voltage Drain Leakage Current IDSS — — 10 Adc
(VDS = 65 Vdc, VGS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current IDSS — — 1 Adc
(VDS = 32 Vdc, VGS = 0 Vdc)
Gate--Source Leakage Current IGSS — — 1 Adc
(VGS = 1.0 Vdc, VDS = 0 Vdc)

Stage 2 -- On Characteristics
Gate Threshold Voltage (1) VGS(th) 0.8 1.2 1.6 Vdc
(VDS = 10 Vdc, ID = 11 Adc)
Gate Quiescent Voltage VGS(Q) — 1.8 — Vdc
(VDS = 28 Vdc, IDQ2(A+B) = 110 mAdc)
Fixture Gate Quiescent Voltage VGG(Q) 4.1 4.8 5.6 Vdc
(VDD = 28 Vdc, IDQ2(A+B) = 110 mAdc, Measured in Functional Test)
Drain--Source On--Voltage (1) VDS(on) 0.1 0.3 1.5 Vdc
(VGS = 10 Vdc, ID = 200 mAdc)
1. Each side of device measured separately.
(continued)

A2I20D020NR1 A2I20D020GNR1
RF Device Data
NXP Semiconductors 3
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic Symbol Min Typ Max Unit

Functional Tests (1,2)

(In NXP Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA,
Pout = 2.5 W Avg., f = 1900 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on
CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain Gps 30.2 31.0 35.0 dB
Power Added Efficiency PAE 20.3 21.2 — %
Adjacent Channel Power Ratio ACPR — –44.0 –43.0 dBc
Pout @ 3 dB Compression Point, CW P3dB 19.5 22.2 — W

Load Mismatch (In NXP Production Test Fixture, 50 ohm system) IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA, f = 2200 MHz
VSWR 10:1 at 32 Vdc, 46.8 W CW Output Power No Device Degradation
(3 dB Input Overdrive from 40.7 W CW Rated Power)

Typical Performance (3) (In NXP Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA,
1800–2200 MHz Bandwidth
Pout @ 1 dB Compression Point, CW P1dB — 16 — W
Pout @ 3 dB Compression Point (4) P3dB — 24 — W
AM/PM  — –7.6 — 
(Maximum value measured at the P3dB compression point across
the 1800–2200 MHz frequency range.)
VBW Resonance Point VBWres — 170 — MHz
(IMD Third Order Intermodulation Inflection Point)
Quiescent Current Accuracy over Temperature (5) IQT %
with 4.7 k Gate Feed Resistors (--30 to 85C) Stage 1 — 2.7 —
with 4.7 k Gate Feed Resistors (--30 to 85C) Stage 2 — 1.9 —
Gain Flatness in 400 MHz Bandwidth @ Pout = 2.5 W Avg. GF — 1.0 — dB
Gain Variation over Temperature G — 0.023 — dB/C
(–30C to +85C)

Output Power Variation over Temperature P1dB — 0.015 — dB/C

(–30C to +85C)

Table 6. Ordering Information

Device Tape and Reel Information Package
A2I20D020NR1 TO--270WB--17
R1 Suffix = 500 Units, 44 mm Tape Width, 13--Reel
A2I20D020GNR1 TO--270WBG--17
1. Part internally input and output matched.
2. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull
wing (GN) parts.
3. All data measured in fixture with device soldered to heatsink.
4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal
where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.

A2I20D020NR1 A2I20D020GNR1
RF Device Data
4 NXP Semiconductors
 VDD1A

VGG2A
VDD2A
VGG1A
R1
R2 A2I20D020N
C7 C9 C17 Rev. 4
C11 C15
C13
C5
R5 C3
Z1 Q1 C1 Z2
C4
R6
C6 C2
C14
C12 C16
R3 C8 C10 C18

R4
VGG1B
VDD2B
VGG2B

D77506 VDD1B

Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device
soldered to heatsink.

Figure 3. A2I20D020NR1 Test Circuit Component Layout

Table 7. A2I20D020NR1 Test Circuit Component Designations and Values

Part Description Part Number Manufacturer
C1, C2 3.9 pF Chip Capacitors ATC600F3R9BT250XT ATC
C3, C4 0.5 pF Chip Capacitors ATC600F0R5BT250XT ATC
C5, C6, C7, C8 4.7 F Chip Capacitors GRM31CR71H475KA12L Murata
C9, C10, C11, C12, C13, 10 F Chip Capacitors GRM31CR61H106KA12L Murata
C14, C15, C16, C17, C18

Q1 RF LDMOS Power Amplifier A2I20D020N NXP

R1, R2, R3, R4 4.7 k, 1/4 W Chip Resistors CRCW12064K70FKEA Vishay
R5, R6 50 , 10 W Chip Resistors 060120A15Z50-2 Anaren
Z1, Z2 1700–2300 MHz, 90, 3 dB Hybrid Couplers X3C19P1-03S Anaren
PCB Rogers RO4350B, 0.020, r = 3.66 D77506 MTL

A2I20D020NR1 A2I20D020GNR1
RF Device Data
NXP Semiconductors 5
 TYPICAL CHARACTERISTICS — 1800–2200 MHz

33.0 26

EFFICIENCY (%)
VDD = 28 Vdc, Pout = 2.5 W (Avg.)
32.8 24

D, DRAIN
IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA
32.6 D 22

Gps, POWER GAIN (dB)

32.4 20
32.2 Single--Carrier W--CDMA 18
Gps
32.0 3.84 MHz Channel Bandwidth –42 –1.0
31.8 –43 –1.2
PARC

ACPR (dBc)

PARC (dB)
31.6 –44 –1.4
31.4 ACPR –45 –1.6
31.2 Input Signal PAR = 9.9 dB –46 –1.8
@ 0.01% Probability on CCDF
31.0 –47 –2.0
1775 1825 1875 1925 1975 2025 2075 2125 2175 2225
f, FREQUENCY (MHz)
Figure 4. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 2.5 Watts Avg.

–10
VDD = 28 Vdc, Pout = 8 W (PEP), IDQ1(A+B) = 32 mA
IMD, INTERMODULATION DISTORTION (dBc)

IDQ2(A+B) = 110 mA, Two--Tone Measurements

–20 (f1 + f2)/2 = Center Frequency of 2000 MHz

IM3--U
–30
IM3--L

–40 IM5--L

IM7--U IM5--U
–50
IM7--L

–60
1 10 100 300
TWO--TONE SPACING (MHz)
Figure 5. Intermodulation Distortion Products
versus Two--Tone Spacing

32.0 0 45 –5
VDD = 28 Vdc, IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA
f = 2000 MHz, Single--Carrier W--CDMA
31.5 –1 40 –15
OUTPUT COMPRESSION AT 0.01%

D DRAIN EFFICIENCY (%)

–2 dB = 3.3 W D
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)

31.0 –2 35 –25
–1 dB = 2.1 W
ACPR (dBc)

ACPR
30.5 –3 30 –35
Gps
30.0 –4 25 –45
–3 dB = 4.5 W
PARC
29.5 –5 3.84 MHz Channel Bandwidth 20 –55
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
29.0 –6 15 –65
1 3 5 7 9 11
Pout, OUTPUT POWER (WATTS)
Figure 6. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power

A2I20D020NR1 A2I20D020GNR1
RF Device Data
6 NXP Semiconductors
 TYPICAL CHARACTERISTICS — 1800–2200 MHz

33 40 5
VDD = 28 Vdc, IDQ1(A+B) = 32 mA, IDQ2(A+B) = 110 mA
D
32 2200 MHz 35 –5
2000 MHz 1800 MHz

D, DRAIN EFFICIENCY (%)

Gps

Gps, POWER GAIN (dB)

31 30 –15
Single--Carrier W--CDMA

ACPR (dBc)
3.84 MHz Channel Bandwidth
30 25 –25
2200 MHz ACPR
1800 MHz
29 1800 MHz 20 –35
2000 MHz
2000 MHz
28 15 –45
2200 MHz
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
27 10 –55
1 10 12
Pout, OUTPUT POWER (WATTS) AVG.
Figure 7. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power

40

35 Gain

30
GAIN (dB)

25

20
VDD = 28 Vdc
Pin = 0 dBm
15 IDQ1(A+B) = 32 mA
IDQ2(A+B) = 110 mA
10
400 800 1200 1600 2000 2400 2800 3200 3600
f, FREQUENCY (MHz)
Figure 8. Broadband Frequency Response

A2I20D020NR1 A2I20D020GNR1
RF Device Data
NXP Semiconductors 7
Table 8. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ1 = 16 mA, IDQ2 = 57 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f Zsource Zin Zload (1) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
1805 92.7 + j84.9 72.9 – j80.3 21.8 – j4.48 31.6 40.6 11 54.5 –3
1840 70.5 + j83.3 62.6 – j79.4 19.0 – j6.17 31.4 40.6 11 52.5 –3
1880 53.3 + j79.4 50.7 – j74.5 17.9 – j5.52 31.3 40.6 12 51.6 –3

Max Output Power

P3dB
f Zsource Zin Zload (2) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
1805 92.7 + j84.9 71.2 – j79.5 20.1 – j7.48 29.3 41.5 14 53.7 –6
1840 70.5 + j83.3 61.5 – j78.8 18.5 – j6.91 29.3 41.5 14 52.8 –6
1880 53.3 + j79.4 50.1 – j73.8 17.5 – j6.54 29.2 41.5 14 51.8 –5
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.

Table 9. Load Pull Performance — Maximum Efficiency Tuning

VDD = 28 Vdc, IDQ1 = 16 mA, IDQ2 = 57 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f Zsource Zin Zload (1) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
1805 92.7 + j84.9 73.1 – j84.4 41.8 + j7.22 32.9 39.0 8 61.7 –5
1840 70.5 + j83.3 62.4 – j82.2 32.6 + j4.15 32.6 39.4 9 59.9 –4
1880 53.3 + j79.4 50.5 – j77.9 26.6 + j12.0 33.0 38.8 8 57.5 –5

Max Drain Efficiency

P3dB
f Zsource Zin Zload (2) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
1805 92.7 + j84.9 72.6 – j82.9 41.0 + j3.98 30.8 40.0 10 61.1 –8
1840 70.5 + j83.3 62.5 – j81.6 30.9 + j5.87 30.6 40.3 11 59.8 –7
1880 53.3 + j79.4 50.2 – j76.9 30.1 + j10.2 30.9 39.7 9 58.1 –6
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.

Input Load Pull Device Output Load Pull

Tuner and Test Under Tuner and Test
Circuit Test Circuit

Zsource Zin Zload

A2I20D020NR1 A2I20D020GNR1
RF Device Data
8 NXP Semiconductors
 P1dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz

20 20
56
36.5
15 15
54
10 10
39.5 39 37
IMAGINARY ()

IMAGINARY ()
5 E 5 E
40 38.5 37.5 58
0 0
38 56
–5 P
–5
P
40.5 52
–10 –10
44 54
–15 –15
46 48 50
50 52
–20 –20
10 20 30 40 50 60 10 20 30 40 50 60
REAL () REAL ()
Figure 9. P1dB Load Pull Output Power Contours (dBm) Figure 10. P1dB Load Pull Efficiency Contours (%)

20 20
–14 –4
–12
15 15
–10 –8
10 10
–6 –4
33
IMAGINARY ()

5 E
IMAGINARY () 5 E

0 0
32.5
–5 –5
P P
32
–10 –10
30 31.5
–15 –15
30.5 –2 –2
29.5 31
–20 –20
10 20 30 40 50 60 10 20 30 40 50 60
REAL () REAL ()
Figure 11. P1dB Load Pull Gain Contours (dB) Figure 12. P1dB Load Pull AM/PM Contours ()

NOTE: P = Maximum Output Power

E = Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power

A2I20D020NR1 A2I20D020GNR1
RF Device Data
NXP Semiconductors 9
 P3dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz

20 20
38 54
15 15

10 10
38.5
IMAGINARY ()

IMAGINARY ()
E E
5 5
39
0 0
39.5 58
–5 –5
P 40 P 56
–10 –10
41 44 54
–15 –15
40.5 46 48 50
52
–20 –20
10 20 30 40 50 60 10 20 30 40 50 60
REAL () REAL ()
Figure 13. P3dB Load Pull Output Power Contours (dBm) Figure 14. P3dB Load Pull Efficiency Contours (%)

20 20
31 –18
15 15
30.5 –16
–14
10 10
30 –12
–10
IMAGINARY ()

IMAGINARY ()

E E
5 5
29.5 –8
0 0
29 –6
–5 –5
28.5 P P
–4
–10 –10
28
–15 –15
27.5 –2
–20 –20
10 20 30 40 50 60 10 20 30 40 50 60
REAL () REAL ()
Figure 15. P3dB Load Pull Gain Contours (dB) Figure 16. P3dB Load Pull AM/PM Contours ()

NOTE: P = Maximum Output Power

E = Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power

A2I20D020NR1 A2I20D020GNR1
RF Device Data
10 NXP Semiconductors
Table 10. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ1 = 16 mA, IDQ2 = 57 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f Zsource Zin Zload (1) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
2110 26.5 + j66.6 26.8 – j66.8 17.2 + j0.65 32.6 40.6 12 50.7 –4
2140 28.6 + j67.5 26.6 – j69.1 18.0 + j1.74 33.3 40.7 12 52.9 –5
2170 27.7 + j71.6 28.6 – j71.2 16.6 + j2.92 33.9 40.8 12 55.3 –5

Max Output Power

P3dB
f Zsource Zin Zload (2) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
2110 26.5 + j66.6 26.3 – j66.3 17.2 + j0.31 30.6 41.5 14 52.3 –7
2140 28.6 + j67.5 26.1 – j68.6 17.4 + j1.43 31.3 41.6 14 53.6 –8
2170 27.7 + j71.6 28.0 – j70.2 18.6 + j0.54 31.5 41.7 15 54.5 –9
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.

Table 11. Load Pull Performance — Maximum Efficiency Tuning

VDD = 28 Vdc, IDQ1 = 16 mA, IDQ2 = 57 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f Zsource Zin Zload (1) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
2110 26.5 + j66.6 26.0 – j67.4 15.9 + j12.4 34.1 39.4 9 58.3 –5
2140 28.6 + j67.5 26.1 – j69.4 16.2 + j12.9 34.6 39.7 9 60.9 –6
2170 27.7 + j71.6 28.1 – j71.5 13.7 + j12.4 35.1 39.6 9 64.3 –8

Max Drain Efficiency

P3dB
f Zsource Zin Zload (2) D AM/PM
(MHz) () () () Gain (dB) (dBm) (W) (%) ()
2110 26.5 + j66.6 25.7 – j67.3 16.2 + j12.1 32.0 40.5 11 60.0 –7
2140 28.6 + j67.5 25.6 – j69.4 14.7 + j12.9 32.7 40.4 11 61.8 –9
2170 27.7 + j71.6 27.4 – j71.4 14.2 + j13.7 33.2 40.2 10 63.5 –11
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.

Input Load Pull Device Output Load Pull

Tuner and Test Under Tuner and Test
Circuit Test Circuit

Zsource Zin Zload

A2I20D020NR1 A2I20D020GNR1
RF Device Data
NXP Semiconductors 11
 P1dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz

20 20
39 44

15 15
E 39.5 60 E
46
40
10 10
IMAGINARY ()

IMAGINARY ()
58
40.5 48
56
5 5
54 50
P P 52
0 0
40
–5 –5
39.5
39
–10 –10
10 20 30 40 50 10 20 30 40 50
REAL () REAL ()
Figure 17. P1dB Load Pull Output Power Contours (dBm) Figure 18. P1dB Load Pull Efficiency Contours (%)

20 20
35 –2
34.5
15 15
E –8 E –4
34
10 10
IMAGINARY ()

IMAGINARY ()

33.5 –6 –4
5 5
33
P P
0 0
32.5
–5 –5
31.5 32
–10 –10
10 20 30 40 50 10 20 30 40 50
REAL () REAL ()
Figure 19. P1dB Load Pull Gain Contours (dB) Figure 20. P1dB Load Pull AM/PM Contours ()

NOTE: P = Maximum Output Power

E = Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power

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 P3dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz

20 20
39.5
39 40
15 15
E
40.5 60 E
10 10
IMAGINARY ()

IMAGINARY ()
41
58
5 5
56
41.5 54
P P 52 50
0 0
48
46
–5 –5

–10 –10
10 20 30 40 50 10 20 30 40 50
REAL () REAL ()
Figure 21. P3dB Load Pull Output Power Contours (dBm) Figure 22. P3dB Load Pull Efficiency Contours (%)

20 20
33
15 15
E 32.5 –12 E –2
32
10 10
IMAGINARY ()

IMAGINARY ()
31.5 –10 –4
5 5
31
P P –8
0 0
30.5
–8 –6
–5 –5
29.5 30
–10 –10
10 20 30 40 50 10 20 30 40 50
REAL () REAL ()
Figure 23. P3dB Load Pull Gain Contours (dB) Figure 24. P3dB Load Pull AM/PM Contours ()

NOTE: P = Maximum Output Power

E = Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power

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 PACKAGE DIMENSIONS

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 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS

Refer to the following resources to aid your design process.

Application Notes
 AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
 AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
 AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu

REVISION HISTORY

The following table summarizes revisions to this document.

Revision Date Description

0 May 2016  Initial release of data sheet

1 May 2017  Typical Performance table: added VBWres, p. 4

 1800–2200 MHz characterization fixture: added typical characteristic performance graphs, pp. 6--7

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Number:
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