Control Engineering Practice 131 (2023) 105387

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Control Engineering Practice

journal homepage: www.elsevier.com/locate/conengprac

Model predictive control and linear control of DC–DC boost converter in low
voltage DC microgrid: An experimental comparative study
Qihao Guo, Imen Bahri, Demba Diallo ∗, Eric Berthelot
Universite Paris-Saclay, CentraleSupelec, CNRS, Group of Electrical Engineering of Paris, Sorbonne University, 3-11, rue Joliot Curie, Gif sur
Yvette, 91190, Ile-de-France, France

ARTICLE INFO ABSTRACT

Keywords: It is challenging to select the best control strategy to regulate the output voltage of a DC–DC boost converter
DC–DC boost converter in DC MicroGrids (MGs). Indeed, the controller must cope with the standard requirements: robustness,
Model predictive control steady-state and dynamic performance. Moreover, it also needs to handle the boost converter’s intrinsic
Linear control
Non-Minimum Phase behavior that significantly increases the difficulty from the control point of view. This
DC microgrid
paper compares four control methods (Linear Controller-based Voltage-Mode Control, Linear Controller-based
Averaged Current-Mode Control, Finite Control Set Model Predictive Controller-based Voltage-Mode Control,
and Finite Control Set Model Predictive Controller-based Current-Mode Control) based on experimental results.
To achieve a fair comparison of the different control methods, an optimal design of the power converter
parameters is proposed to minimize their influence on the controller’s performance. It provides some guidelines
to select the appropriate controller. Several tests are performed on the experimental setup to evaluate the
four control strategies, considering the features of DC MGs. Qualitative and quantitative comparisons are
made regarding converter models, controller design, performance evaluation and implementation issues. The
experimental results show that Finite Control Set Model Predictive Controller-based Current-Mode Control and
Linear Controller-based Averaged Current-Mode Control are the best compromises.

1. Introduction stability margin, making difficult to design a high bandwidth controller.

Secondly, good dynamic voltage reference tracking performance is
Recently, DC MicroGrids (MGs) are attracting more and more at- required to ensure that the DC bus voltage can always be regulated
tention due to the increasing presence of DC devices, like photovoltaic to its nominal voltage. This is because the output voltage is subject to
panels and energy storage systems and modern DC loads (Badar et al., disturbances due to the intermittency of renewable sources (Lu et al.,
2022; Iovine et al., 2019; Rodriguez-Diaz et al., 2017; Sarr et al., 2020). 2020; Sarr et al., 2020), and load variations. Moreover, the stochastic
The boost converter is a fundamental block for power conversion and load variations can change the converter’s operating points or even
voltage matching in DC MGs, due to its reduced number of components, its operating mode (Herath et al., 2019). For example, there can be
low cost and simple modeling (Chen et al., 2021; Forouzesh et al., 2017;
a transition from continuous conduction mode (CCM) to discontinuous
Shan et al., 2019; Xu et al., 2021). For example, it is widely used to
conduction mode (DCM). This transition leads to significant changes
step up the output voltage of renewable generations like, photovoltaic
in the circuit model, and properties (Erickson & Maksimovic, 2020;
panels (Elshaer et al., 2010), fuel cells (Li & He, 2011) and small-
Hwang & Park, 2012). To tackle the boost converter’s voltage regula-
scale wind conversion systems (Lu et al., 2020). Besides, it is also
applied as an interface converter to regulate power between the DC tion issue, several control strategies, from traditional PID-based linear
bus and the energy storage devices like batteries (Shan et al., 2019) methods (Anzehaee et al., 2021; Erickson & Maksimovic, 2020; Zhu
and super-capacitors (Zhu et al., 2018). et al., 2018) to advanced control techniques, like model predictive
From the control point of view, there are several challenges for the control (MPC) (Karamanakos et al., 2013, 2014; Villarroel et al., 2019),
output voltage regulation of DC–DC boost converter in DC MGs. Firstly, sliding-mode control, passivity-based control, have been proposed (Xu
the output voltage exhibits an intrinsic non-minimum phase (NMP) et al., 2021).
behavior with respect to the switching action (Hoagg & Bernstein, The existence of numerous methods make it difficult to choose an
2007; Isidori, 2013; Karamanakos et al., 2014). The NMP degrades the appropriate one, especially in practical applications. The main reason is

∗ Corresponding author.
E-mail addresses: [email protected] (Q. Guo), [email protected] (I. Bahri), [email protected] (D. Diallo),
[email protected] (E. Berthelot).

https://doi.org/10.1016/j.conengprac.2022.105387
Received 20 April 2022; Received in revised form 3 October 2022; Accepted 8 November 2022
Available online 25 November 2022
0967-0661/© 2022 Elsevier Ltd. All rights reserved.
Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Nomenclature

AHBC Asymmetric half-bridge converter

CCM Continuous conduction mode
DCM Discontinuous conduction mode
DSP Digital signal processor
FCS-MPC Finite control set MPC
FCS-MPC-CMC FCS-MPC-based current-mode control
FCS-MPC-VMC FCS-MPC-based voltage-mode control
FPGA Field programmable gate array
LC-ACMC Linear controller based averaged current-
mode control
LC-VMC Linear controller based voltage-mode con-
trol
MG Microgrid
MPC Model predictive control
NMP Non-minimum phase
PID Proportional–integral–derivative
PWM Pulse width modulation Fig. 1. Structure of a low-voltage islanded DC microgrid.

RHP Right half plan

SoC System on chip
SRG Switched reluctance generator The contributions of this research are:

• Proposal of an optimal circuit parameter design method to min-

imize the influence of circuit’ parameters on the controller’s
performance.
that most proposed control strategies are applied for boost converters, • A comprehensive step-by-step design guideline including circuit
whose parameters have already been designed (Cheng et al., 2018; parameter design, system modeling, and controller parameters
Karamanakos et al., 2014; Villarroel et al., 2019, 2021). Nonetheless, tuning.
the values of the inductance and the capacitance strongly influence • Experimental validation for the shortest-horizon FCS-MPC output
the performance of the control strategy (Zaitsu, 2009). Besides, most voltage tracking strategy mentioned in Villarroel et al. (2019).
studies focus on one criterion (Garayalde et al., 2019), like the dy- • Qualitative and quantitative indicators are provided to compare
namic performance without considering the steady state performance, the performance of the different controllers, and a design guide-
disturbance rejection ability or required hardware platform. To the line is proposed.
best of author’s knowledge, only one comparative study was conducted
by simulation for a buck converter (Ghosh et al., 2014), but without The rest of the paper is organized as follows: Section 2 presents
experimental validation. the application under study: the SRG-based low-voltage DC MG. In
Classical linear control based on PID and MPC are the two leading Section 3, the averaged small-signal model and the discrete-time model
control techniques for industrial applications (Samad, 2017). Although of the boost converter are presented. The design procedure of the
the traditional linear control theory has been well developed in the circuit parameters is introduced given the performance requirements
1950s, it is still the most widely used technique in the control of of the converter. From Section 4 to Section 7, the four different control
power converter and electrical drives. The main problem of the linear strategies, i.e., LC-VMC, LC-ACMC, FCS-MPC-VMC, and FCS-MPC-CMC
controller is its low robustness when dealing with nonlinear systems. are presented. The design procedure for each controller is also detailed.
As one of the advanced nonlinear control methods, the finite control In Section 8, qualitative and quantitative performance comparisons are
set (FCS)-model predictive control (MPC) is attracting more and more carried out. The paper is concluded in Section 9.
attention, because of the intuitive concept, simple design procedure,
2. Low-voltage DC MGs
inherent adaptation to power electronic circuits (Kouro et al., 2015).
However, the high computation requirements and heuristic design of
With no loss of generality, a low-voltage DC MG is represented in
its parameters limit its massive application. To reduce the calcula-
Fig. 1. A SRG-based wind turbine is connected to an asymmetric half-
tion burden, a shortest horizon FCS-MPC is proposed in Villarroel
bridge converter (AHBC). Its DC output voltage is regulated at 24 V.
et al. (2019) for voltage tracking of boost converter. However, only
The working principle of the SRG, which is out of scope for this paper,
simulation results are provided. is well described in Sarr et al. (2020).
In addition, there is endless discussion about the relative merits The function of the boost converter is to increase the output volt-
of voltage or current mode control. Questions about controller de- age of the generator and stabilize the DC bus voltage despite load
sign, additional current sensors and dynamic performance can confuse uncertainties and input voltage disturbances.
practitioners.
For these reasons, this research proposes a systematic and ex- 3. Modeling of the DC–DC boost converter
perimental comparative study between FCS-MPC and linear control
for output voltage control of boost converter. Both current and volt- 3.1. The topology of the DC–DC boost converter
age modes are considered, resulting in four control methods: Linear
Controller-based Voltage Mode Control (LC-VMC), Linear Controller- The schematic of a DC–DC boost converter is illustrated in Fig. 1. In
based Averaged Current Mode Control (LC-ACMC), FCS-MPC-based this circuit, 𝑣𝑖𝑛 represents the input voltage, 𝑣𝑜𝑢𝑡 is the output voltage
Voltage Mode Control (FCS-MPC-VMC), and FCS-MPC-based Current across the passive load 𝑅, 𝑣𝐶 is the voltage across the capacitor, 𝑆
Mode Control (FCS-MPC-CMC). A switched reluctance generator (SRG)- represents the power switch, 𝐷1 is the diode, 𝐿 is the inductance, and
based islanded DC MG is selected as the research context without loss 𝐶 is the output capacitor. 𝑅𝐿 and 𝑅𝐶 are included as the equivalent
of generality series resistance of the inductance and the capacitor, respectively.

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

3.2. State–space model of the DC–DC boost converter where 𝐷, 𝑉𝐶 , and 𝐼𝐿 represent the steady-state values at the operating
point, of the duty cycle, the voltage across the capacitor, and the
The DC–DC boost converter has three linear dynamics according to inductance current, respectively. Based on this model, the control-to-
the positions of the switch (ON or OFF), and the inductance current output transfer function 𝐺𝑣𝑑 (𝑠), line-to-output transfer function 𝐺𝑣𝑔 (𝑠),
𝑖𝐿 . When the switch is ON (𝑆 = 1), the energy from the input voltage control-to-inductance current transfer function 𝐺𝑖𝑑 (𝑠), and inductance
source is transferred to the inductance 𝐿 and therefore 𝑖𝐿 increases. current-to-output transfer function 𝐺𝑣𝑖 (𝑠) are, as follows:
When the switch is OFF (𝑆 = 0) and 𝑖𝐿 > 0, the energy stored in
the inductance is transferred to the load, leading to the decrease of 𝑖𝐿 . 𝑣̂ 𝐶 1 − 𝜔𝑠
𝑧
Furthermore, in the case when 𝑖𝐿 decreases to 0, both 𝑆 and 𝐷1 are in 𝐺𝑣𝑑 (𝑠) = |𝑣̂𝑖𝑛 =0 = 𝐺𝑣𝑑0 𝑠 2, (6)
𝑑̂ 1+ 𝑠 +(𝜔0 𝑄 𝜔0
)
OFF state, the converter operates in DCM. The system can be described
by the following continuous state–space equations (Cheng et al., 2018; 𝑣̂ 𝐶 1
𝐺𝑣𝑔 (𝑠) = | ̂ = 𝐺𝑣𝑔0 𝑠 , (7)
Karamanakos et al., 2013), 𝑣̂ 𝑖𝑛 𝑑=0 1+ 𝜔0 𝑄
+ ( 𝜔𝑠 )2
0
𝑑𝑥(𝑡) ( )
= 𝐴1 + 𝐴2 𝑢(𝑡) 𝑥(𝑡) + 𝐵𝑣𝑖𝑛 (𝑡), 𝑖̂𝐿 1 + 𝜔𝑠
𝑑𝑡 (1) 𝐺𝑖𝑑 (𝑠) = |𝑣̂𝑖𝑛 =0 = 𝐺𝑖𝑑0 𝑧𝑖
, (8)
𝑦(𝑡) = (𝐶1 + 𝐶2 𝑢(𝑡))𝑥(𝑡), 𝑑̂ 1 + 𝜔 𝑠𝑄 + ( 𝜔𝑠 )2
0 0
where where
[ ]𝑇
𝑥(𝑡) = 𝑖𝐿 (𝑡) 𝑣𝐶 (𝑡) , 𝑦(𝑡) = 𝑣𝑜𝑢𝑡 (𝑡), 𝑣𝑖𝑛 𝑣 1 𝐷′2 𝑅
{ 𝐷′ = , 𝐺𝑣𝑑0 = 𝑜𝑢𝑡′ , 𝐺𝑣𝑔0 = ′ , 𝜔𝑧 = ,
1 𝑆=1 (2) 𝑣𝑜𝑢𝑡 𝐷 𝐷 𝐿
𝑢(𝑡) = √ (9)
0 𝑆 = 0, 𝐷′ 𝐶 2𝑣𝑜𝑢𝑡 2
𝜔0 = √ , 𝑄 = 𝐷′ 𝑅 , 𝐺𝑖𝑑0 = , 𝜔𝑧𝑖 = .
𝐿 𝐷 ′2 𝑅 𝑅𝐶
and the system matrices are 𝐿𝐶
⎡ 𝑑aux (𝑅𝐿 + 𝑅𝑅𝐶 ) ⎤ Dividing ((6)) by ((8)), 𝐺𝑣𝑖 (𝑠) can be obtained as follows:
⎢− 𝑅+𝑅𝐶 𝑑aux 𝑅
− 𝐿(𝑅+𝑅 ⎥
𝐴1 = ⎢ 𝐿 𝐶) ⎥ , 1− 𝑠
⎢ 𝑑aux 𝑅 1
− 𝐶(𝑅+𝑅 ⎥ 𝐺𝑣𝑑 (𝑠) 𝜔𝑧
⎣ 𝐶(𝑅+𝑅𝐶 ) 𝐶) ⎦
𝐺𝑣𝑖 (𝑠) = = 𝐺𝑣𝑖0 𝑠 , (10)
[ 𝑅𝑅𝐶 ] 𝐺𝑖𝑑 (𝑠) 1+
𝑅 𝜔𝑧𝑖
𝐿(𝑅+𝑅𝐶 ) 𝐿(𝑅+𝑅𝐶 )
𝐴2 = 𝑅 , (3) where
− 𝐶(𝑅+𝑅 0
𝐶) 𝐺𝑣𝑑0 𝐷′ 𝑅
[ ] [ ] 𝐺𝑣𝑖0 = = . (11)
𝑑aux 𝑅𝑅𝐶 𝑅 𝑅𝑅
𝐶1 = 𝑅+𝑅𝐶 𝑅+𝑅𝐶
, 𝐶2 = − 𝑅+𝑅𝐶 0 , 𝐺𝑖𝑑0 2
𝐶
[ ]𝑇
𝑑aux
𝐵= 0 , 3.5. Discrete-time model
𝐿
where 𝑢(𝑡) stands for the switch position, and 𝑑aux indicates the operat- Unlike the averaged small-signal model used for the design of the
ing mode of the boost converter. When 𝑑aux = 1, the converter operates linear controller, a discrete-time model is required for the design of the
in CCM, i.e., either 𝑢(𝑡) = 1 or 𝑢(𝑡) = 0 and 𝑖𝐿 (𝑡) > 0. When 𝑑aux = 0, the
FCS-MPC-based controller. Based on the continuous-time state–space
converter operates in DCM, i.e., 𝑢(𝑡) = 0, and 𝑖𝐿 (𝑡) = 0.
model in (1) and using the forward Euler approximation, the discrete-
3.3. The averaged large-signal model of the boost converter in CCM time model of the boost dc–dc converter can be obtained as follows:

The averaged large-signal model of the boost converter in CCM can 𝑥(𝑘 + 1) = 𝐸1 𝑥(𝑘) + 𝐹1 𝑢(𝑘) + 𝐺1 𝑣,
be derived from (1) by assuming that 𝑑aux = 1. For simplicity, 𝑅𝐿 and
𝑅𝐶 are assumed to be zero. By averaging the inductance current and 𝑦(𝑘) = 𝐻1 𝑥(𝑘) + 𝐿1 𝑢(𝑘),
capacitor voltage over a switching period 𝑇𝑠 , the following averaged (12)
large-signal model can be obtained: {
1 𝑆=1
𝑢(𝑘) =
𝑑⟨𝑖𝐿 (𝑡)⟩𝑇𝑠 0 𝑆 = 0,
𝐿 = ⟨𝑣𝑖𝑛 (𝑡)⟩𝑇𝑠 − (1 − 𝑑(𝑡))⟨𝑣𝐶 (𝑡)⟩𝑇𝑠 ,
𝑑𝑡 where 𝑥(𝑘) = [𝑖𝐿 (𝑘) 𝑣𝐶 (𝑘)]𝑇 , 𝑦(𝑘) = [𝑖𝐿 (𝑘) 𝑣𝑜𝑢𝑡 (𝑘)]𝑇 , 𝑣 = 𝑣𝑖𝑛 (𝑘) and
𝑑⟨𝑣𝐶 (𝑡)⟩𝑇𝑠 ⟨𝑣𝐶 (𝑡)⟩𝑇𝑠 (4)
𝐶 = (1 − 𝑑(𝑡))⟨𝑖𝐿 (𝑡)⟩𝑇𝑠 − , the matrices are
𝑑𝑡 𝑅
⎡1 − 𝜏 [ 𝑇𝑠𝑎𝑚 𝑅𝐿 + 𝑇𝑠𝑎𝑚 𝑅𝑅𝐶 ] −𝑇𝑠𝑎𝑚 𝑅 ⎤
⟨𝑖𝑜𝑢𝑡 (𝑡)⟩𝑇𝑠 = (1 − 𝑑(𝑡))⟨𝑖𝐿 (𝑡)⟩𝑇𝑠 , aux 𝜏aux 𝐿(𝑅+𝑅
𝐸1 = ⎢ 𝐿
𝑇𝑠𝑎𝑚 𝑅
𝐿(𝑅+𝑅𝐶 )
𝑇𝑠𝑎𝑚
𝐶) ⎥ ,

where ⟨𝑖𝐿 (𝑡)⟩𝑇𝑠 , ⟨𝑖𝑜𝑢𝑡 (𝑡)⟩𝑇𝑠 , ⟨𝑣𝑖𝑛 (𝑡)⟩𝑇𝑠 , and ⟨𝑣𝐶 (𝑡)⟩𝑇𝑠 represent the averaged ⎢ 𝜏aux 𝐶(𝑅+𝑅 1 − 𝐶(𝑅+𝑅 ⎥
⎣ 𝐶) 𝐶) ⎦
values of inductance current, output current, input voltage, and capaci-
⎡ 𝑇𝑠𝑎𝑚 𝑅 (𝑅 𝑖 (𝑘) + 𝑣 (𝑘))⎤
tor voltage over one switching period, respectively, and 𝑑(𝑡) is the duty 𝐶 𝐿 𝐶
𝐹1 = ⎢ 𝐿(𝑅+𝑅𝐶 ) 𝑇𝑠𝑎𝑚 𝑅 ⎥,
cycle. However, the large-signal model in (4) is non-linear. Therefore, ⎢ − 𝐶(𝑅+𝑅 ) 𝑖𝐿 (𝑘) ⎥
⎣ 𝐶 ⎦ (13)
linear techniques, such as the Laplace transform cannot be applied. [ ] [ ]
𝑇𝑠𝑎𝑚 0
𝜏aux 𝐿
𝐺1 = , 𝐿1 = 𝑅𝑅 ,
3.4. The averaged small-signal model in CCM 0 − 𝑅+𝑅𝐶 𝑖𝐿 (𝑘)
[ ] 𝐶

1 0
The most common method to obtain the averaged small-signal 𝐻1 = 𝑅𝑅 𝑅 ,
model is to perturb the averaged large-signal model in (4) around 𝜏aux 𝑅+𝑅𝐶 𝑅+𝑅
𝐶 𝐶
an equilibrium operation point with small AC variations (Erickson &
where 𝑇𝑠𝑎𝑚 is the sampling period. It should be noted that the model
Maksimovic, 2020), given as:
describes four operating modes:
𝑑 𝑖̂𝐿
𝐿 ̂
= 𝑣̂ 𝑖𝑛 − (1 − 𝐷)𝑣̂ 𝐶 + 𝑉𝐶 𝑑, • Mode 1: 𝑢(𝑘) = 1, 𝜏aux = 1; the switch 𝑆 is on, and the converter
𝑑𝑡
𝑑 𝑣̂ 𝑣̂ (5) operates in CCM.
𝐶 𝐶 = − 𝐶 + 𝑖̂𝐿 (1 − 𝐷) − 𝐼𝐿 𝑑, ̂
• Mode 2: 𝑢(𝑘) = 0, 𝜏aux = 1; the switch 𝑆 is off, and the converter
𝑑𝑡 𝑅
𝑖̂𝑜𝑢𝑡 = 𝑖̂𝐿 (1 − 𝐷) − 𝐼𝐿 𝑑,̂ operates in CCM.

3
Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

𝜏
• Mode 3: 𝑢(𝑘) = 0, 𝜏aux = 𝑇 1 ; the switch 𝑆 is off, and the Table 1
𝑠𝑎𝑚 Circuit and controller parameters.
converter is in the transient state between CCM and DCM. 𝜏1 is the
time in the sampling period when the inductance current reaches Description Value Unit

zero. In the time interval [0 𝜏1 ], the converter works in Mode 2, Input voltage 𝑣𝑖𝑛 = 24 V
therefore, 𝜏1 can be calculated by using the converter model in Output voltage 𝑣𝑜𝑢𝑡 = 48 V
Load 𝑅 = 6 Ω
Mode 2, given as
Inductance 𝐿 = 175 μH
𝑅𝐿 𝑅𝑅𝐶 Capacitance 𝐶 = 1650 μF
𝑖(𝑘 + 1) = 𝑖(𝑘)(1 − 𝜏1 )[ + ] Switching frequency 𝑓𝑠 = 20 kHz
𝐿 𝐿(𝑅 + 𝑅𝐶 )
Frequency separation ratio 𝑀 = 7.7
𝑅 𝑣 (𝑘) (14)
− 𝑣(𝑘)𝜏1 + 𝜏1 𝑖𝑛 𝐺𝑝𝑑0 0.0015
𝐿(𝑅 + 𝑅𝐶 ) 𝐿 𝜔𝑝𝑑𝑧 221.639 rad/s
= 0, 𝜔𝑝𝑑𝑝 7144.8 rad/s
𝐺𝑝𝑖0 0.995
therefore 𝜔𝑝𝑖 125.63 rad/s
𝑖(𝑘) 𝐺𝑐𝑖0 0.0458
𝜏1 = . (15) 𝜔𝑐𝑖𝑧 2500 rad/s
𝑅𝐿 𝑅𝑅𝐶 𝑅 𝑣𝑖𝑛 (𝑘)
𝑖(𝑘)( + 𝐿(𝑅+𝑅𝐶 )
) + 𝑣(𝑘) 𝐿(𝑅+𝑅 − 𝜔𝑐𝑖𝑝 62832 rad/s
𝐿 𝐶) 𝐿
𝐺𝑐𝑣0 3.4
• Mode 4: 𝑢(𝑘) = 0, 𝜏aux = 0; the switch 𝑆 is off, and the converter 𝜔𝑐𝑣𝑧 235.29 rad/s
operates in DCM.

From the above analysis, it can be noted that the complete discrete-
time model describes the two modes of operation of the DC–DC boost 4. LC-VMC of the boost converter
converter, CCM and DCM.
For LC-VMC, the goal is to control directly the output voltage using
3.6. Design of circuit parameters
only one control loop. The averaged small-signal model in ((6)) is
needed to design the controller. It should be mentioned that only CCM
In order to make a fair comparison of these four control strate-
gies, the parameters of the boost converter must be adapted to all is considered. The small-signal modeling for DCM is beyond the scope
control strategies. To consider the constraints on the boost converter of this paper. The detailed modeling procedure can be found in Hwang
performance, a general procedure for designing the capacitance and and Park (2012), Reatti and Kazimierczuk (2003). The block diagram
inductance parameters is introduced, and special consideration for the of this control strategy is shown in Fig. 2(a).
LC-VMC is also discussed.
4.1. Voltage loop controller design
3.6.1. Capacitance value design
The capacitance 𝐶 determines the output voltage ripples, given as :
The design of the controller can be divided into two stages. Firstly,
a proportional–derivative (PD) controller is used to improve the phase
𝑣𝑜𝑢𝑡(1 − 𝐷′ )
𝐶≥ . (16) margin. The transfer function of a PD controller is given as:
𝑅𝑓𝑠 𝑣𝑚𝑟 𝑠
1+
where 𝑓𝑠 is the switching frequency. The capacitance value can be 𝜔𝑝𝑑𝑧
𝐺𝑝𝑑 (𝑠) = 𝐺𝑝𝑑0 𝑠 , (21)
calculated according to the acceptable maximum output voltage ripple 1+ 𝜔𝑝𝑑𝑝
𝑣𝑚𝑟 .
and the maximum phase occurs 𝜔𝜑𝑚𝑎𝑥 , obtained from the geometrical
3.6.2. Inductance value design mean of the pole and zero frequencies
Similarly, given the maximum acceptable current ripple 𝑖𝑚𝑟 , the √
minimum inductance value can be determined as: 𝜔𝜑𝑚𝑎𝑥 = (𝜔𝑝𝑑𝑧 𝜔𝑝𝑑𝑝 ). (22)
𝑣 (1 − 𝐷′ )
𝐿 ≥ 𝑖𝑛 . (17) To obtain the maximum improvement in phase margin of the loop
𝑖𝑚𝑟 𝑓𝑠
gain, the 𝜔𝜑𝑚𝑎𝑥 is set to coincide with the desired crossover frequency
𝜔 𝜔𝑝𝑑𝑧 𝜔𝑝𝑑𝑝
3.6.3. The special consideration for voltage-mode control for the voltage loop 𝑓𝑐 = 2𝜋𝑐 . Then, 𝑓𝑝𝑑𝑧 = 2𝜋 and 𝑓𝑝𝑑𝑝 = 2𝜋 can be
For LC-VMC, the presence of Right Half Plan (RHP)-zero in ((6)) calculated as follows:
may degrade the phase margin of the loop gain, resulting in a small or √
1 − sin 𝜃
even negative phase margin harmful to the system stability. According 𝑓𝑝𝑑𝑧 = 𝑓𝑐 ,
1 + sin 𝜃
to Zaitsu (2009), to maintain the closed-loop stability, 𝜔𝑧 must be √ (23)
higher than 𝜔0 in order to prevent the RHP-zero’s phase drop from 1 + sin 𝜃
𝑓𝑝𝑑𝑝 = 𝑓𝑐 ,
affecting the power stage’s poles. In order to guarantee the closed- 1 − sin 𝜃
loop stability, the frequency separation ratio between RHP-zero 𝜔𝑧 and where 𝜃 is the improvement of the phase margin provided by the PD
double-pole 𝜔0 should be bigger than a constant 𝑀, given as: controller at the desired crossover frequency 𝑓𝑐 . 𝐺𝑝𝑑0 is calculated to
𝜔𝑧 have a voltage loop gain equal to unity at 𝑓𝑐 :
≥ 𝑀, (18)
𝜔0 √
𝑓𝑝𝑑𝑧 1
resulting in a maximum inductance value given as 𝐺𝑝𝑑0 = . (24)
𝑓𝑝𝑑𝑝 ||𝐺𝑣𝑑 (𝑗𝜔𝑐 )||
𝑅𝐷′ 2
𝐿 ≤ 𝐶( ) . (19)
𝑀 Secondly, a proportional–integral (PI) controller is added to im-
Finally, according to (17) and (19), the value of the inductance must prove the loop gain at low frequency:
be in the range 𝜔𝑝𝑖
𝐺𝑝𝑖 (𝑠) = 𝐺𝑝𝑖0 (1 + ). (25)
𝑣𝑖𝑛 (1 − 𝐷′ ) 𝑅𝐷′ 2 𝑠
≤ 𝐿 ≤ 𝐶( ) . (20)
𝑖𝑚𝑟 𝑓𝑠 𝑀 A side-effect of the PI controller is that it may degrade the phase
𝜔
Based on the design principles described above, the circuit param- margin. The degradation can be mitigated by setting 𝑓𝑝𝑖 = 2𝜋𝑝𝑖 lower
eters are given in Table 1. than the voltage loop crossover frequency 𝑓𝑐 . Therefore 𝑓𝑝𝑖 is chosen 10

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Fig. 2. Control scheme of four control strategies: (a )LC-VMC; (b) LC-ACMC; (c) FCS-MPC-VMC; (d) FCS-MPC-CMC.

times smaller than 𝑓𝑐 . 𝐺𝑝𝑖0 is calculated to have a unit gain at crossover

frequency 𝑓𝑐 :
1
𝐺𝑝𝑖0 = 𝜔𝑝𝑖 . (26)
||(1 + 𝑗𝜔𝑐
)||

Finally, a proportional–integral–derivative (PID) controller is ob-

tained by combining (21) and (25)
𝑠
𝜔𝑝𝑖 1 + 𝜔𝑝𝑑𝑧
𝐺𝑝𝑖𝑑 (𝑠) = 𝐺𝑝𝑑 (𝑠)𝐺𝑝𝑖 (𝑠) = 𝐺𝑝𝑖𝑑0 (1 + ) 𝑠 , (27)
𝑠 1+
𝜔𝑝𝑑𝑝

where

𝐺𝑝𝑖𝑑0 = 𝐺𝑝𝑑0 𝐺𝑝𝑖0 . (28)

4.2. Controller parameters

It is intrinsically difficult to design a high bandwidth controller for a

second-order system with RHP-zero as represented in ((6)). Therefore,
the desired crossover frequency 𝑓𝑐 is set at 200 Hz, which is two
Fig. 3. Bode diagram of the voltage loop: 𝐺𝑣𝑑 and 𝐺𝑣𝑑 𝐺𝑝𝑖𝑑 .
order of magnitude smaller compared with the switching frequency.
The phase margin 𝜃 is set at 80◦ to increase the stability margin. Bode
diagrams of the voltage loop gain with and without the controller are
displayed in Fig. 3. The detailed controller parameters can be found in 5.1. Controller design for the inner current loop
Table 1.
A lag controller can be used to increase the low-frequency inner
𝜔
current loop gain, reaching the desired crossover frequency 𝑓𝑐𝑖 = 2𝜋𝑐𝑖 .
5. LC-ACMC of the boost converter
The transfer function of the lag controller is as follows:
𝜔𝑐𝑖𝑧
LC-ACMC is the most popular control strategy for the boost con- 1+ 𝑠
verter. A block diagram of this control strategy is shown in Fig. 2(b). 𝐺𝑐𝑖 (𝑠) = 𝐺𝑐𝑖0 𝑠 , (29)
1+ 𝜔𝑐𝑖𝑝
It consists of an outer voltage loop and an inner current loop. The
controllers design procedure is based on the averaged small-signal Its parameters can be calculated based on the desired current loop
model derived in ((8)) and ((10)). crossover frequency 𝑓𝑐𝑖 which is set to one tenth of the switching

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Fig. 4. Bode diagram of the current loop: 𝐺𝑖𝑑 and 𝐺𝑖𝑑 𝐺𝑐𝑖 . Fig. 5. Bode diagram of the voltage loop: 𝐺𝑣𝑖 and 𝐺𝑣𝑖 𝐺𝑐𝑣 .

frequency. The zero is placed below the target crossover frequency (𝑓𝑐𝑖𝑧 6.1. Voltage loop controller design
< 𝑓𝑐𝑖 ), while the pole is placed above the crossover frequency (𝑓𝑐𝑖𝑝
> 𝑓𝑐𝑖 ). 𝐺𝑐𝑖0 is selected so that the loop gain magnitude equals 1 (0 dB) 6.1.1. Cost function design
at the target crossover frequency 𝑓𝑐𝑖 : The main objective in our case is to regulate the output volt-
𝜔 𝜔 𝜔 age by selecting the states of the switches, so that the output volt-
𝐺𝑐𝑖0 = 𝑐𝑖 𝑧𝑖 , 𝜔𝑐𝑖𝑧 = 𝑐𝑖 , 𝜔𝑐𝑖𝑝 = 5𝜔𝑐𝑖 . (30) age can accurately follow its reference. In Karamanakos and Geyer
𝐺𝑖𝑑0 𝜔20
5
(2019), many useful design guidelines are given to maximize the per-
A current limitation can also be added to avoid overshoots during formance of the system, including the choice of norm, the control
transient states. effort penalty, the length of the prediction horizon, etc. Unlike many
publications in which the 𝓁1 -norm is used in the cost function (Kara-
5.2. Controller design for the outer voltage loop manakos et al., 2014; Vazquez et al., 2016), the 𝓁2 -norm is recom-
mended to achieve better closed-loop stability, and favorable tracking
Since 𝐺𝑣𝑖 (𝑠) has a dominant pole at 𝜔𝑧𝑖 , it behaves as a single- performance (Karamanakos et al., 2017).
pole transfer function around the targeted voltage loop crossover fre- In addition, an extra term that represents the control effort penalty
𝜔 can also be included in the cost function as recommended in Kara-
quency 𝑓𝑐𝑣 = 2𝜋𝑐𝑣 . Hence, a PI controller can be used to improve the
low-frequency gain of the outer voltage loop, given as manakos and Geyer (2019), since in a control system, it is essential
𝜔 to reach a compromise between reference tracking and control effort.
𝐺𝑐𝑣 = 𝐺𝑐𝑣0 (1 + 𝑐𝑣𝑧 ), (31) In the case of the boost converter, it means the compromise between
𝑠
output voltage tracking ability and switching frequency or switching
𝜔𝑐𝑣𝑧 and 𝐺𝑐𝑣0 can be calculated according to the pole compensation
losses. To account for the switching frequency, a simple approach is to
method: introduce a term that includes the number of switches between two
𝜔𝑐𝑣
𝐺𝑐𝑣0 = , consecutive states 𝑢(𝑘) and 𝑢(𝑘 − 1). Thus, the cost function can be
𝐺𝑣𝑖0 𝜔𝑧𝑖 (32) written as:
𝜔𝑐𝑣𝑧 = 𝜔𝑧𝑖 .
∑
𝑘+𝑁−1
𝐽 (𝑘) = (‖𝑣𝑒𝑟𝑟 (𝑙 + 1|𝑘)‖22 + 𝜆‖𝛥𝑢(𝑙|𝑘)‖22 ), (33)
5.3. Controller parameters 𝑙=𝑘

where
The inner loop closed loop frequency is set at 𝑓𝑐𝑖 = 2000 Hz,
𝑣𝑒𝑟𝑟 (𝑘) = 𝑣𝑟𝑒𝑓 − 𝑣𝑜𝑢𝑡 (𝑘), (34)
one order of magnitude smaller than the switching frequency of the
converter, to mitigate the switching effects. The outer voltage loop
should be slow in comparison to the inner current loop, so 𝑓𝑐𝑣 = 200 Hz, 𝛥𝑢(𝑘) = 𝑢(𝑘) − 𝑢(𝑘 − 1), (35)
one order of magnitude smaller than 𝑓𝑐𝑖 . The Bode diagrams of the
and 𝑁 is the prediction horizon. In the cost function, the first term
current and voltage loops are shown in Fig. 4 and Fig. 5, respectively.
penalizes the error on the output voltage; the second term penalizes
The detailed controller parameters can be found in Table 1.
the difference between two consecutive switching states, aiming to
decrease the switching frequency and avoid excessive switching. The
6. FCS-MPC-VMC of the boost converter weighting factor 𝜆 > 0 sets the trade-off between the error on output
voltage and the switching frequency 𝑓𝑠 .
Like the RHP-zero encountered for the LC-VMC, there are stability
issues due to the NMP behavior when using the FCS-MPC for voltage 6.1.2. The solution to the NMP behavior
mode control. Various methods have been proposed to deal with this The concept of statically equivalent outputs is used to deal with
problem. Control methods introduced in Villarroel et al. (2019) are the NMP behavior (Villarroel et al., 2019). The idea is to substitute
chosen as an example for FCS-MPC-VMC. The scheme of this control the output variable 𝑣𝑜𝑢𝑡 with a new variable 𝑣∗𝑜𝑢𝑡 that has the same
strategy is shown in Fig. 2(c). steady state behavior, but whose transfer function is not subject to

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

NMP (Kravaris et al., 1994). The relationship between 𝑣𝑜𝑢𝑡 and 𝑣∗𝑜𝑢𝑡 is
as follows:
2𝑅𝑣𝑖𝑛 𝑖2𝐿 − 2𝑖𝐿 𝑣2𝑜𝑢𝑡
𝑣∗𝑜𝑢𝑡 = 𝑣𝑜𝑢𝑡 + 𝑅𝐶
, (36)
2𝑣𝑖𝑛 𝑖𝐿 + 𝑣 𝑣
𝐿 𝑖𝑛 𝑜𝑢𝑡
In the cost function 𝑣𝑜𝑢𝑡 is replaced by 𝑣∗𝑜𝑢𝑡 in (34). Therefore, a long
prediction horizon as proposed in Karamanakos et al. (2014) can be
avoided.

6.2. Controller parameters

The prediction horizon 𝑁 is set to 3, as a trade-off between com-

putation burden and optimal performance. Indeed, in practical imple-
mentation, current tracking performance degrades when 𝑁 is smaller
than 2; however, when 𝑁 exceeds 5, the calculation burden is too
heavy for the DSP, which can no longer generate the correct control Fig. 6. Picture of the experimental setup.
output during one sampling period (50 μs). A small weighting factor
𝜆 = 0.001 is adopted to minimize the tracking error without modifying
the switching frequency. 8.2. Steady-state performance analysis

7. FCS-MPC-CMC of the boost converter The steady-state performance is displayed in Fig. 7. For LC-VMC and
LC-ACMC, the switching frequency is constant 20 kHz, due to the PWM.
The difference between LC-ACMC and FCS-MPC-CMC is the type of However, for the two MPC-based methods, the switching frequency is
controller used in the inner current loop. Both discrete-time model in much smaller compared with the sampling frequency. These results are
(12) and averaged small-signal model in (10) are required to design the in agreement with those obtained in Garayalde et al. (2019), Rodriguez
controllers. The scheme of this control method is shown in Fig. 2(d). and Cortes (2012). In fact, the switching frequency depends on sev-
eral parameters: sampling frequency, input/output voltage (Ammann
et al., 2008). For FCS-MPC-VMC, a steady-state error is observed in the
7.1. Controller design for the inner current loop
output voltage tracking (see Fig. 7c). The main reason is parameter
mismatch between the experiment and the model. This steady-state
For the inner current loop, a model predictive controller (FCS-MPC)
error can be mitigated with the use of Kalman filters with integrated
is designed with the following cost function:
disturbances (Pannocchia & Rawlings, 2003). There is no static error in
∑
𝑘+𝑁−1 the output voltage for the three other methods, due to the existence of
𝐽 (𝑘) = (‖𝑖𝑒𝑟𝑟 (𝑙 + 1|𝑘)‖22 + 𝜆𝛥‖𝑢(𝑙|𝑘)‖22 ), (37) an integrator in the voltage control loops.
𝑙=𝑘

where 8.3. Dynamic performance analysis

𝑖𝑒𝑟𝑟 (𝑘) = 𝑖𝑟𝑒𝑓 − 𝑖(𝑘), (38) 8.3.1. Output voltage tracking performance
Step changes in the voltage reference are introduced to assess
𝛥𝑢(𝑘) = 𝑢(𝑘) − 𝑢(𝑘 − 1). (39) dynamic performance of the four controllers. The results are displayed
in Fig. 8 (a,b,c,d). Fig. 8 (a,b) corresponds to the step up voltage
Because the relationship between control input and inductance from 48 to 52 V, at 𝑡 = 50 ms. The results for a step down change
current exhibits a minimum phase behavior, the design of the controller in the voltage reference (48V to 44V) are presented in Fig. 8 (c,d).
is much easier than the one presented in Section 6.1. The parameters The results show that in both cases, LC-VMC has the longest recovery
for the controller are the same as those used in 6.1. time(220 ms) compared with the other three methods(around 20 ms).
The two current-mode-based methods have similar transients, since
7.2. Controller design for the outer voltage loop they have the same voltage loop controller.

The methods introduced in Section 5.2 can be applied for the design 8.3.2. Input voltage variations
of the voltage loop controller. In a DC microgrid powered by renewable energy sources, the input
voltage can vary significantly due to environmental conditions. To
8. Comparison of the four control strategies assess the controllers’ ability to mitigate input voltage variations, step
up (24 to 28V)/down (24 to 20) changes of the input voltage are
An experimental prototype is built and several experimental scenar- introduced at 𝑡 = 50 ms. The results are plot in Fig. 9 (a,b), and Fig. 9
(c,d), respectively. We can observe that all four controllers mitigate
ios including the practical operating conditions of the DC MG are will
the perturbations in the input voltage. However, the LC-VMC has the
be used to analyze the performance of each control strategy.
most significant voltage overshoot (11.45%) and needs the longest time
(260 ms) to restore the output voltage to its reference value, compared
8.1. Experimental setup
with the other three methods (around 20 ms).

A picture of the experimental bench is shown in Fig. 6. The boost 8.3.3. Load variations
converter module is driven by ARCAL 2106 driver board supplied by In order to evaluate the robustness of the controllers to fluctuations
ARCEL. A dSPACE MicroLabBox 1202 is used to implement all the of the consumption in the network, step changes of the load resistance
control strategies with a sampling time of 50 μs. A DELTA ELEKTRON- are introduced. In Fig. 10 (a,b), at 𝑡 = 50 ms the load resistance
IKA SM500-CP-90 controllable voltage source is used to emulate the decreases from 6 Ω to 5 Ω. All four controllers can restore the output
DC input voltage. ControlDesk from dSPACE is used for supervision. voltage to its reference after the load change. For both cases, the
The detailed circuit parameters and controller parameters are given in LC-VMC exhibits the longest recovery time (230 ms) compared to
Table 1. LC-ACMC and FCS-MPC-CMC (20 ms).

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Fig. 7. Experimental results of voltage and current waveforms in steady-state.

8.4. Modeling and practical issues prediction horizon. A platform with a significant computational capac-
ity is mandatory to provide a 100 kHz sampling rate for FCS-MPC-based
8.4.1. Converter modeling procedure strategies.
The averaged small-signal model is designed for linear controllers, This challenge can be addressed by using high-performance hard-
while the discrete-time model is designed for the MPC-based ones. ware platforms such as FPGA or SoC platforms, which offer many
However, the averaged small-signal model is no longer valid if the implementation possibilities for applications in power electronics. They
converter operates in DCM, which requires another model. In contrast, provide fully parallel computing due to their inherent parallelism and,
the DCM can be integrated into the FCS-MPC-based strategies as shown as a result, significantly reduce the computation time (Monmasson
in Section 3.5. et al., 2011; Stanciu & Gerigan, 2017). In addition, if attention needs
to be paid to resources, factoring and pipelining of the architecture can
be adopted, allowing implementation in low-cost FPGAs. Therefore, it
8.4.2. Practical implementation issues is possible to increase the complexity of the MPC algorithm and the
In the current study, all four control strategies are implemented prediction horizon without this being an obstacle to the use of the MPC
on a dSPACE Microlab 1202 real-time system. Only the Digital Signal algorithm (Zafra et al., 2020).
Processor (DSP) is used with a sampling time of 50 μs. Usually, linear The number of sensors can also have a significant impact on the
controllers such as LC-VMC and LC-ACMC can be implemented with- cost and reliability in practical applications. While the output voltage
out difficulty using a traditional DSP thanks to the simplicity of the sensor is necessary for all four control strategies, the two current-
algorithms. mode methods need current sensors to measure the inductance current.
However, this is not the case for MPC-based strategies. Firstly, the For FCS-MPC-VMC, input voltage and load current are also required
switching frequency strongly depends on the sampling frequency. As for prediction. When selecting sensors concerning their accuracy and
an example, to reach an equivalent switching frequency of 20 kHz, the immunity to interference, particular care must be taken. It is also
sampling frequency should be around 100 kHz (Karamanakos & Geyer, essential to ensure that their properties do not drift over time, thus com-
2019). Besides, for MPC-based methods, the algorithm’s complexity and promising their availability and reliability. Finally, it may be tempt-
the computational burden are highly dependent on the model and the ing to substitute estimators for sensors. In this case, the user will

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Fig. 8. Experimental results for output reference voltage change. Fig. 9. Experimental results for input voltage change.

be confronted with the classical problems of estimators: robustness, structure based on the use of only one voltage feedback loop requiring
convergence and computation. only one voltage sensor. Besides, a conventional DSP can handle the
computational load as there are no specific calculation requirements.
8.4.3. Applicability in CCM and DCM However, the controller design with a sufficient stability margin is
Linear controllers are designed for a specific operating mode (CCM relatively complex and the inductance current is not regulated, which
or DCM) and an operating range around an equilibrium point. Design- should be avoided in high power applications where security is an issue.
ing a single controller that can achieve good performance in both CCM The FCS-MPC-VMC allows the boost converter to operate
and DCM modes is tedious since the boost converter model is entirely autonomously in both CCM and DCM with seamless transitions. The
different in these two modes. (Erickson & Maksimovic, 2020; Reatti & microprocessor sampling frequency limits the average switching fre-
Kazimierczuk, 2003). Therefore, it is preferable to design a controller quency, resulting in high current ripples. High-performance platforms,
for each mode. But in that case, the system will need to handle the such as FPGAs or SoCs, can help to mitigate this problem. However,
transition between the two modes while avoiding undesirable transient a detailed model is needed to ensure zero steady-state error, which is
effects (Hwang & Park, 2012; Michal & Chesneau, 2016). The situation always tricky in practical applications. In addition, the current in the
is different for FCS-MPC-VMC because the two modes are included inductor is not controlled either. Therefore, additional current/voltage
in the discrete-time model. Then, only one controller needs to be sensors or Kalman filters with integrated disturbances can be adopted to
designed. Fig. 11 shows the voltage and current experimental results achieve offset-free control objectives (Pannocchia & Rawlings, 2003).
of FCS-MPC-VMC with a transition from CCM to DCM. Both LC-ACMC and FCS-MPC-CMC provide inductance current reg-
ulation, which is important in DC MGs. Indeed, current peaks must be
8.5. Global comparison and recommendations reduced not only for safety reasons but also to ensure good efficiency
and preserve the life of the equipment. Besides, these two methods also
Table 2 summarizes the main characteristics of the four control provide satisfying results in terms of dynamic performance, robustness
strategies. The performance evaluation indicators are classified into 3 and implementation complexity, as shown in Table 2. Special attentions
groups: reliability and safety, electromagnetic pollution, and implemen- should be paid to FCS-MPC-CMC for the filter design, because of its
tation challenges. variable switching frequency.
The LC-VMC is a good candidate for applications where low cost For DC MGs applications, security is a priority, so the regulation
and simplicity of implementation are concerns. It has a relatively simple of the inductance current is a strong recommendation. On the other

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Table 2
Global comparison of the four control strategies.a
Criteria LC-VMC LC- FCS- FCS-
ACMC MPC- MPC-
VMC CMC
Reliability and safety
Dynamic Low High✓ High✓ High✓
performance
Voltage ≈220 ms ≈20 ms✓ ≈20 ms✓ ≈20 ms✓
tracking
settling time
Output No✓ No✓ Yes No✓
voltage
steady-state
errors
Applicability No No Yes✓ No
in both CCM
and DCM
Current No Yes✓ No Yes✓
regulation ability
Number of 1✓ 2 4 2
sensors
Electromagnetic pollution
Switching 20 kHz 20 kHz ≈3 kHz ≈5 kHz
frequency constant✓ constant✓ variable variable
Current ripple ≈ 18%✓ ≈ 18%✓ ≈ 100% ≈74%
factorb
Implementation challenge
Complexity low✓ low✓ medium medium
of practical
implementation
a Checkmarks ✓highlight the best performance for each criterion.
b Therelative ripple rate is calculated as the ratio between the ripple rate and the
average current.

hand, the reduction in the number of sensors and the simplicity of

the hardware platform reduces costs, which is very important in rural
areas inhabited by low-income people. A null steady-state error, a good
Fig. 10. Experimental results for load step change. voltage tracking and disturbance rejection abilities ensure stable and
safe operations. For these reasons, LC-ACMC and FCS-MPC-CMC are
considered as good candidates for DC MGs.

9. Conclusion

This paper provides guidelines to select the most appropriate con-

troller for a Boost power converter used in DC MGs. The performance
of linear and Finite Control Set-Model Predictive Control-based con-
trollers has been analyzed and compared with experimental results.
An optimal circuit parameter design method is proposed to minimize
the influence of the parameters of the boost converter on the con-
troller’s performance, resulting in a fair comparison. Several criteria
have been considered to compare four control strategies: modeling
methods, applicability in CCM and DCM, and complexity of practical
implementation. The experimental results have shown that it is difficult
to achieve good dynamic performance when using LC-VMC. Indeed, the
small-signal transfer function from control input to output voltage has
a RHP zero and exhibits a second-order dynamic. The introduction of
a current loop reduces the difficulty of designing the controller and
limits the inductance current during the transients. FCS-MPC-VMC can
operate in both CCM and DCM since the discrete-time model contains
information on both operating modes, which is not the case with
the models used to design linear controllers. However, the switching
frequency is variable due to the absence of a modulator, and attention
Fig. 11. Experimental results of FCS-MPC-VMC in CCM and DCM.
should be paid to the NMP behavior. The LC-ACMC and FCS-MPC-
CMC represent a good compromise regarding dynamic performance,
implementation complexity and robustness to disturbances. They can
be considered as the best candidates to control Boost converter in DC
MGs.

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Q. Guo, I. Bahri, D. Diallo et al. Control Engineering Practice 131 (2023) 105387

Declaration of competing interest Karamanakos, P., Geyer, T., & Kennel, R. (2017). On the choice of norm in finite
control set model predictive control. IEEE Transactions on Power Electronics, 33(8),
7105–7117.
The authors declare that they have no known competing finan-
Karamanakos, P., Geyer, T., & Manias, S. (2013). Direct model predictive current control
cial interests or personal relationships that could have appeared to strategy of DC–DC boost converters. IEEE Journal of Emerging and Selected Topics in
influence the work reported in this paper. Power Electronics, 1(4), 337–346.
Karamanakos, P., Geyer, T., & Manias, S. (2014). Direct voltage control of DC–DC boost
Acknowledgments converters using enumeration-based model predictive control. IEEE Transactions on
Power Electronics, 29(2), 968–978.
Kouro, S., Perez, M. A., Rodriguez, J., Llor, A. M., & Young, H. A. (2015). Model
We gratefully acknowledge the Chinese Scholarship Council for predictive control: Mpc’s role in the evolution of power electronics. IEEE Industrial
providing the financial support to carry out this research. Electronics Magazine, 9(4), 8–21. http://dx.doi.org/10.1109/MIE.2015.2478920.
Kravaris, C., Daoutidis, P., & Wright, R. A. (1994). Output feedback control of
nonminimum-phase nonlinear processes. Chemical Engineering Science, 49(13),
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