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Assignment -3 Basic Electronics Engineering

This document is an assignment for Basic Electronics Engineering (ES-201) with a submission date of 5/05/2025. It contains a series of questions related to amplifier circuits, JFET characteristics, transistor configurations, number system conversions, and Boolean algebra. Each question requires calculations or designs based on provided parameters and circuit diagrams.

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4 views

Assignment -3 Basic Electronics Engineering

This document is an assignment for Basic Electronics Engineering (ES-201) with a submission date of 5/05/2025. It contains a series of questions related to amplifier circuits, JFET characteristics, transistor configurations, number system conversions, and Boolean algebra. Each question requires calculations or designs based on provided parameters and circuit diagrams.

Uploaded by

siyaramprince
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Basic Electronics Engineering (ES-201)

Assignment -3 (Assignment submission date: 5/05/2025)

Q1.For the amplifier circuit shown in Fig.1, calculate Ri, A, and Ro. The FET has gm =0.0025
mhos, rds = 50 kΩ, RL = 4 kΩ and Rs=1 kΩ.

Fig.1

Q2.A JFET has Vp = −6 V , IDSS= 10mA and ID= 3mA. Determine gm.
Q3.For an n-channel JFET, VP= −5V, IDSS= 8mA , and VGS= −2.5 V. Determine (i) ID (ii) gmo , and
(iii) gm.
Q4.For a fixed bias circuit shown in Figure 2, using an n-channel JFET, determine the
maximum and minimum values of ID and VDS, given that VDD = 20 V, RD = 2.2 kΩ,RS=1 kΩ
and VGS = −1.5 V.

Fig.2

Q5. Design a fixed bias circuit using an n-channel JFET to have ID(max) = 5 mA ,VDD=20V and
VDS(min) = 10 V.

Fig.3
Q6.Design the self-bias circuit, using the minimum and maximum transfer characteristics, given
that ID(max) = 5.5 mA, VDS(min) = 10 V, and VDD = 20 V.

Fig.4

Q7. For the voltage divider bias circuit using an n-channel FET, VDD = 18 V, R1 = 600 kΩ, R2 =
200 kΩ, RD = 1.2 kΩ, RS = 1.2 kΩ, IDSS = 10 mA, and VP = −6 V (i) find ID, VGS, and VDS and
(ii) calculate AV.
Q8.For the CS amplifier shown in Figure 5, RD = RL = 10 kΩ, RG = 10 MΩ, rds= 40 kΩ, and gm =
1.0 mA/V. Calculate, AV, Ri, Ro, and Ro'

Fig.5
Q9.For the CD amplifier shown in Figure. 6, Rs = R1 = 10 kΩ, RG = 10 MΩ, rds = 50 kΩ, and μ =
50. Calculate, AV, Ri, Ro, and Ro' .
Q10. An NPN transistor is used in a CB configuration. The emitter current is 10.2 mA and the
collector current is 10 mA. Calculate the following: (i) the base current and (ii) the current
gain.
Q11. A transistor has CB current gain of 0.975, ICO = 0.01 mA, and IB = 0.15 mA. Calculate IE
and IC.
Q12. The current gain of a transistor in the CB configuration is 0.95. Calculate the CE current
gain. Find IC if IB = 0.1 mA.
Q13. For the CS amplifier with voltage divider bias shown in Fig 6, VDD = 20V, R1 = 2 MΩ,
R2 = 0.4 MΩ, RD = 2 kΩ, Rs1 =1kΩ, RS =100Ω, IDSS = 10 mA, and VP = −6 V. The
coordinates of Q are IDQ = 5.1 mA and VGSQ = −1.6 V. rds = 50kΩ. Determine: (i) gm , (ii) Ri
, (iii) Ro, and (iv) Av .
Fig.6

Q14. Find the binary equivalent of (13.375)10.


Q15. Determine the hexadecimal equivalent of (82.25)10
Q16. Find the binary equivalent of (374.26)8 and the octal equivalent of
(1110100.0100111)2
Q17. Find the binary equivalent of (17E.F6)16 and the hex equivalent of
(1011001110.011011101)2.
Q18. Find the octal equivalent of (2F.C4)16 and the hex equivalent of (762.013)8 .

Q19.

Q20. Reduce the Boolean expression Y = AB + AB + AB + AB using Boolean laws.


Q21. For the fig.7, derive the Boolean expression of Y.

Fig.7

Q22. Find the output voltage for the circuit given in fig.8

Fig.8
Q23. Find a relationship between VO and V1 through V6 in the circuit of fig. 9
Fig. 9
Q24. Show that the circuit of fig.10 has A = VO / Vi = - K (R2 / R1) with K = 1 + R4 / R2 +
R4 / R3, and Ri = R1.

Fig. 10
Q25. Find the output voltage for the circuit given in Fig.11

Fig.11

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