Courses Tutorials Practice Search...

Sign In

Aptitude Engineering Mathematics Discrete Mathematics Operating System DBMS Computer Networks Digital Logic and Design C Programming Data Structures Algorithms Theory of Com

Next Article: Realization of Logic Gate Using Universal gates

Canonical and Standard Form Last Updated : 09 Apr, 2025

In Boolean Algebra, the NAND and NOR gates are called universal gates because any
digital circuit can be implemented by using any one of these two i.e. any logic gate can
be created using NAND or NOR gates only.

Implementation of AND Gate using Universal Gates

Implementation using NAND Gates

The AND gate is implemented using two NAND gates where the output is HIGH only
when both inputs are HIGH. The first NAND gate performs a standard NAND functions,
the second NAND gate has both inputs tied to the output of the initial NAND gate as
shown below. This particular configuration flips the output thus emulating the behavior
of an AND gate.

The AND gate can be implemented by using two NAND gates in the below fashion:

Geeksforgeeks.org asks for your consent to use

your personal data to:
Personalised advertising and content, advertising and content
measurement, audience research and services development

Store and/or access information on a device

Learn more

Your personal data will be processed and information from your device
Implementation using unique
(cookies, NORidentifiers,
Gatesand other device data) may be stored by,
accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or
used specifically by this site or app.
AND gate is implemented using
Some vendors threeyour
may process NOR gates
personal dataand
on thethe
basissetting of this Gate is referred
of legitimate
interest,
to as 111. The inputs arewhich
thenyoutransformed
can object to by managing
with the your options
use of abelow.
NOR Look
gate and then they are
for a link at the bottom of this page to manage or withdraw consent in
negated one more privacy
time andby cookie
using two more NOR gates. Together, these create the AND
settings.

function, meaning that all of the conditions set have to be met in order to pass.

Implementation of AND Manage options

gate using only NOR gates as Consent
shown below

Implementation of OR Gate using Universal Gates

Implementation Using NAND Gates

It is implemented using three NAND gates. The inputs are first inverted using two NAND
gates having their inputs probed in parallel and then the inverted outputs are connected
with the input of third NAND gate. The last NAND gate effectively performs the inverted
signals to give the required OR gate function.

The OR gate can be implemented using the NAND gate as below

We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy Got It !
Skip to content
 Implementation using NOR Gates

The OR gate is created by using an inverse of the output of the NOR operation. An
inverted form of the inputs is provided directly into the NOR gate while the output is
provided in NOR gate using fixed inputs. This inversion gives the OR gate logic as shown
below.

Implementation of OR gate using two NOR gates as shown in the picture below:

Geeksforgeeks.org asks for your consent to use

your personal data to:
Personalised advertising and content, advertising and content
measurement, audience research and services development
Implementation of NOT Gate using Universal gates.
Store and/or access information on a device

Implementation using NAND Gates

Your personal data will be processed and information from your device
A single NAND gate withunique
(cookies, ‘a’ and ‘b’ inputs
identifiers, and otherconnected respond
device data) may to a NOT gate. The NOT
be stored by,
accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or
gate function is achieved as the
used specifically result
by this of NAND operation because the input signal is
site or app.
inverted. Some vendors may process your personal data on the basis of legitimate
interest, which you can object to by managing your options below. Look
Implementation of for
NOT a linkgate
at theusing a this
bottom of single NAND
page to manage gate as shown
or withdraw consent inin the picture below:
privacy and cookie settings.

Implementation Using NOR Gates

A single NOR gate with joining of both inputs perform the function of NOT gate. The
input is negated and the output thus obtained is the inversion that is characteristic of an
NOT gate.

Implementation of NOT gate using a single NOR gate as shown in the picture below:

We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy
Skip to content
 Implementation of XOR Gate using Universal gates.

Implementation using NAND Gates

XOR gate can be implemented using four NAND gates as illustrated below. The circuit
first detects differences between inputs and processes them to produce the XOR
function.

Implementation of XOR gate using four NAND gate as shown in the picture below

Geeksforgeeks.org asks for your consent to use

your personal data to:
Personalised advertising and content, advertising and content
measurement, audience research and services development
Implementation Using NOR Gates
Store and/or access information on a device
The XOR gate is implemented by five gates and these gates are the NOR gates. The
inputs are then passed through a number of NOR gates to remove all the non-exclusive
Your personal data will be processed and information from your device
conditions before the XORunique
(cookies, is applied
identifiers,to
andthem.
other device data) may be stored by,
accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or
Implementation of used
XORspecifically
gate using by this five
site orNOR
app. gate as shown in the picture below:
Some vendors may process your personal data on the basis of legitimate
interest, which you can object to by managing your options below. Look
for a link at the bottom of this page to manage or withdraw consent in
privacy and cookie settings.

Implementation of XNOR Gate using Universal Gates

Implementation Using NAND Gate

XNOR gate is implemented by five NAND gates to make the circuit. The XOR logic is first
obtained, and then the outgoing XOR signal is passed through a NAND gate that
negates it to obtain the XNOR function.

Implementation of XNOR gate using five NAND gate as shown in the picture below:

We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy
Skip to content
 Implementation Using NOR Gate

The XNOR gate can be implemented using four NOR gates. The XOR logic is then
allowed to pass through a NOR gate, and the logic of output obtained will be the XNOR.

Implementation of XNOR gate using four NOR gate as shown in the picture below:

Implementation of NOR Gate using NAND Gates

NOR gate is formed by using four NAND gates. The first two gates perform the
operation of inversion of inputs while the subsequent two gates perform the normal
NOR operation.

Implementation of NOR gate using four NAND gate as shown in the picture below:

Geeksforgeeks.org asks for your consent to use

your personal data to:
Personalised advertising and content, advertising and content
measurement, audience research and services development

Store and/or access information on a device

Implementation of NAND Gate using NOR Gates
The NAND gate is made using four NOR gates. The first two gates invert the inputs, and
next two gates perform the operations
Your personal equivalent
data will be processed to NAND
and information operation
from your device by these inverted
(cookies, unique identifiers, and other device data) may be stored by,
signals. accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or
used specifically by this site or app.
Implementation of NAND gate using four NOR gate as shown in the picture below
Some vendors may process your personal data on the basis of legitimate
interest, which you can object to by managing your options below. Look
for a link at the bottom of this page to manage or withdraw consent in
privacy and cookie settings.

Advantages of Using Universal Gates

Simplicity: These are gates that can be used for all forms of logical operations hence
can help reduce the number of components in a circuit.
Cost-Effective: Fewer parts are required when developing one type of gate only thus
lowering costs of manufacturing.
Flexibility:Universal gates can perform any digital logic function which makes it
convenient to design any type of circuit.
Reliability: The dependence of a small number of various gates can result in
increased reliability in digital circuits.
Ease of Integration: Universal gates can be easily integrated into existing systems,
even for complex designs.

Disadvantages of Using Universal Gates

Increased Gate Count: Complex logic functions are more difficult to construct using
only NAND or NOR gates in that they take up more gates than other basic gates.
We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy
Skip to content
 Higher Power Consumption: Additional gates increase power consumption,
especially in complex circuits.
Slower Speed: Extra gates can also bring in more propagation delay, and hence lower
the speed of the circuit.
Complex Design: The circuit design becomes more complicated because of a high
number of universal gates the functions contain.
Limited Optimization: The use of only one type of gate may offer fewer optimization
possibilities and therefore result in less efficient designs.

Applications of Universal Gates

Basic Digital Circuits: Universal gates are employed widely in elementary digital
circuits for carrying out simple logical operations.
Memory Units: NAND and NOR gates are used in memory storage elements such as
SRAM and DRAM among others in the manufacture of devices that are used in the
modern world.
Arithmetic Logic Units (ALUs): The universal gates are used in ALUs to transform
constant and variable, arithmetic and logical operations with the aid of processors.
Signal Processing: In filter design and other communication processing systems
popularly known as modulation techniques, universal gates are employed.
Embedded Systems: Universal gates play a significant role in the construction of
small scale circuits to be used in the embedded systems applications.

Comment More info Advertise with us Next Article

Geeksforgeeks.org asks for your consentCanonical
to use and Standard Form
your personal data to:
Similar Reads Personalised advertising and content, advertising and content
measurement, audience research and services development
Digital Electronics and Logic Design Tutorials
Store and/or access information on a device
Digital Electronics and Logic Design are key concepts in both electronics and computer science. Digital systems are
at the core of everything from basic devices like calculators to advanced computing systems. Digital systems use…

4 min read Your personal data will be processed and information from your device
(cookies, unique identifiers, and other device data) may be stored by,
accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or
Number Systems used specifically by this site or app.
Some vendors may process your personal data on the basis of legitimate
interest, which you can object to by managing your options below. Look
Boolean Algebra and Logic Gates
for a link at the bottom of this page to manage or withdraw consent in
privacy and cookie settings.

Logic Gates - Definition, Types, Uses

Logic Gates are the fundamental building blocks in digital electronics. There are basically seven main types of
logic gates that are used to perform various logical operations in digital systems. By combining different logic…

10 min read

Basic Conversion of Logic Gates

In the Digital System, logic gates are the basic building blocks. Â In these logic gates, we can find the gates
having more than one input, but will have only one output. The connection between the input and the output of …

6 min read

Realization of Logic Gate Using Universal gates

In Boolean Algebra, the NAND and NOR gates are called universal gates because any digital circuit can be
implemented by using any one of these two i.e. any logic gate can be created using NAND or NOR gates…

6 min read

Canonical and Standard Form

Canonical Form - In Boolean algebra, the Boolean function can be expressed as Canonical Disjunctive Normal
Form known as minterm and some are expressed as Canonical Conjunctive Normal Form known as maxterm. In…

6 min read

Types of Integrated Circuits

In this article, we will go through the Types of Integrated Circuits, we will start our article with the introductions
of the ICs, then we will go through different types of ICs one by one, At last, we will conclude our article will the…

7 min read

Minimization Techniques
We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy
Skip to content
 Combinational Circuits

Sequential Circuits

Conversion of Flip-Flop

Register, Counter, and Memory Unit

LMNs and GATE PYQs

Practice Questions - Digital Logic & Design

Company Languages DSA Data Science & ML Web Technologies Python Tutorial
About Us Python Data Structures Data Science With HTML Python Programming
Corporate & Communications Address: Legal Java Algorithms Python CSS Examples
A-143, 7th Floor, Sovereign Corporate Privacy Policy C++ DSA for Beginners Data Science For JavaScript Python Projects
Tower, Sector- 136, Noida, Uttar Pradesh In Media PHP Basic DSA Problems Beginner TypeScript Python Tkinter
(201305)
Contact Us GoLang DSA Roadmap Machine Learning ReactJS Python Web Scraping
Registered Address: Advertise with us SQL Top 100 DSA Interview ML Maths NextJS OpenCV Tutorial
K 061, Tower K, Gulshan Vivante GFG Corporate Solution R Language Problems Data Visualisation Bootstrap Python Interview
Apartment, Sector 137, Noida, Gautam Placement Training Android Tutorial DSA Roadmap by Pandas Web Design Question
Buddh Nagar, Uttar Pradesh, 201305 Program Tutorials Archive Sandeep Jain NumPy Django
All Cheat Sheets NLP
Deep Learning
Geeksforgeeks.org asks for your consent to use
Computer Science DevOpsyour personalSystem
data to:Design Inteview School Subjects GeeksforGeeks
Operating Systems Git High Level Design Preparation Mathematics Videos
Computer Network Personalised
Linux advertising and content, advertising
Low Level Design and content Physics
measurement, audience research and services development
Competitive DSA
Database Management AWS UML Diagrams Programming Chemistry Python
Advertise with us System Docker Interview Guide Top DS or Algo for CP Biology Java
Store and/or access information on a device
Software Engineering Kubernetes Design Patterns Company-Wise Social Science C++
Digital Logic Design Azure OOAD Recruitment Process English Grammar Web Development
Engineering Maths GCP System Design Company-Wise Commerce Data Science
Software Development
Your personalDevOps Roadmap
data will be processed and Bootcamp
information from your devicePreparation World GK CS Subjects
Software Testing (cookies, unique identifiers, and other device data) may be stored
Interview Questions by,
accessed by and shared with 513 TCF vendor(s) and 69 ad partner(s), or Aptitude Preparation
used specifically by this site or app. Puzzles
Some vendors may process your personal data on the basis of legitimate
interest, which you can object to by managing your options below. Look
@GeeksforGeeks, Sanchhaya Education Private Limited, All rights reserved
for a link at the bottom of this page to manage or withdraw consent in
privacy and cookie settings.

We use cookies to ensure you have the best browsing experience on our website. By using our site, you acknowledge that you have read and understood our Cookie Policy & Privacy Policy