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Computer Architecture Digital Circuits To Microprocessors Guilherme Arroz instant download

The document provides information about the book 'Computer Architecture: Digital Circuits to Microprocessors' by Guilherme Arroz and others, published by World Scientific. It outlines the book's focus on digital systems, computer architecture, and the fundamental concepts of information encoding and processing. Additionally, it includes links to related ebooks and resources for further study in the field of computer architecture and digital design.

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Computer
Architecture
Digital Circuits to
Microprocessors

10940hc_9789813238336_tp.indd 1 16/1/18 5:16 PM


This page intentionally left blank
Computer
Architecture
Digital Circuits to
Microprocessors

Guilherme Arroz • José Monteiro


Arlindo Oliveira
Instituto Superior Técnico, Portugal

World Scientific
NEW JERSEY • LONDON • SINGAPORE • BEIJING • SHANGHAI • HONG KONG • TAIPEI • CHENNAI • TOKYO

10940hc_9789813238336_tp.indd 2 16/1/18 5:16 PM


Published by
World Scientific Publishing Co. Pte. Ltd.
5 Toh Tuck Link, Singapore 596224
USA office: 27 Warren Street, Suite 401-402, Hackensack, NJ 07601
UK office: 57 Shelton Street, Covent Garden, London WC2H 9HE

Library of Congress Cataloging-in-Publication Data


Names: Arroz, Guilherme, author. | Monteiro, José, author. | Oliveira, Arlindo L., author.
Title: Computer architecture : digital circuits to microprocessors / by
(author) Guilherme Arroz (Instituto Superior Técnico, Portugal),
José Monteiro, (Instituto Superior Técnico, Portugal),
Arlindo Oliveira, (Instituto Superior Técnico, Portugal).
Description: New Jersey : World Scientific, [2018] | Includes index.
Identifiers: LCCN 2018008587 | ISBN 9789813238336 (hc : alk. paper)
Subjects: LCSH: Computer architecture.
Classification: LCC QA76.9.C62 A77 2018 | DDC 004.2/2--dc23
LC record available at https://lccn.loc.gov/2018008587

British Library Cataloguing-in-Publication Data


A catalogue record for this book is available from the British Library.

Based on a translation from the Portuguese language edition:


Arquitectura de Computadores: dos Sistemas Digitais aso Microprocessadores by Guilherme Arroz, José Monteiro
and Arlindo Oliveira
Copyright © IST Press 2014, 2009, 2007 Instituto Superior Técnico
All Rights Reserved

Copyright © 2019 by José Monteiro, Arlindo Oliveira, and Guilherme Arroz


All rights reserved.

For any available supplementary material, please visit


https://www.worldscientific.com/worldscibooks/10.1142/10940#t=suppl

Desk Editor: Herbert Moses

Typeset by Stallion Press


Email: [email protected]

Printed in Singapore

Herbert Moses - 10940 - Computer Architecture.indd 1 23-07-18 4:10:01 PM


July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page v

Preface

Until the last decades of the 20th century, the real world was viewed as a sys-
tem described by continuous values. The perception that human beings had
about the physical world, regarding sounds, images and other sensations, was
one of inherently continuous phenomena. The same happened with models of
physical systems, both inanimate and biological. To model and study various
physical systems, analogue computers were developed during and immedi-
ately after the Second World War. These computers enabled the accurate
modelling of those continuous physical values.
This vision suffered significant changes with the emergence of digital com-
puters and, above all, with the popularisation of their use, boosted by techno-
logical advances resulting from integrated circuit technologies and magnetic
and optical information storage.
It has thus become clear that magnitudes such as the intensity of light
coming from a given direction or the pressure of air at a given point in time
can be represented, with various advantages, by a numerical value digitally
stored in a computer memory. Technology allowed the storage of these values
(images and sounds, after suitable transformations from the analogue domain
to the digital domain). Simultaneously the same technologies made possible
the subsequent reproduction of the stored values (locally or remotely) on a
computer monitor or a speaker, giving rise to a set of ever-present features
of the modern society of today. These include, among others, telecommuni-
cations (telephones, computers and mobile phones) and various aspects of
the entertainment industry (music, cinema, television and games) which are
now based, in one way or another, on the digital encoding of information.
These applications, which already existed with different technologies
before the appearance of digital computers, were joined by a set of applica-
tions made possible through computers and their use. Among those, informa-
tion systems (databases, banking services, e-commerce) are of note, many of

v
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page vi

vi Preface

them boosted by the emergence of the Internet, the worldwide network con-
necting most of the world’s computers. Mobile systems, all of them based on
digital technologies, became ubiquitous in our lives and a fixture of today’s
daily life. Along with the rapid deployment of computers and digital tech-
nologies, it has also been found that, to a certain extent, biological systems
are also encoded by nature in a manner comparable to that of digital technol-
ogy. Genetic information is stored in a discrete manner in the DNA molecules
which make up the chromosomes of organisms. As a result of large genome
sequencing projects, there are now databases with complete information on
the genome of numerous organisms, including humans. Likewise, the con-
nection between these two areas has led to greater activity in the interface
between biological systems and digital technology.
We are therefore living in an era in which all information is gradually
becoming digital. In its simplest version, digital information is stored using
some mechanism (electronic, magnetic or optical) which, at the lowest level,
is physically supported by storing two possible values. The physical quan-
tity used to represent each of these values may be an electrical voltage (in
the case of a computer memory), reflectivity (in an optical disc) or a state
of magnetisation (in a magnetic disk). In all cases, these different physical
quantities always represent a discrete variable, which can typically take on
the values 0 or 1. Since each of the variables involved has so little capacity
to represent information, the effective use of digital systems implies the use
of a very high number of variables of this type (bits) to represent useful
information, from registers in databases to images, sounds or video.
The study of digital systems is thus essential not only for the profes-
sionals who directly design and operate computers but also for all those
who wish to understand the foundations of the present-day society, deeply
and systematically. The detailed way to encode films, music or communica-
tions is, obviously, outside the scope of an introductory book like this. These
techniques, which have evolved over the last decades, represent a significant
accumulated body of knowledge which it is not possible to address when first
studying this material. However, all these matters depend on the knowledge
of basic encoding techniques and digital information processing, which form
the focus of the study of this book.
Therefore we will describe, in this book, the basic techniques of encod-
ing information, and the fundamental concepts which form the basis of the
computational systems that process and transform this information. The
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page vii

Preface vii

interested readers can then carry out a more in-depth study of these topics,
both regarding encoding and information representation, as well as those
related to computer system architectures.
There are numerous approaches to the topic of digital systems. At one
extreme, there are the purely mathematical or algebraic approaches, which
completely ignore the aspect of implementation. At the other extreme, there
are those which start from electronic system technologies, giving special
emphasis to the physical aspects related to the construction of digital sys-
tems.
This book has opted for an intermediate approach which, although not
completely ignoring the physical aspects of the topic, essentially considers
digital systems as abstract information processing elements which constitute
the blocks of a computer.
From this perspective, this book has been designed as a support for an
initial study of computer architectures, typically made in the context of
two university-level semester courses. We anticipate that this book can be
naturally used in the areas of Computer Science, Electronics and Electrical
Engineering, but also in other technical areas, where there is interest in
training students in digital systems, such as Mechanical Engineering, Physics
Engineering or Aerospace Engineering.
A typical course will cover, in the first semester, the topics of digital sys-
tems that are the first part of the book, Chapters 1–8. The second semester
typically covers the computer architecture components described in the sec-
ond part of the book, made up of the remaining chapters.
It is also possible to consider the use of Chapters 9–11 and 13–15 as
support for an introductory course on computer architecture, from a pro-
grammers point of view, for students who only have basic knowledge of
digital systems. In this case, certain sections of these chapters will have to
be covered in a necessarily superficial manner.
Chapter 1 describes the fundamental concepts related to the digital rep-
resentation of information, the use of number systems using different bases,
the arithmetic operations using these bases and conversions between repre-
sentations with different bases.
Chapter 2 analyses logic functions and how they are manipulated, synthe-
sised and optimised. Boolean logic is presented, in a systematic manner, but
with a utilitarian perspective of describing the formulas used to manipulate
logic expressions.
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page viii

viii Preface

Chapter 3 deals, in a necessarily brief and synthetic way, with the tech-
nologies used to implement logic circuits and the limitations imposed by
physical restrictions on the design of digital circuits.
Chapter 4 starts the process of integrating fundamental components, with
the aim of constructing basic computer blocks. This chapter describes com-
binational modules of medium complexity, constructed using the logic gates
previously studied.
Chapter 5 deals with the construction of arithmetic modules that allow
the execution of basic arithmetic operations in base 2, and some aspects of
the issues related to the performance of those modules.
Chapter 6 presents for the first time the concept of sequential behaviour
and describes the circuits which preserve the state of the system (latches
and flip-flops) and exhibit a behaviour that takes into account past history
of the circuit.
Chapter 7 is dedicated to the design, analysis and optimisation of sequen-
tial circuits, which use the latches and flip-flops studied in the previous chap-
ter as basic elements.
Chapter 8, which can be considered as the concluding chapter of the
first part of the book, describes how the circuits of intermediate complexity
studied in Chapters 4–6 may be interconnected, to process complex data
when controlled by the systems studied in Chapter 7.
Chapter 9 represents a general introduction to computers, seen from
a generalist perspective. It aims at providing the transition between the
detailed analysis carried out in the first part of the book, dedicated to digi-
tal systems, and the high-level analysis which will gradually characterise the
second part of the book, dedicated to computer architectures.
Chapter 10 presents the concepts of instruction and instruction set for
a processor, and studies the way instructions are specified, executed and
encoded. This chapter also introduces the P3 processor, the Petite Pedagogic
Processor, which is the platform that will be used to practice the program-
ming and architecture concepts which are the topics of the following two
chapters.
Chapter 11 is dedicated to programming techniques in assembly language,
using the P3 processor as a platform for the study and development of small
programming projects.
Chapter 12 presents and analyses the internal structure of a processor,
once again using the P3 as a case study. In this chapter, the P3 is used as a
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page ix

Preface ix

concrete example of how to design the internal circuits of a simple processor,


including the datapath and the control circuit components.
The following three chapters cover, in a necessarily compact manner,
architectural concepts which cannot be covered completely and systemati-
cally in an introductory book like this one. These chapters aim at describing
the fundamental concepts involved in the use of memories, peripherals and
more advanced pipelined architectures, without aspiring to cover these topics
extensively.
Chapter 13 is dedicated to the study of memory systems and deals with
basic concepts related to the organisation of memory maps, cache utilisation
and virtual memory systems.
Chapter 14 deals with issues related to input/output operations and the
use of peripherals in computer systems.
Finally, Chapter 15 provides a brief introduction to more advanced com-
puter architectures, focusing on themes such as the use of pipelines and other
alternatives which have been developed to exploit the parallelism present in
computer programs. To focus this study, we use the P4 (Petite Pedagogic
Processor with Pipeline) processor, which illustrates some of the concepts
discussed.
Besides the text itself, and the series of problems included in the book,
various resources have been created during the development of this work,
which can be used to support training in this area. The concepts related to
microprocessor architecture are studied in the lab using an implementation
of a simple and didactic processor, the P3. To allow students to carry out
work in labs on the same architecture studied in the lectures, the P3 has
been described in VHDL and implemented in hardware on a board with an
FPGA, external memory and a set of interface devices. At the same time, an
assembler for P3 assembly and a simulator for this architecture were devel-
oped. Therefore, students can develop their programs in P3 assembly, gener-
ate the executable code, run the programs in the simulator and upload the
executable to the board, through the parallel port of their computer. The
simulator was intended to fully emulate the board, particularly regarding
the peripherals available and their interface. On the one hand, the simulator
allows students to run their programs anywhere and, on the other, it rep-
resents a precious tool for debugging their programs, since the debugging
process in the board is much more complex. The fundamental limitation of
the simulator is its speed of execution. On this board, the P3 has an operat-
ing frequency of 6.25 MHz. In addition to assembly level programming, both
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page x

x Preface

versions of the P3 allow the students to perform changes to the content of the
control ROMs, which enables not only the alteration of the microprogram
of the existing instructions but also the creation and micro-programming of
new assembly instructions. These tools (assembler, simulator, implementa-
tion in VHDL) are freely available on the website of this book. Details of
this implementation may be consulted in Appendix A.
A preface is never complete without the necessary acknowledgements sec-
tion. Given the time this book took to be concluded, our initial thanks must
go to our families who, for years, have uncomplainingly accepted the usual
excuse for our systematic unavailability. To our wives, to whom this book is
dedicated, as well as to our children, from whom we stole many hours to be
able to finish it, here is a thank you from the bottom of our hearts.
Other thanks are due for more technical contributions. The reviewers,
Pedro Diniz and João Cardoso, read preliminary versions of this work and
contributed with many valuable suggestions to improve it. The students
Jorge Santana, Nuno Barral and Fausto Ferreira, contributed to various
aspects of the simulators and the implementation in hardware. The lectur-
ers of the computer architecture courses at Técnico, Carlos Ribeiro, João
Gonçalves, José Costa, Nuno Roma, Alberto Cunha and Nuno Horta, con-
tributed with many comments, suggestions and various improvements. The
editors and employees of IST Press, Joaquim Moura Ramos, Pedro Lourtie,
Miguel Dionı́sio and Paulo Abreu, as well as the reviewers, provided valuable
assistance during the editing and composition phase. The companies SAS
Portugal and Novabase financially supported this publishing project, in the
Portuguese original. The translation to English, a complex and lengthy pro-
cess, was performed by David Hardisty. To all of you, our sincere thanks. Any
typos, errors and omissions that remain, and there will surely be many, are
entirely our responsibility. The authors José Monteiro and Arlindo Oliveira
would also like to leave a very special thank you note to the third author,
Guilherme Arroz, who performed the bulk of the work involved in creating
the English version of this book.
Finally, the statement, obvious but indispensable, that all this has only
been possible because of our parents.
Lisbon, December 2017
Arlindo Oliveira, José Monteiro
and Guilherme Arroz
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page xi

Contents

Preface v

1. Digital Representation of Information 1


1.1 Number Systems . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 Representation of Integers in Base-b . . . . . . . . . 2
1.1.2 Representation of Non-signed Integers in Base-2 . . . 4
1.1.3 Representation of Fractional Numbers in Base-2 . . . 6
1.1.4 Representation of Numbers in Bases
Powers of 2 . . . . . . . . . . . . . . . . . . . . . . . 8
1.2 Arithmetic Operations in Base-2, Base-8 and Base-16 . . . . 12
1.2.1 Sums in Base-2 . . . . . . . . . . . . . . . . . . . . . 13
1.2.2 Multiplications in Base-2 . . . . . . . . . . . . . . . 14
1.2.3 Arithmetic Operations in Other Bases . . . . . . . . 16
1.3 Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.3.1 Coding . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.3.2 Numeric Codes . . . . . . . . . . . . . . . . . . . . . 19
1.3.3 Reflected Codes . . . . . . . . . . . . . . . . . . . . . 21
1.3.4 Alphanumeric Codes . . . . . . . . . . . . . . . . . . 22
1.4 Units of Information . . . . . . . . . . . . . . . . . . . . . . . 25
1.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2. Logic Functions 31
2.1 Binary Boolean Algebra . . . . . . . . . . . . . . . . . . . . . 31
2.1.1 One-variable Logic Functions . . . . . . . . . . . . . 32
2.1.2 Two-variable Logic Functions . . . . . . . . . . . . . 34
2.1.3 The Functions And and Or . . . . . . . . . . . . . . 34

xi
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xii Contents

2.1.4 Conjunction or And Function . . . . . . . . . . . . . 34


2.1.5 Disjunction or Or Function . . . . . . . . . . . . . . 36
2.1.6 Duality Principle . . . . . . . . . . . . . . . . . . . . 37
2.1.7 Operation Priority . . . . . . . . . . . . . . . . . . . 38
2.1.8 Theorems Involving And and Or . . . . . . . . . . . 39
2.1.9 Formal Definition of Boolean Algebra . . . . . . . . 40
2.1.10 Nand and Nor Functions . . . . . . . . . . . . . . 42
2.1.11 Xor Function . . . . . . . . . . . . . . . . . . . . . . 43
2.1.12 N-variable Logic Functions . . . . . . . . . . . . . . 45
2.1.13 Handling of Logic Expressions . . . . . . . . . . . . . 46
2.2 Representation of Logic Functions . . . . . . . . . . . . . . . 49
2.2.1 Standard Sum of Products Form . . . . . . . . . . . 51
2.2.2 Standard Product of Sums Form . . . . . . . . . . . 54
2.2.3 Representation of Functions Using a Single
Operator Type . . . . . . . . . . . . . . . . . . . . . 57
2.3 Minimising Logic Expressions . . . . . . . . . . . . . . . . . 59
2.3.1 Karnaugh Method . . . . . . . . . . . . . . . . . . . 61
2.3.1.1 Motivation for the Karnaugh method . . . 61
2.3.1.2 Three-variable Karnaugh map . . . . . . . 62
2.3.1.3 Four-variable Karnaugh map . . . . . . . . 68
2.3.2 Foundations of the Karnaugh Method . . . . . . . . 72
2.3.3 Karnaugh Method for Incompletely
Specified Functions . . . . . . . . . . . . . . . . . . . 75
2.3.4 Five-variable Karnaugh map . . . . . . . . . . . . . . 78
2.3.5 Quine–McCluskey Method . . . . . . . . . . . . . . . 83
2.3.6 Quine–McCluskey Method for Incompletely
Specified Functions . . . . . . . . . . . . . . . . . . . 90
2.3.7 Comparison between Karnaugh and
Quine–McCluskey Methods . . . . . . . . . . . . . . 92
2.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

3. Physical Implementation of Logic Circuits 99


3.1 Digital Integrated Circuits . . . . . . . . . . . . . . . . . . . 99
3.1.1 Logic Families . . . . . . . . . . . . . . . . . . . . . . 99
3.1.2 Basic Gates . . . . . . . . . . . . . . . . . . . . . . . 103
3.1.3 Logic Levels and Voltage Levels . . . . . . . . . . . . 105
3.1.4 Delays . . . . . . . . . . . . . . . . . . . . . . . . . . 107
July 27, 2018 7:10 Computer Architecture: Digital Circuits to Microprocessors- 9.61in x 6.69in b3203-fm page xiii

Contents xiii

3.1.5 Power . . . . . . . . . . . . . . . . . . . . . . . . . . 108


3.1.6 Special Devices . . . . . . . . . . . . . . . . . . . . . 109
3.1.6.1 Tri-state buffers . . . . . . . . . . . . . . . 109
3.1.6.2 Incomplete devices . . . . . . . . . . . . . 111
3.1.6.3 Transmission gates . . . . . . . . . . . . . 114
3.2 Positive, Negative and Polarity Logic . . . . . . . . . . . . . 115
3.3 Circuit Wiring Diagrams . . . . . . . . . . . . . . . . . . . . 117
3.4 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . 120
3.4.1 Analysis of Delays in Circuits . . . . . . . . . . . . . 120
3.4.2 Spurious Transitions in Combinational Circuits . . . 124
3.5 Direct Implementation . . . . . . . . . . . . . . . . . . . . . 127
3.5.1 Implementation Using ROMs . . . . . . . . . . . . . 128
3.5.2 Implementation Using Programmable
Logic Arrays . . . . . . . . . . . . . . . . . . . . . . 133
3.5.3 Implementation Using Programmable
Array Logic . . . . . . . . . . . . . . . . . . . . . . . 136
3.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

4. Combinational Modules of Medium Complexity 143


4.1 Modularity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
4.2 Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
4.2.1 Binary Decoders . . . . . . . . . . . . . . . . . . . . 149
4.2.2 Decoder Expansion . . . . . . . . . . . . . . . . . . . 152
4.3 Encoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
4.3.1 Binary Encoders . . . . . . . . . . . . . . . . . . . . 155
4.4 Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
4.4.1 Implementation of Multiplexers . . . . . . . . . . . . 159
4.4.2 Types of Multiplexers . . . . . . . . . . . . . . . . . 161
4.4.3 Expansion of Multiplexers . . . . . . . . . . . . . . . 162
4.4.4 Multiplexing and Demultiplexing . . . . . . . . . . . 163
4.5 Implementation of Logic Functions with Modules
of Medium Complexity . . . . . . . . . . . . . . . . . . . . . 165
4.5.1 Implementation with Decoders . . . . . . . . . . . . 165
4.5.2 Implementation with Multiplexers . . . . . . . . . . 166
4.6 Iterative Circuits . . . . . . . . . . . . . . . . . . . . . . . . 169
4.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
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5. Arithmetic Circuits 177


5.1 Adders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
5.1.1 Half-Adder . . . . . . . . . . . . . . . . . . . . . . . 178
5.1.2 Full-Adder . . . . . . . . . . . . . . . . . . . . . . . . 180
5.1.3 N-bit Adder . . . . . . . . . . . . . . . . . . . . . . . 182
5.1.4 Fast Adders . . . . . . . . . . . . . . . . . . . . . . . 184
5.1.4.1 Carry-select adders . . . . . . . . . . . . . 184
5.1.4.2 Carry-lookahead adders . . . . . . . . . . . 186
5.2 Signed Numbers . . . . . . . . . . . . . . . . . . . . . . . . . 189
5.2.1 Sign and Magnitude Encoding . . . . . . . . . . . . . 189
5.2.2 2’s Complement Encoding . . . . . . . . . . . . . . . 190
5.2.3 Sign Extension . . . . . . . . . . . . . . . . . . . . . 192
5.2.4 Operations with Numbers in 2’s Complement . . . . 194
5.2.5 Overflow . . . . . . . . . . . . . . . . . . . . . . . . . 195
5.2.6 Subtractors . . . . . . . . . . . . . . . . . . . . . . . 198
5.2.7 Subtractor Circuit . . . . . . . . . . . . . . . . . . . 199
5.2.8 Subtraction Using Adders . . . . . . . . . . . . . . . 200
5.2.9 Adder/Subtractor Circuit . . . . . . . . . . . . . . . 201
5.3 Multipliers and Dividers . . . . . . . . . . . . . . . . . . . . 202
5.3.1 Multiplication of Unsigned Numbers:
Array Multiplier . . . . . . . . . . . . . . . . . . . . 203
5.3.2 Analysis of the Array Multiplier Circuit . . . . . . . 205
5.3.3 Multiplication of Signed Numbers . . . . . . . . . . . 205
5.3.4 Multiplication of Numbers in Sign-Magnitude
Representation . . . . . . . . . . . . . . . . . . . . . 206
5.3.5 Multiplication of Numbers in 2’s Complement
Notation . . . . . . . . . . . . . . . . . . . . . . . . . 207
5.3.6 Divisors . . . . . . . . . . . . . . . . . . . . . . . . . 212
5.4 Fixed-Point . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
5.4.1 Fixed-Point Representation . . . . . . . . . . . . . . 213
5.4.2 Operations Under Fixed-Point Using
Integer Units . . . . . . . . . . . . . . . . . . . . . . 214
5.4.3 Limitations of Fixed-Point Representation . . . . . . 217
5.5 Floating-Point Representations . . . . . . . . . . . . . . . . . 218
5.5.1 Mantissa and Exponent . . . . . . . . . . . . . . . . 219
5.5.2 Floating-Point Operations . . . . . . . . . . . . . . . 219
5.5.3 IEEE-754 Standard . . . . . . . . . . . . . . . . . . . 221
5.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
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6. Basic Sequential Circuits 227


6.1 Sequential Behaviour of Circuits . . . . . . . . . . . . . . . . 228
6.2 Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
6.2.1 SR Latch . . . . . . . . . . . . . . . . . . . . . . . . 230
6.2.2 SR Latches with an Enable Signal . . . . . . . . . . 234
6.2.3 D Latch . . . . . . . . . . . . . . . . . . . . . . . . . 237
6.3 Clock Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
6.3.1 Global Synchronisation Signal . . . . . . . . . . . . . 239
6.3.2 Characteristics of the Clock Signal . . . . . . . . . . 240
6.4 Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
6.4.1 Types of Sampling . . . . . . . . . . . . . . . . . . . 242
6.4.1.1 Master–slave flip-flops . . . . . . . . . . . . 242
6.4.1.2 Edge-triggered flip-flops . . . . . . . . . . . 244
6.4.2 Types of Flip-Flops . . . . . . . . . . . . . . . . . . . 246
6.4.2.1 D-type flip-flops . . . . . . . . . . . . . . . 246
6.4.2.2 SR flip-flops . . . . . . . . . . . . . . . . . 246
6.4.2.3 JK flip-flops . . . . . . . . . . . . . . . . . 246
6.4.2.4 T flip-flops . . . . . . . . . . . . . . . . . . 249
6.4.3 Direct Inputs . . . . . . . . . . . . . . . . . . . . . . 250
6.4.4 Timing Parameters of Flip-Flops . . . . . . . . . . . 252
6.5 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
6.5.1 Basic Registers . . . . . . . . . . . . . . . . . . . . . 256
6.5.2 Register Control Signals . . . . . . . . . . . . . . . . 259
6.5.3 Shift Registers . . . . . . . . . . . . . . . . . . . . . 262
6.5.4 Status Signals in Registers . . . . . . . . . . . . . . . 266
6.6 Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
6.6.1 Asynchronous Counters . . . . . . . . . . . . . . . . 269
6.6.1.1 Timing diagram . . . . . . . . . . . . . . . 270
6.6.1.2 Maximum operating frequency . . . . . . . 270
6.6.1.3 Asynchronous counter with a generic
modulo . . . . . . . . . . . . . . . . . . . . 271
6.6.2 Synchronous Counters . . . . . . . . . . . . . . . . . 273
6.6.2.1 Transient states in synchronous counters . 275
6.6.2.2 Maximum operating frequency . . . . . . . 277
6.6.2.3 Count control signal . . . . . . . . . . . . . 279
6.6.2.4 Counters as registers . . . . . . . . . . . . 279
6.6.2.5 Synchronous counters with an arbitrary
modulo . . . . . . . . . . . . . . . . . . . . 282
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6.6.2.6
Synchronous counters with an arbitrary
sequence . . . . . . . . . . . . . . . . . . . 283
6.6.3 Interconnection of Counters . . . . . . . . . . . . . . 284
6.6.4 Applications of Counters . . . . . . . . . . . . . . . . 286
6.7 Register Transfers . . . . . . . . . . . . . . . . . . . . . . . . 287
6.7.1 Interconnection Using Multiplexers . . . . . . . . . . 287
6.7.2 Interconnection Using a Single Bus . . . . . . . . . . 288
6.7.3 Register Files . . . . . . . . . . . . . . . . . . . . . . 289
6.8 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
6.8.1 Random Access Memories . . . . . . . . . . . . . . . 292
6.8.1.1 Random access memory operation . . . . . 292
6.8.1.2 Comparison with a register file . . . . . . . 295
6.8.1.3 Internal structure . . . . . . . . . . . . . . 295
6.8.2 Dynamic Memories . . . . . . . . . . . . . . . . . . . 298
6.8.3 FIFO Memories . . . . . . . . . . . . . . . . . . . . . 299
6.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302

7. Analysis and Design of Sequential Circuits 305


7.1 Synchronous and Asynchronous Sequential Circuits . . . . . 306
7.2 Mealy and Moore Machines . . . . . . . . . . . . . . . . . . 308
7.3 Design of Synchronous Sequential Circuits . . . . . . . . . . 311
7.3.1 State Diagrams . . . . . . . . . . . . . . . . . . . . 311
7.3.1.1 State diagram for the parity detector . . . 316
7.3.1.2 State diagram for an alarm detector . . . . 316
7.3.2 Elimination of Redundant States . . . . . . . . . . . 320
7.3.3 Specification Using Flowcharts . . . . . . . . . . . . 327
7.4 Implementation of Synchronous Sequential Circuits . . . . . 331
7.4.1 State Assignment . . . . . . . . . . . . . . . . . . . . 332
7.4.1.1 State assignment using binary code . . . . 333
7.4.1.2 Encoding with one flip-flop per state . . . 334
7.4.2 State Transition Table . . . . . . . . . . . . . . . . . 335
7.4.3 Circuit Synthesis . . . . . . . . . . . . . . . . . . . . 336
7.4.3.1 Synthesis using D-type flip-flops . . . . . . 336
7.4.3.2 Circuit synthesis using JK flip-flops . . . . 337
7.4.3.3 Synthesis using one flip-flop per state . . . 339
7.5 Techniques for the Implementation
of Complex Sequential Circuits . . . . . . . . . . . . . . . . . 342
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7.5.1 Control Unit Implemented with Discrete Logic . . . 342


7.5.2 Counter-based Control Units . . . . . . . . . . . . . 344
7.5.3 Microprogrammed Control Unit . . . . . . . . . . . 347
7.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353

8. Register Transfers and Datapaths 361


8.1 Levels of Abstraction . . . . . . . . . . . . . . . . . . . . . . 362
8.2 Separation between Datapath and Control Circuit . . . . . . 364
8.2.1 Motivation Example . . . . . . . . . . . . . . . . . . 365
8.2.2 Datapath . . . . . . . . . . . . . . . . . . . . . . . . 368
8.2.3 Control Unit . . . . . . . . . . . . . . . . . . . . . . 370
8.3 Hardware Description Language . . . . . . . . . . . . . . . . 371
8.3.1 Register Transfer Language . . . . . . . . . . . . . . 372
8.3.2 Example: Greatest Common Divisor . . . . . . . . . 375
8.4 Arithmetic Logic Units . . . . . . . . . . . . . . . . . . . . . 381
8.4.1 Structure of an ALU . . . . . . . . . . . . . . . . . . 381
8.4.2 Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . 383
8.4.3 Arithmetic Unit . . . . . . . . . . . . . . . . . . . . . 384
8.4.4 Logic Unit . . . . . . . . . . . . . . . . . . . . . . . . 387
8.4.5 Shift Unit . . . . . . . . . . . . . . . . . . . . . . . . 388
8.4.6 ALU Control Table . . . . . . . . . . . . . . . . . . . 391
8.4.7 Example Revisited: Greatest Common Divisor . . . . 393
8.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398

9. Computer Architecture 403


9.1 Historical Perspective . . . . . . . . . . . . . . . . . . . . . . 403
9.2 Types of Computers . . . . . . . . . . . . . . . . . . . . . . . 405
9.3 Types of Processors . . . . . . . . . . . . . . . . . . . . . . . 407
9.4 Internal Organisation of a Computer . . . . . . . . . . . . . 408
9.5 Internal Structure of a Processor . . . . . . . . . . . . . . . . 410
9.6 External Interaction . . . . . . . . . . . . . . . . . . . . . . . 411
9.7 Computer Abstraction Levels . . . . . . . . . . . . . . . . . . 414
9.8 Computer Components . . . . . . . . . . . . . . . . . . . . . 416
9.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
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10. Instruction Set Architectures 419


10.1 Programming Languages . . . . . . . . . . . . . . . . . . . . 419
10.2 Assembly Instructions . . . . . . . . . . . . . . . . . . . . . . 422
10.3 Specification of Operands . . . . . . . . . . . . . . . . . . . . 425
10.3.1 Internal Registers . . . . . . . . . . . . . . . . . . . . 426
10.3.2 Constants Specified in the Instruction . . . . . . . . 426
10.3.3 Memory and Input/Output Ports . . . . . . . . . . . 427
10.3.4 Addressing Modes . . . . . . . . . . . . . . . . . . . 428
10.3.5 Use of Stacks . . . . . . . . . . . . . . . . . . . . . . 430
10.3.6 Types of Operands . . . . . . . . . . . . . . . . . . . 432
10.4 Instruction Encoding . . . . . . . . . . . . . . . . . . . . . . 433
10.5 Program Control Instructions . . . . . . . . . . . . . . . . . 437
10.5.1 Jump Instructions . . . . . . . . . . . . . . . . . . . 437
10.5.1.1 Conditional jumps . . . . . . . . . . . . . . 438
10.5.1.2 Absolute jumps and relative jumps . . . . 439
10.5.2 Subroutine Calls . . . . . . . . . . . . . . . . . . . . 440
10.5.3 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . 442
10.6 Instruction Set for the P3 Processor . . . . . . . . . . . . . . 444
10.6.1 Arithmetic Instructions . . . . . . . . . . . . . . . . 445
10.6.2 Logic Instructions . . . . . . . . . . . . . . . . . . . 447
10.6.3 Shift Instructions . . . . . . . . . . . . . . . . . . . . 448
10.6.4 Control Instructions . . . . . . . . . . . . . . . . . . 449
10.6.5 Data Transfer Instructions . . . . . . . . . . . . . . . 451
10.6.6 Other Instructions . . . . . . . . . . . . . . . . . . . 452
10.6.7 Examples of Use . . . . . . . . . . . . . . . . . . . . 453
10.7 Instruction Format for the P3 Processor . . . . . . . . . . . 454
10.7.1 Instructions with No Operands . . . . . . . . . . . . 455
10.7.2 Instructions with One Operand . . . . . . . . . . . . 456
10.7.3 Instructions with Two Operands . . . . . . . . . . . 457
10.7.4 Control Instructions . . . . . . . . . . . . . . . . . . 457
10.7.5 Encoding Examples . . . . . . . . . . . . . . . . . . 458
10.8 An Assembler for the P3 Processor . . . . . . . . . . . . . . 459
10.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463

11. Programming in Assembly Language 467


11.1 Translation of High-level Language Constructs
to Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
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11.1.1 Variables . . . . . . . . . . . . . . . . . . . . . . . . 468


11.1.1.1 Simple types . . . . . . . . . . . . . . . . . 468
11.1.1.2 Compound types . . . . . . . . . . . . . . 472
11.1.1.3 Arrays . . . . . . . . . . . . . . . . . . . . 473
11.1.1.4 Pointers . . . . . . . . . . . . . . . . . . . 475
11.1.1.5 Variables in registers . . . . . . . . . . . . 476
11.1.2 Data Manipulation . . . . . . . . . . . . . . . . . . . 477
11.1.2.1 Same width for variables and data word . . 477
11.1.2.2 Width of variables narrower than the
data word . . . . . . . . . . . . . . . . . . 478
11.1.2.3 Width of variables wider than the
data word . . . . . . . . . . . . . . . . . . 480
11.1.2.4 Floating-point data types . . . . . . . . . . 481
11.1.3 Control Structures . . . . . . . . . . . . . . . . . . . 482
11.1.4 Subroutine Calls . . . . . . . . . . . . . . . . . . . . 485
11.1.4.1 Parameter passing using registers . . . . . 486
11.1.4.2 Parameter passing using the memory . . . 487
11.1.4.3 Parameter passing using the stack . . . . . 487
11.2 Programming Techniques in Assembly . . . . . . . . . . . . . 491
11.2.1 Structured Programming . . . . . . . . . . . . . . . 492
11.2.2 Comments . . . . . . . . . . . . . . . . . . . . . . . . 493
11.2.3 Constants . . . . . . . . . . . . . . . . . . . . . . . . 493
11.2.4 Formatting Code . . . . . . . . . . . . . . . . . . . . 494
11.3 Programming Examples . . . . . . . . . . . . . . . . . . . . . 495
11.3.1 List Manipulation . . . . . . . . . . . . . . . . . . . 495
11.3.2 State Machine . . . . . . . . . . . . . . . . . . . . . 499
11.4 Complete Illustrative Example . . . . . . . . . . . . . . . . . 505
11.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512

12. Internal Structure of a Processor 517


12.1 Datapath . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
12.1.1 Register File . . . . . . . . . . . . . . . . . . . . . . 519
12.1.2 Arithmetic Logic Unit . . . . . . . . . . . . . . . . . 521
12.1.3 Instruction Register . . . . . . . . . . . . . . . . . . 521
12.1.4 Status Register . . . . . . . . . . . . . . . . . . . . . 522
12.1.5 Interconnection Buses . . . . . . . . . . . . . . . . . 523
12.1.6 Datapath Control . . . . . . . . . . . . . . . . . . . . 523
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12.2 Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . 525


12.2.1 Microinstruction Format . . . . . . . . . . . . . . . . 527
12.2.2 Microsequencer . . . . . . . . . . . . . . . . . . . . . 529
12.2.3 Conditions Test . . . . . . . . . . . . . . . . . . . . . 531
12.2.4 Mapping Unit . . . . . . . . . . . . . . . . . . . . . . 533
12.2.5 Register File Control . . . . . . . . . . . . . . . . . . 536
12.2.6 Control Circuit . . . . . . . . . . . . . . . . . . . . . 539
12.3 Microprogramming . . . . . . . . . . . . . . . . . . . . . . . 540
12.3.1 Instruction Fetch . . . . . . . . . . . . . . . . . . . . 541
12.3.2 Operand Fetch . . . . . . . . . . . . . . . . . . . . . 543
12.3.3 Execution of Instructions . . . . . . . . . . . . . . . 546
12.3.4 Write Back . . . . . . . . . . . . . . . . . . . . . . . 548
12.3.5 Testing for Interrupts . . . . . . . . . . . . . . . . . 549
12.3.6 Generating the Microcode . . . . . . . . . . . . . . . 550
12.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552

13. Memory Systems 557


13.1 Organisation of Memory Systems . . . . . . . . . . . . . . . 558
13.1.1 Memory Banks . . . . . . . . . . . . . . . . . . . . . 558
13.1.2 Memory Maps . . . . . . . . . . . . . . . . . . . . . 561
13.1.3 Generation of Control Signals . . . . . . . . . . . . . 565
13.2 Memory Hierarchy . . . . . . . . . . . . . . . . . . . . . . . . 567
13.2.1 Caches . . . . . . . . . . . . . . . . . . . . . . . . . . 569
13.2.2 Virtual Memory . . . . . . . . . . . . . . . . . . . . 572
13.3 Organisation of Cache Systems . . . . . . . . . . . . . . . . . 574
13.3.1 Cache Data Mapping . . . . . . . . . . . . . . . . . . 575
13.3.2 Cache Blocks . . . . . . . . . . . . . . . . . . . . . . 578
13.3.3 Replacement Policies . . . . . . . . . . . . . . . . . 580
13.3.4 Write Policies . . . . . . . . . . . . . . . . . . . . . 582
13.3.5 Control Bits . . . . . . . . . . . . . . . . . . . . . . . 582
13.4 Virtual Memory . . . . . . . . . . . . . . . . . . . . . . . . . 583
13.4.1 Page Tables . . . . . . . . . . . . . . . . . . . . . . . 584
13.4.1.1 Flat page table . . . . . . . . . . . . . . . . 584
13.4.1.2 Hierarchical page table . . . . . . . . . . . 586
13.4.2 Replacement Policy . . . . . . . . . . . . . . . . . . . 587
13.4.3 Write Policy . . . . . . . . . . . . . . . . . . . . . . . 588
13.4.4 Control Bits . . . . . . . . . . . . . . . . . . . . . . . 589
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13.4.5 Translation Lookaside Buffers . . . . . . . . . . . . . 589


13.4.6 Interconnection of Virtual Memory
with the Caches . . . . . . . . . . . . . . . . . . . . . 590
13.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 592
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 593

14. Inputs, Outputs and Communications 597


14.1 Input/Output Architecture . . . . . . . . . . . . . . . . . . . 598
14.1.1 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . 599
14.1.2 Port Addressing Types . . . . . . . . . . . . . . . . . 601
14.2 Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 604
14.2.1 Keyboards . . . . . . . . . . . . . . . . . . . . . . . . 604
14.2.2 Monitors . . . . . . . . . . . . . . . . . . . . . . . . . 606
14.2.3 Magnetic Disks and Solid-state Drives . . . . . . . . 609
14.3 Parallel Communication . . . . . . . . . . . . . . . . . . . . . 612
14.3.1 Interfaces without Synchronisation . . . . . . . . . . 613
14.3.2 Data Strobing and Handshaking . . . . . . . . . . . 614
14.3.2.1 Strobe synchronisation . . . . . . . . . . . 614
14.3.2.2 Handshake protocols . . . . . . . . . . . . 617
14.3.3 Synchronous Interfaces . . . . . . . . . . . . . . . . . 620
14.4 Serial Communications . . . . . . . . . . . . . . . . . . . . . 621
14.4.1 Asynchronous Communication . . . . . . . . . . . . 623
14.4.2 Synchronous Communication . . . . . . . . . . . . . 626
14.4.2.1 Character oriented protocols . . . . . . . . 628
14.4.2.2 Bit-oriented protocols . . . . . . . . . . . . 628
14.5 Interruption System . . . . . . . . . . . . . . . . . . . . . . . 629
14.5.1 Interrupts Operation . . . . . . . . . . . . . . . . . . 630
14.5.2 Independent Interrupt Lines . . . . . . . . . . . . . . 631
14.5.3 Shared Interrupt Line . . . . . . . . . . . . . . . . . 632
14.5.3.1 Non-vectored interrupts . . . . . . . . . . . 633
14.5.3.2 Vectored interrupts . . . . . . . . . . . . . 634
14.6 Data Transfer Modes . . . . . . . . . . . . . . . . . . . . . . 637
14.6.1 Program Controlled Transfer . . . . . . . . . . . . . 638
14.6.2 Interrupt Controlled Transfer . . . . . . . . . . . . . 639
14.6.3 Direct Memory Access . . . . . . . . . . . . . . . . . 641
14.6.3.1 DMA architecture . . . . . . . . . . . . . . 642
14.6.3.2 The DMA controller . . . . . . . . . . . . . 643
14.6.3.3 Types of DMA . . . . . . . . . . . . . . . . 645
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xxii Contents

14.6.4 Transfer Using an Input/Output Processor . . . . . 645


14.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 649
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 649

15. Advanced Computer Architecture Topics 655


15.1 Microprocessor Performance . . . . . . . . . . . . . . . . . . 656
15.1.1 Limiting Performance Factors . . . . . . . . . . . . 657
15.1.2 CISC and RISC Computers . . . . . . . . . . . . . . 659
15.2 The P4 Processor . . . . . . . . . . . . . . . . . . . . . . . . 663
15.2.1 Addressing Modes . . . . . . . . . . . . . . . . . . . 663
15.2.2 P4 Processor Instruction Set . . . . . . . . . . . . . 664
15.2.2.1 Arithmetic and logic instructions . . . . . 665
15.2.2.2 Shift instructions . . . . . . . . . . . . . . 667
15.2.2.3 Control instructions . . . . . . . . . . . . 668
15.2.2.4 Data transfer instructions . . . . . . . . . . 670
15.2.2.5 Other instructions . . . . . . . . . . . . . . 671
15.3 The P4 Processor Pipeline . . . . . . . . . . . . . . . . . . . 672
15.3.1 Stages in the P4 Processor Pipeline . . . . . . . . . . 672
15.3.1.1 Instruction fetch . . . . . . . . . . . . . . . 672
15.3.1.2 Decoding of the operation code and
operand fetch . . . . . . . . . . . . . . . . 673
15.3.1.3 Instruction execution . . . . . . . . . . . . 674
15.3.1.4 Write-back . . . . . . . . . . . . . . . . . . 675
15.3.2 P4 Processor Complete Pipeline . . . . . . . . . . . 676
15.3.3 Structural Conflicts . . . . . . . . . . . . . . . . . . 678
15.3.4 Data Conflicts . . . . . . . . . . . . . . . . . . . . . 679
15.3.5 Control Conflicts . . . . . . . . . . . . . . . . . . . . 682
15.4 Performance Comparison between P3 and P4 . . . . . . . . 687
15.5 Advanced Techniques for Exploiting Parallelism . . . . . . . 689
15.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 693
Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 693

Appendix A The P3 Processor 699


A.1 P3 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . 699
A.1.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . 699
A.1.2 Status Bits . . . . . . . . . . . . . . . . . . . . . . . 699
A.1.3 Memory . . . . . . . . . . . . . . . . . . . . . . . . . 700
A.1.4 Inputs/Outputs . . . . . . . . . . . . . . . . . . . . . 700
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Contents xxiii

A.1.5 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . 701


A.1.6 Instruction Set . . . . . . . . . . . . . . . . . . . . . 701
A.1.7 Addressing Modes . . . . . . . . . . . . . . . . . . . 702
A.2 P3 Implementation . . . . . . . . . . . . . . . . . . . . . . . 704
A.2.1 Assembler . . . . . . . . . . . . . . . . . . . . . . . . 704
A.2.2 Peripherals . . . . . . . . . . . . . . . . . . . . . . . 704
A.2.2.1 Interrupt buttons . . . . . . . . . . . . . . 705
A.2.2.2 Input and output devices . . . . . . . . . . 705
A.2.3 P3 Card . . . . . . . . . . . . . . . . . . . . . . . . . 707
A.2.4 Simulator . . . . . . . . . . . . . . . . . . . . . . . . 710

Index 713
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Chapter 1

Digital Representation of Information

This chapter is focused on the ways computers represent information in


digital format. In particular, it discusses the mechanisms used to represent
various quantities in a digital computer. The digital electronic circuits that
are commonly used in a digital computer can assume only one of two pos-
sible values, which implies that different quantities have to be represented
in a format compatible with this restriction.
We will start by describing how integers are represented, both in the
decimal number system, which is familiar to everybody and in other number
systems more adequated to be manipulated by computers. In this chapter,
this study is limited to non-negative integers and non-negative fractional
numbers.
The chapter begins with Section 1.1, where we study binary, octal and
hexadecimal number systems. Section 1.2 focuses on studying the founda-
tions of binary arithmetic. Section 1.3 deals with the use of codes, both
numeric (with emphasis on decimal codes) as well as alphanumeric (to rep-
resent other types of information). Section 1.4 concludes the chapter with
some basic concepts on the organisation of binary representation of infor-
mation.

1.1 Number Systems

This chapter deals with the representation of non-signed integer and frac-
tional numbers. Later, in Chapter 5, this subject will be reconsidered to
address the representation of signed integer and real numbers. The represen-
tation of numbers in digital systems has to be undertaken considering that
they use devices which can represent only two possible values.
Given that the common representation of numbers is based on the util-
isation of a decimal number system, using base-10, it is natural to consider
that the representation of numbers in digital systems may be made using
the binary system, using base-2. The base is the number of digits used to
represent a number under a given number system.

1
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2 Computer Architecture: Digital Circuits to Microprocessors

The general case of representation using a generic base-b will be studied


first, followed by the study of the base-2 case.

1.1.1 Representation of Integers in Base-b


The representation of a non-signed integer in base-10 is made using a
sequence of digits. The number 435, for example, is represented by the
sequence of digits 4, 3 and 5. The interpretation of the representation of
a number results, firstly, from the digits used and, secondly, from their posi-
tion within the sequence. As is evident, 435 = 354, even though the digits
used are the same.
The position of the digits indicates the weight for each digit. In the previ-
ous example, because the digit 4 is in the third position from the right, this
means, in fact, four hundreds. The digit 3 represents three tens, and 5 represents
five units. This system of representation of numbers is referred as positional.
This analysis can be stated more formally as follows:
435 = 400 + 30 + 5
= 4 × 100 + 3 × 10 + 5 (1.1)
or, expressing the powers of 10 involved,
435 = 4 × 102 + 3 × 101 + 5 × 100 (1.2)
which is a more general way of representation, emphasising the powers of
the base.
The number 435 is said to be represented in base-10 since it results from
the sum of consecutive powers of 10, each multiplied by the value of the
corresponding digit as shown in Equation (1.2). To explicitly indicate that
the number is represented in base-10, the following notation is used: 43510 . To
represent a number in base-10, the weights of each power of 10 are indicated
using digits from 0 to 9, using a total of 10 distinct digits.
There is nothing to prevent the use of another base to represent a num-
ber. Consider, for example, the sequence of digits 1161 in base-7, which is
usually indicated by 11617 . In this case, this representation has the following
meaning:
11617 = 1 × 73 + 1 × 72 + 6 × 71 + 1 × 70
= 1 × 343 + 1 × 49 + 6 × 7 + 1
= 43510 . (1.3)
Therefore, 11617 is another way of representing the number 43510 .
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Digital Representation of Information 3

Generally speaking, any integer N can be represented in any base-b with


b≥2

N = pn−1 × bn−1 + pn−2 × bn−2 + · · · + p1 × b1 + p0 × b0 (1.4)

or
n−1

N= pj × bj , (1.5)
j=0

where pj is the digit which represents the weight of the jth power of the
base. The number of digits necessary is b and it is usual that the digits are
the integers between 0 and b − 1

pj ∈ {0, 1, . . . , b − 1}. (1.6)

Thus, to represent numbers in base-b, digits of a value equal to or greater


than b cannot be used. For example, the representation of a number in base-7
cannot use the digit 7 nor any other digit greater than 7. The sequence of
digits 17427 is therefore not a valid representation of a number.
The conversion of the representation of a number in base-b to a repre-
sentation in base-10 is not difficult, as illustrated by Equation (1.3). The
reverse, converting a number represented in base-10 to its representation in
base-b requires a little more work, but it is also simple. One of the most
common methods is the method of successive divisions. As an example, con-
sider a number N represented in base-b, as shown in Equation (1.4). If the
number is divided by b, this results in

N p0 × b0
= (pn−1 × bn−2 + pn−2 × bn−3 + · · · + p1 × b0 ) +
b b
p 0
= (pn−1 × bn−2 + pn−2 × bn−3 + · · · + p1 × b0 ) + , (1.7)
b
where p0 is the rest of the division of N by b (remember that p0 < b). In
this way, the digit p0 can be identified.
Repeating the previous procedure for the number Nb will enable us to
derive p1 and through the successive application of the procedure, all the
digits that represent the number.
As an example, consider obtaining the representation of the number 27310
in base-5
273 3
= 54 + . (1.8)
5 5
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4 Computer Architecture: Digital Circuits to Microprocessors

In the same way, the following can be obtained:


54 4
= 10 + ,
5 5
10 0
=2+ , (1.9)
5 5
2 2
=0+ .
5 5
From Equations (1.8) and (1.9) it is easy to obtain p0 = 3, p1 = 4, p2 = 0 e
p3 = 2. From which,

27310 = 20435 . (1.10)

1.1.2 Representation of Non-signed Integers in Base-2

The representation of numbers in base-2 is important because, in computers


and other digital systems, the representation of numbers has to be based on
a set of two different values for some physical quantity. In digital comput-
ers, that physical quantity is usually the voltage between two points of an
electronic circuit.
To represent an integer in base-2, two digits are required, usually desig-
nated by 0 and 1. Just as with other bases, an integer is, therefore, repre-
sented by a sequence of digits, in this case, binary digits or bits. Table 1.1
shows the integers from 0 to 15 represented in base-2.
For example, 1101012 is a number represented in base-2 or, as it is also
said, represented in binary.
The previous section presented a method to take a number in binary (or
in any other base) and obtain the representation of the same number in
base-10, the base we normally use.

Table 1.1 Representation of integers from 0 to 15 in base-2.


Base-10 Base-2 Base-10 Base-2
0 0 8 1000
1 1 9 1001
2 10 10 1010
3 11 11 1011
4 100 12 1100
5 101 13 1101
6 110 14 1110
7 111 15 1111
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Digital Representation of Information 5

The technique used consisted in expressing the representation of the num-


ber in terms of weighted sums of the powers of the base and calculating the
value of the number in base-10. This is a general technique, which can there-
fore also be applied for numbers represented in base-2. In the case of the
number 1101012 mentioned above, given that this is a 6 digit number, then

1101012 = 1 × 25 + 1 × 24 + 0 × 23 + 1 × 22 + 0 × 21 + 1 × 20
= 32 + 16 + 4 + 1
= 5310 . (1.11)

The inverse problem, the determination of the representation of a number


in base-2 (or in any other base-b), given its representation in base-10 was
also dealt with, by presenting the method of successive divisions. Now, using
the number 2310 as an example, note that this number can be rewritten as

23 = 11 × 2 + 1, (1.12)

which makes explicit the quotient and the remainder of the division of the
number by 2.
Now, the number 11 can be represented as 11 = 5 × 2 + 1, so that sub-
stituting this in Equation (1.12), the following is obtained:

23 = (5 × 2 + 1) × 2 + 1
= 5 × 22 + 1 × 2 + 1. (1.13)

Now, given that 5 = 2 × 2 + 1, it is the case that

23 = (2 × 2 + 1) × 22 + 1 × 2 + 1
= 2 × 23 + 1 × 22 + 1 × 2 + 1. (1.14)

And, as 2 = 1 × 2 + 0,

23 = (1 × 2 + 0) × 23 + 1 × 22 + 1 × 2 + 1
= 1 × 24 + 0 × 23 + 1 × 22 + 1 × 2 + 1. (1.15)

Finally, writing out all the powers of 2, we obtain

23 = 1 × 24 + 0 × 23 + 1 × 22 + 1 × 21 + 1 × 20 . (1.16)

It is now easy to see that the representation of number 2310 in base-2 is


101112 .
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6 Computer Architecture: Digital Circuits to Microprocessors

The binary digits of the number are, as seen above, the successive remain-
ders of the division by 2 of the initial number and the successive quotients.
The most common (and fastest) way of carrying out the calculation, however,
is the successive application of the usual algorithm for performing division
and collecting the various remainders at the end.

2 23 Remainders

2 11 1 Least significant bit

2 5 1
2 2 1
2 1 0
0 1 Most significant bit

The digit with the greatest weight corresponds to the remainder of the
last division and so on until the digit with the least weight, which is the
remainder of the first division.

1.1.3 Representation of Fractional Numbers in Base-2

The representation of fractional numbers in base-2 (or any other), does not
present any problems, using the same method used for integers. A fractional
number may have an integer part and a decimal part, that is, with a value
less than 1. That decimal part, with n digits, is representable by the following
expression:

N = p−1 × b−1 + p−2 × b−2 + · · · + p−n × b−n , (1.17)

or
−n

N= pi × bi . (1.18)
i=−1

Consider the number 0.10110102 as an example. The representation, as


in the case of integer numbers, gives a direct method to convert the binary
fractional number to decimal

0.10110102 = 1 × 2−1 + 1 × 2−3 + 1 × 2−4 + 1 × 2−6


= 0.5 + 0.125 + 0.0625 + 0.015625
= 0.70312510 . (1.19)
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Digital Representation of Information 7

The conversion of a fractional number between base-b and base-10 is


made, therefore, using the same algorithm used for integers, taking care not
add more accuracy than was present in the original number through the con-
version process, since this would have no meaning. Note that any non-integer
number can have an infinitely long representation in a different base.
In fact, the number 0.10110102 is represented by 7 binary digits after
the decimal point. This means that it is represented with a precision of
1 in 27 since, with these 7 digits, it is possible to represent 27 different
numbers. The number obtained through base conversion represents the same
measurable quantity and, thus, the number of digits must be such that the
accuracy does not exceed the original representation. We will, therefore, have
to choose a number p of digits, such that p is the largest integer verifying the
equation

10p ≤ 27 (1.20)

and, therefore,

p = log10 27 . (1.21)

From Expression (1.21),1 it can be seen that p = 2. Therefore, the cor-


rect representation in base-10 of the number 0.10110102 is 0.7010 , which is
obtained by rounding the result of Expression (1.19).
The inverse problem of converting a fractional number represented in
base-10 to any base, particularly base-2, uses, just as in the case of integers,
a more sophisticated algorithm. The procedure used is shown below, using as
an example the number 0.62710 . This number, when represented in base-2,
will be

0.62710 = 0.p−1 p−2 p−3 p−4 . . . p−n 2 . (1.22)

The objective is to obtain the value of the digits p−1 , p−2 , p−3 , p−4 . . . p−n .
Multiplying both sides of Equation (1.22) by 2 gives

1.25410 = p−1 .p−2 p−3 p−4 . . . p−n 2 . (1.23)

In fact, multiplying by 2 in base-2 results in moving all the digits one


position to the left, like the multiplication by 10 in base-10. Analysing

1
The function x (floor) returns, for the real number x, the largest integer less or
equal to x.
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8 Computer Architecture: Digital Circuits to Microprocessors

Equation (1.23) and noting that the integer parts of the two sides of the
equation must be the same, as must the fractional parts, we obtain

p−1 = 1 (1.24)

and

0.25410 = 0.p−2 p−3 p−4 . . . p−n 2 . (1.25)


Equation (1.24) allows the identification of the digit p−1 . For the second
digit, p−2 , the same algorithm is now applied to the resulting fractional num-
ber, represented in Expression (1.25). The successive use of multiplication by
2 gives the sequence of digits for the fractional part. It is clear that, just as
in the inverse conversion, we should use the maximum number of digits, in
the new base which does not increase the accuracy of the number compared
to its original representation. In the above example, to not exceed the initial
accuracy (1 in 103 ), 9 digits will be used to represent this in base-2 (29 = 512
and 210 = 1 024). Completing the example

0.62710 = 0.1010000012 . (1.26)

When the aim is to convert the representation of numbers with an integer


and a fractional part between two bases, the conversion of the integer part
and the fractional part is performed using the respective algorithms and the
results added together at the end.

1.1.4 Representation of Numbers in Bases Powers of 2


The representation of numbers in base-2 is the one used by digital systems
to represent numbers internally, but it has the major disadvantage of using
relatively long sequences of digits. For example, 153.84510 is represented in
base-2 by 10011001.1101100012 . These representations become difficult to
remember and manipulate. Representation in base-10 does not have these
drawbacks, but it cannot be used as the internal representation in digital
systems. The solution to this dilemma is the use of condensed forms of
binary representation, which become possible by representing numbers in
bases which are a power of 2, that is, 4, 8, 16, . . . Base-8 is commonly used or,
even more frequently, base-16. As will be seen, these representations provide
an abbreviated and readily convertible representation of binary numbers
with many digits.
Base-8 uses digits from 0 to 7, and the conversion of numbers
between base-8 and base-10, naturally, uses the procedures described above.
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Digital Representation of Information 9

A number represented in base-8 is also said to be represented in octal. The


representation of numbers in base-16, or in hexadecimal, as this type of rep-
resentation is commonly designated, is similar to any other base, but it is
necessary to take into account that there are 16 digits, from 0 to 15. For the
digits which represent 10, 11, 12, 13, 14 and 15, uppercase letters A to F are
normally used. The 16 digits are listed in Table 1.2.
The number 4A6F16 is therefore represented in decimal as follows:

4A6F16 = 4 × 163 + 10 × 162 + 6 × 16 + 15


= 4 × 4096 + 10 × 256 + 6 × 16 + 15
= 19 05510 . (1.27)

Similarly, in base-8 the number 36058 is

36058 = 3 × 83 + 6 × 82 + 5
= 3 × 512 + 6 × 64 + 5
= 1 92510 . (1.28)

Conversion between bases in which one is a power of the other is carried


out in an extremely easy way. Consider, in some detail, the conversion of the
number 1011011101012 to base-16. The first step is to represent the number,
expressing it in terms of the powers of the base, similarly to what was carried
out before

1011011101012 = 1 × 211 + 0 × 210 + 1 × 29 + 1 × 28 + 0 × 27


+ 1 × 26 + 1 × 25 + 1 × 24 + 0 × 23 + 1 × 22
+ 0 × 21 + 1 × 20 . (1.29)

Table 1.2 Digits in base-16.


Value Digit Value Digit
0 0 8 8
1 1 9 9
2 2 10 A
3 3 11 B
4 4 12 C
5 5 13 D
6 6 14 E
7 7 15 F
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10 Computer Architecture: Digital Circuits to Microprocessors

Then, the terms are put into groups of 4 starting from the least significant

1011011101012 = (1 × 211 + 0 × 210 + 1 × 29 + 1 × 28 )


+ (0 × 27 + 1 × 26 + 1 × 25 + 1 × 24 )
+ (0 × 23 + 1 × 22 + 0 × 21 + 1 × 20 ). (1.30)

In each group, we factor out the powers of 2 necessary to have each


group represented in terms of the weighted sum of the powers of order 0, 1, 2
and 3.

1011011101012 = (1 × 23 + 0 × 22 + 1 × 21 + 1 × 20 ) × 28
+ (0 × 23 + 1 × 22 + 1 × 21 + 1 × 20 ) × 24
+ (0 × 23 + 1 × 22 + 0 × 21 + 1 × 20 ) × 20 . (1.31)

However, 28 = 162 , 24 = 161 and 20 = 160 are powers of 16. This can,
therefore, be written,

1011011101012 = 11 × 162 + 7 × 161 + 5 × 160 (1.32)

and so, it is now easy to conclude that

1011011101012 = B7516 . (1.33)

Note that each digit in base-16 was defined by the 4 binary digits which
were initially grouped. So, if the equivalence between the digits of base-16
and its correspondence to a binary four-digit number is known, it is possible
to directly determine the number in base-16 from the number in base-2. This
correspondence can be easily obtained and is shown in Table 1.3.

Table 1.3 Correspondence between digits of base-16 and their repre-


sentation in binary using 4 digits.
Binary Digit Binary Digit
0000 0 1000 8
0001 1 1001 9
0010 2 1010 A
0011 3 1011 B
0100 4 1100 C
0101 5 1101 D
0110 6 1110 E
0111 7 1111 F
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Digital Representation of Information 11

If the groups of four binary digits are isolated in the number


1011 0111 01012 , it can, therefore, be directly converted to base-16
1011 ⇔ B
0111 ⇔ 7
0101 ⇔ 5,
obtaining the number B7516 . It should be noted that the four-digit groups
are formed from the least significant digit, i.e., from the right. This is a
consequence of the way the algorithm was defined.
For a binary number with a number of bits that is not a multiple of
4, the method is applied in the same way. Take the number 11010110112 .
Separating the digits into groups of 4 from the least significant gives

11010110112 = 11 0101 10112


= 3 5 B16
= 35B16 . (1.34)

For another base which is a power of 2, such as base-8, the method is


similar, with a variation only in the number of digits to be grouped together.
For base-8, the digits are grouped into groups of 3 (23 = 8). As an example

100101101010012 = 10 010 110 101 0012


= 2 2 6 5 18
= 226518 . (1.35)

In the same way, going from a base which is a power of 2 to base-2 is


carried out using the inverse process

7DA3F16 = 7 D A 3 F16
= 0111 1101 1010 0011 11112
= 011111011010001111112 . (1.36)

A similar example may be considered for base-8

34618 = 3 4 6 18
= 011 100 110 0012
= 111001100012 . (1.37)

An alternative way, which is often used, of signalling that a number


is represented in base-16 consists in ending the number with the letter h.
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12 Computer Architecture: Digital Circuits to Microprocessors

Therefore, writing 487116 is the same as writing 4871h, for example. In the
same way, it is usual to use the letters b, o and d to indicate that the num-
ber is represented in binary, octal or decimal, respectively. For example,
11101012 may be represented by 1110101b. This form of representation will,
from now on, be the preferred way when it is necessary to indicate the base
in which a number is represented.
Representing numbers in bases which are powers of 2, particularly base-8
and base-16, thus offers a compact representation of binary numbers with
many digits. In addition, as has been seen, there is a very simple way of
converting numbers between base-2 and those bases, which is practically
independent in complexity, of the number of digits of the representation of
the numbers. Finally, this allows for partial conversions of sections of the
number which may be of interest. It is easy to discover, for example, the
least or most significant binary digits of a number represented in these bases
without the need for its complete conversion. For example, in the number
A23Bh, it is easy to see that the five most significant binary digits are 10100.
The conversion of numbers with a fractional part between base-2 and
bases that are powers of 2 is carried out in the same manner, taking care to
group the binary digits starting at the decimal point. Take, for example, the
number 1001010.101100111111b

1001010.101100111111b = 100 1010 . 1011 0011 1111b


= 4 A . B 3 Fh
= 4A.B3Fh. (1.38)

In the same way, the conversion from a base which is a power of 2 to base-2
does not present any difficulty for numbers with a fractional part

5271.3527o = 5 2 7 1 . 3 5 2 7o
= 101 010 111 001 . 011 101 010 111b
= 101010111001.011101010111b. (1.39)

1.2 Arithmetic Operations in Base-2, Base-8 and Base-16

This section briefly deals with simple arithmetic operations in base-2, base-
8 and base-16. The scope is limited to the sums and products of positive
integers. The study of arithmetic involving negative integers will be dealt
with later, in Chapter 5, where subtraction will also be considered.
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Digital Representation of Information 13

Table 1.4 Table of addition in base-2.


Y
X +Y
0 1
0 0 1
X
1 1 10

1.2.1 Sums in Base-2

The sum in base-2, as with any other base, is not fundamentally different
from a sum in base-10. The procedure adopted is based on the existence of a
table of addition and a method of adding numbers digit by digit. The sum is
carried out by adding, for each digit starting with the least significant digit,
the digits of the numbers to be added to the carry of the previous digit. The
sum should also create the carry to the next digit. The table of addition in
base-2 (Table 1.4) is particularly simple.
It should be noted that, in the sum 1+1, the result cannot be represented
by a single digit, and it is necessary to use two digits. This means that, in
the sum algorithm, there will be in this case a carry of 1. In the other cases
of the table, the carry is always 0.
As an example, take the sum of 100011112 and 10110102 . In the least
significant digits, in the rightmost column, the sum does not have to con-
sider the carry from the previous column. The sum of 1 and 0, according to
Table 1.4, is 1, and the carry, 0 (Figure 1.1(a)).
In the second column, the sum of 1 and 1 is 10 (that is, 210 ). As the carry
from the previous column is 0, the sum does not change. However, since 10
is a two-digit number, in this column, the result of the sum is 0, and the
carry is 1 (Figure 1.1(b)).
In the next column, adding 1 and 0 gives 1. As the carry is 1, it is also
necessary to add this 1, which gives 10. Therefore, the sum is 0, and the
carry is 1 (Figure 1.1(c)).

10001111 10001111 10001111


+1011010 +1011010 +1011010
1 01 001
0 carry 10 carry 110 carry

(a) (b) (c)

Fig. 1.1 Process for executing a sum.


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14 Computer Architecture: Digital Circuits to Microprocessors

10001111 10001111
+1011010 +1011010
1001 11101001
1110 carry 00011110 carry

(a) (b)

Fig. 1.2 Process for executing a sum (continuation of Figure 1.1).

Table 1.5 Multiplication table in base-2.


Y
X ×Y
0 1
0 0 0
X
1 0 1

In the fourth column from the right, there is the sum of 1 and 1, which
gives 10, and also a carry of 1, which gives 11. In this case, the sum is 1, and
the carry is also 1 (Figure 1.2(a)).
Continuing this reasoning, the final result is shown in Figure 1.2(b).
It is, of course, possible to sum more than two numbers The only aspect
to be taken into consideration is that the carry may not be just one digit.
Take the sum of the 4 numbers given below.
In the first column, the sum is 1002 . Here, the sum is, of course, 0, and
the carry, 10. Taking this aspect into consideration, the final result will be:
10011101
101011
11001
+ 1011011
100111100
In digital systems, sums are normally made between two numbers, with
the sums of more than two numbers made by successive sums of the various
terms to be summed.

1.2.2 Multiplications in Base-2

Just as with addition, multiplication in base-2 follows the same methods for
multiplication in base-10. The multiplication table is shown in Table 1.5.
Each digit of the multiplier is multiplied by the multiplicand to generate
a partial product. The sum of all the partial products is the product of the
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Digital Representation of Information 15

two numbers. In fact, the product M × N may be expressed by representing


the multiplier N as the sum of the powers of the base weighed by the corre-
spondent digits (the same can be done for any base) using Equation (1.40).

M × N = M × (pn−1 × 2n−1 + pn−2 × 2n−2 + · · · + p1 × 21 + p0 × 20 )


= M × pn−1 × 2n−1 + M × pn−2 × 2n−2 + · · · + M × p1 × 21
+ M × p0 × 20 . (1.40)

For example, when multiplying M = 10001111b by N = 1010b, the


product is obtained by adding the four partial products
10001111 × 1000
10001111 × 0
10001111 × 10
10001111 × 0,
corresponding to the four digits of the multiplier.
In the usual algorithm, it is, therefore, essential to place the various par-
tial products aligned with the respective digit of the multiplier.
10001111
× 1010
00000000 (= 10001111 × 0)
10001111 (= 10001111 × 10)
00000000 (= 10001111 × 0)
10001111 (= 10001111 × 1000).
10110010110
Naturally, just as in the case of multiplication in base-10, the results of
the product of the multiplicand by digits of the multiplier that are 0 can be
omitted
10001111
× 1010
10001111
10001111 .
10110010110
It should be noted that, in base-2, there are only two hypotheses for the
partial products: either the multiplier digit is 0, and the partial product is
0, or that digit is 1, and the partial product is equal to the multiplicand
with the displacement corresponding to the weighting of the digit. It will be
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16 Computer Architecture: Digital Circuits to Microprocessors

seen later that this characteristic is important when digital systems carry
out this operation.

1.2.3 Arithmetic Operations in Other Bases


Performing arithmetic operations between numbers represented on other
bases do not raise any problems besides knowing the tables of operations
for those bases. Using as an example the sum in base-16, the table of sums
can be constructed (Table 1.6).
This table can be constructed in various ways. One possibility is to con-
sider the value of the digits for each sum, sum them in decimal and transfer
the result to hexadecimal. As an example, the sum 5h + Dh, is the sum of
5d and 13d (the decimal value of digit Dh). The result of this sum is 18d or,
in hexadecimal, 12h, which is the value to be placed in the table.
As an example, take the sum of 1F3A5h and A542h:
1F3A5
+A5 4 2
29 8E7
01 0 0 0 carry.

Multiplication is also easy to carry out. This will be shown using the
multiplication table in base-8 (Table 1.7) and the product of two numbers in
that base.

Table 1.6 Table of the sum in base-16.


Y
X +Y
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 0 1 2 3 4 5 6 7 8 9 A B C D E F
1 1 2 3 4 5 6 7 8 9 A B C D E F 10
2 2 3 4 5 6 7 8 9 A B C D E F 10 11
3 3 4 5 6 7 8 9 A B C D E F 10 11 12
4 4 5 6 7 8 9 A B C D E F 10 11 12 13
5 5 6 7 8 9 A B C D E F 10 11 12 13 14
6 6 7 8 9 A B C D E F 10 11 12 13 14 15
7 7 8 9 A B C D E F 10 11 12 13 14 15 16
X
8 8 9 A B C D E F 10 11 12 13 14 15 16 17
9 9 A B C D E F 10 11 12 13 14 15 16 17 18
A A B C D E F 10 11 12 13 14 15 16 17 18 19
B B C D E F 10 11 12 13 14 15 16 17 18 19 1A
C C D E F 10 11 12 13 14 15 16 17 18 19 1A 1B
D D E F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C
E E F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D
F F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E
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Digital Representation of Information 17

Table 1.7 Table of multiplication in base-8.


Y
X ×Y
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0 0
1 0 1 2 3 4 5 6 7
2 0 2 4 6 10 12 14 16
3 0 3 6 11 14 17 22 25
X
4 0 4 10 14 20 24 30 34
5 0 5 12 17 24 31 36 43
6 0 6 14 22 30 36 44 52
7 0 7 16 25 34 43 52 61

The product of 1537o and 314o is


1537
× 314
6574
1537
5035
.
527664
The multiplication operation in base-b, although not conceptually different
from the operation in base-10, requires a good knowledge of the respective mul-
tiplication table, which, in general, is unavailable. In these circumstances, it is
clear that carrying out multiplications directly in these bases is a difficult task
and is not frequent. The sum, however, is very useful, as will be seen later, in the
context of computer architecture and programming.

1.3 Codes

Representation in base-2 allows for the representation of numbers in digital


systems. However, not all information is numeric. There are many other types
of data that need to be stored and processed. Text is an obvious example,
but it is far from being the only one. This section will analyse the methods
to represent information using codes. Particular emphasis will be given to
binary codes, BCD and alphanumeric codes. The representation of other
types of information is outside the scope of this book.

1.3.1 Coding
The representation of information in digital systems is based on the fact that
systems of this type are supported in quantities that can only assume two
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18 Computer Architecture: Digital Circuits to Microprocessors

values: 0 and 1. As is the case with binary digits, an entity which can take
on two values is called a bit. If there is an entity which generates information
and that information is created in sequences of symbols with several possible
values, the solution for the representation of those values in a digital system
is to encode them. This means that each possible value is made to correspond
to a specified combination of bits which then represent that value. Take as an
example an elevator in a building with six floors: two basements, the ground
floor and another three floors. If the goal is to register the floor where the
elevator is in a digital system, or where it is heading if moving, there is
the need to codify that information, i.e., make each floor correspond to a
particular bit pattern. The number of bits to be used will be at least those
necessary to produce six combinations. Three bits are enough for that code.
A coding example is shown in Table 1.8.
The correspondence between the entities to be represented and their cod-
ing is called code. In this way, the previous table sets out a code. Each of the
configurations is referred as a code word. If the number of bits for the code
words is equal for all configurations, it is known as the code length. This code
is, therefore, a code of length 3. Obviously, this is not the only possible code
for this application. Table 1.9 shows another possibility.
The only restriction for a valid code is that it does not have repeated
encodings, which means that two different entities may not be encoded with
the same code word.

Table 1.8 Sample code.


Floor Coding
2nd basement 000
1st basement 001
Ground floor 010
1st floor 011
2nd floor 100
3rd floor 101

Table 1.9 Alternative sample code.


Floor Coding
2nd basement 110
1st basement 111
Main floor 000
1st floor 001
2nd floor 010
3rd floor 011
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Digital Representation of Information 19

Table 1.10 Sample code with restrictions.


Floor Coding
2nd basement 0011
1st basement 0101
Main floor 1001
1st floor 0110
2nd floor 1010
3rd floor 1100

Either of this codings is acceptable. The two codes shown have no feature
which significantly distinguishes them from one another. However, codes can
be designed with some particular characteristics. For example, using words
of 4 bits to represent the various floors, it is possible to design a code that
represents each floor as a sequence of 2 bits with the value 0 and 2 bits with
value 1, as shown in Table 1.10.
A possible use for codes of this type is to detect errors which could happen
in the coding process or as a consequence of a malfunction of a system. If
at any given time, the system has registered that the elevator is on a floor
represented by the word 0010, it is immediately clear there was an error,
since the word 0010 does not belong to the code.

1.3.2 Numeric Codes


Although numbers are generally stored and processed using their representa-
tion in base-2 (and, in a way, this also corresponds to a code), it is often nec-
essary to use codes to represent numbers, particularly integers. These codes
are known as numeric codes. The easiest way to represent integers by a code
is to have each number represented by a code word which is its binary repre-
sentation. Table 1.11 shows a code of this type with words of constant length.
It should be noted that all the code words have the same length. For
example, the number 3 is represented by 00011 and not by 11, which would
be its normal representation in base-2. This type of code in which each
number is coded by its representation in base-2 with a fixed number of bits,
is known as natural binary code. Obviously, there are natural binary codes
for any number of bits.
A very common situation of a different kind is the need to encode decimal
digits. It is sometimes convenient to represent a number not by its natural
binary code, but rather by the binary coding of each of its digits in base-10.
An obvious situation is that of the display of a calculator which represents
a number in decimal for easy reading by the user, but which, internally, is
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20 Computer Architecture: Digital Circuits to Microprocessors

Table 1.11 Natural binary code with 5 bits.


Number Coding Number Coding
0 00000 16 10000
1 00001 17 10001
2 00010 18 10010
3 00011 19 10011
4 00100 20 10100
5 00101 21 10101
6 00110 22 10110
7 00111 23 10111
8 01000 24 11000
9 01001 25 11001
10 01010 26 11010
11 01011 27 11011
12 01100 28 11100
13 01101 29 11101
14 01110 30 11110
15 01111 31 11111

Table 1.12 BCD code.


Digit Coding
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

represented in binary. The classic solution is to represent each decimal digit


of the number using its binary representation and a fixed length, as shown
in Table 1.12.
This code is called BCD code. BCD stands for Binary Coded Decimal. It
should be noted that the BCD code for each digit has the same representation
as the natural binary code representation with 4 bits. However, not all the
configurations have a meaning. The indication that a number is represented
in BCD is made by writing BCD in subscript. For example, 710 is represented
by 0111BCD in BCD.
The representation of a number in BCD code is made by representing each
decimal digit by its binary representation, as shown in the representation of
the number 2 719 in BCD

2 71910 = 0010011100011001BCD , (1.41)


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Digital Representation of Information 21

in which 0010 corresponds to the digit 210 ; 0111, to 710 ; 0001, to 110 ; and
1001, to 910 .
It should be noted that not every sequence of bits may correspond to a
coding using BCD code. For example, the sequence 10110101 is not a number
encoded in BCD, since the 4 bits on the left (1011) do not correspond to
any digit, as can be seen in Table 1.12.
In the same way, it is important to mention that a representation of
a number in BCD code is not a representation of this number in binary.
Returning to the previous example,

0010011100011001BCD = 2 71910 , (1.42)

although the same sequence of bits interpreted as a number in base-2 has


another meaning

00100111000110012 = 10 00910 , (1.43)

which, clearly, does not correspond to the same number.

1.3.3 Reflected Codes

A particularly important type of numeric codes are the reflected codes (some-
times referred to as Gray code). The fundamental characteristic of these
codes is that two words which code consecutive numbers differ in only one
bit. This feature is important, as will become clear in Chapter 2.
Table 1.13 shows a three-bit reflected code. It should be noted that with
3 bits, it is possible to encode 8 different numbers.
As can be easily seen, in this code each number is not, except in some
cases, represented by its binary representation. It is possible to verify that
between each two successive numbers only one bit of its representation is

Table 1.13 Three-bit reflected code.


Number Coding
0 000
1 001
2 011
3 010
4 110
5 111
6 101
7 100
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22 Computer Architecture: Digital Circuits to Microprocessors

Table 1.14 Construction of 4 bit reflected code. (a) Reflection and


(b) additional bit.
Number Coding
000 0 0000
001 1 0001
011 2 0011
010 3 0010
110 4 0110
111 5 0111
101 6 0101
100 7 0100
100 8 1100
101 9 1101
111 10 1111
110 11 1110
010 12 1010
011 13 1011
001 14 1001
000 15 1000

(a) (b)

altered. This is also true with the representations of 0 and 7, the two extremes
represented.
The most direct way to build an n bit reflected code is to start from a
n − 1 bit code. Start with 2n−1 configurations of the n − 1 bit code and
repeat them in an inverse manner, i.e., as if reflected in an imaginary mirror
(hence the name reflected code), as shown in Table 1.14(a).
The fourth bit of the coding is then added, making it equal to 0, in the
initial positions, and equal to 1, in the “reflected” positions, as shown in
Table 1.14(b), where the code is represented.
A suggested exercise would be to obtain the reflected codes of 2 and 3
bits, from the one-bit code. Clearly, the latter does not differ from 1 bit
natural binary code.

1.3.4 Alphanumeric Codes

One type of information that it is important to represent in digital sys-


tems is text. Therefore, it is essential to use a code to represent all the
possible characters in a text. These codes are called alphanumeric codes.
Throughout the evolution of digital systems, various codes with this pur-
pose have been utilised. The code most commonly used is the ASCII code
(American Standard Code for Information Interchange), which originated in
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Digital Representation of Information 23

Table 1.15 ASCII code.


b6 b5 b4 000 001 010 011 100 101 110 111
b3 b2 b1 b0
0000 NUL DLE SP 0 @ P ‘ p
0001 STH DC1 ! 1 A Q a q
0010 STX DC2 ” 2 B R b r
0011 ETX DC3 # 3 C S c s
0100 EOT DC4 $ 4 D T d t
0101 ENQ NAK % 5 E U e u
0110 ACK SYN & 6 F V f v
0111 BEL ETB ’ 7 G W g w
1000 BS CAN ( 8 H X h x
1001 HT EM ) 9 I Y i y
1010 LF SUB ∗ : J Z j z
1011 VT ESC + ; K [ k {
1100 FF FS , < L \ l |
1101 CR GS − = M ] m }
1110 SO RS . > N ˆ n ˜
1111 SI US / ? O o DEL

the United States, quickly became a universally accepted code. A code of


this type has to encode the 26 letters of the alphabet, both uppercase and
lowercase, the 10 digits, all punctuation signs and some special characters.
The code has words of 7 bits, the number of bits necessary to encode all the
characters. It is usual to represent the code word with the bits ordered from
1 to 7 in the following way: b6 b5 b4 b3 b2 b1 b0 . The code is shown in Table 1.15.
The character  SP is the space.
The characters in the first two columns and the  DEL in the last posi-
tion of the table are control characters. The meaning of the control characters
is mostly connected to the applications of the code in transmitting informa-
tion between devices. In many cases, these characters are not used anymore
due to the evolution of communication protocols.
The representation of a text in ASCII is done by indicating the succession
of codes of the text characters. For example, the text  Digital Systems is
encoded in ASCII as 1000100b 1101001b 1100111b 1101001b 1110100b
1100001b 1101100b 0100000b 1010011b 1111001b 1110011b 1110100b
1100101b 1101101b 1110011b .
It is more convenient to represent the ASCII code configurations in hex-
adecimal. In this case, the text above would, therefore, be codified as: 44h
69h 67h 69h 74h 61h 6Ch 20h 53h 79h 73h 74h 65h 6Dh 73h.
The ASCII sequence 44h 69h 67h 69h 74h 61h 6Ch 20h 73h 79h 73h 74h
65h 6Dh73h 20h 75h 73h 65h 20h 41h 53h 43h 49h 49h 20h 74h 6Fh 20h
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24 Computer Architecture: Digital Circuits to Microprocessors

72h 65h 70h 72h 65h 73h 65h 6Eh 74h 20h 63h 68h 61h 72h 61h 63h 74h
65h 72h 73h 2Eh codifies the following phrase:  Digital systems use ASCII
to represent characters.
Sometimes the designation of the characters in ASCII code is carried out
in decimal instead of hexadecimal. For example, the letter  A , which has
the hexadecimal code 41h, has the decimal code 65d.
ASCII code enables representing a text, but with some limitations. In
one hand, it does not allow the special characters of a specific language to
be represented, for example,  ç in Portuguese,  ø in Swedish or  ß in
German. Furthermore, it does not code accentuated characters nor can it
represent other alphabets. As such, various extensions have been developed
to represent specific characters and accentuated characters. The extension is
done by changing the code to an eight-bit code, while keeping it compatible
with the basic ASCII. Unfortunately, there are currently several mutually
incompatible codes. In all of them, however, the representation of the 00h
to 7Fh values are the same as in classic ASCII, to maintain compatibility
between these extensions and ASCII. For example, the ISO-8859-1 code,
the ISO (International Standard Organisation) standardised extension for
Western European alphabets, has the correspondence for characters coded
from 80h to FFh shown in Table 1.16.

Table 1.16 Code ISO-8859-1 (with b7 = 1).


b7 b6 b5 b4 1000 1001 1010 1011 1100 1101 1110 1111
b3 b2 b1 b0
0000 nbsp ◦ À Ð à ð
0001 ¡ ± Á Ñ á ñ
2
0010 c Â Ò â ò
3
0011 £ Ã Ó ã ó
0100 e ´ Ä Ô ä ô
0101  µ Å Õ å õ
0110 | ¶ Æ Ö œ ö
0111 § · × ÷
1000 ¨ ¸ È Ø è ø
1
1001 
c É Ù é ù
1010 Ê Ú ê ú
1011   Ë Û ë û
1
1100 ¬ /4 Ì Ü ı̀ ü
1
1101 - /2 Í Ý ı́ ý
3
1110 
R /4 Î Þ ı̂ þ
1111 ¯ ¿ Ï ß ı̈ ÿ
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Digital Representation of Information 25

The  nbsp character is a special character preventing the breaking up


of a line of text by a word processor or a browser.
The ISO-8859 standard contains other substandards which define codes
for characters for other areas or linguistic groups.
UNICODE has since appeared, which seeks to code all the characters of
every language. Each code word has 16 bits and, if necessary, uses a 20-bit
extension. Normal ASCII and the ISO-8859-1 extension shown above are
compatible with UNICODE. This code is recommended as a support for
future Internet protocols.

1.4 Units of Information

From an abstract point of view, digital information can be represented using


two values, usually designated by 0 and 1. As has already been mentioned,
an entity of this type is called a bit. As is evident, a bit — which can only
have one of two values — cannot, by itself, support the type of information
mentioned above. To represent information it is usual to arrange the bits
into larger capacity entities.
If we consider, for example, alphanumeric information represented using
the ISO-8859-1 code (Table 1.16), each character, which is the minimum
useful information unit, occupies 8 bits. Those 8 bits are a primary unit
of information, if processing text, and should be processed, transferred or
stored together. A set of 8 bits is called a byte, or octet.
A byte has this designation, independently of the meaning attributed to
the information it carries. It is immaterial whether the byte represents a
character, two digits codified in BCD, the colour of a pixel from the image
on a computer monitor, or any other type of information. The concept of a
byte is linked to the set of 8 bits interpreted as a coherent entity.
In the same way, a nibble is defined as a set of 4 bits, which is inter-
preted as a coherent unit. A BCD coded digit, for example, is represented
by a nibble. The basic unit of information in an Intel 4004, one of the first
microprocessors, which processed sets of 4 bits, was also a nibble.
Clearly, a set of two nibbles, if regarded as one unit, is a byte.
Another entity to consider at this stage is the word. A word is the smallest
unit processed or stored in a system. For example, the Intel 4004 mentioned
above is a processor with words of 4 bits. The Intel 8080 or the Motorola 6800,
which process bytes, have words of 8 bits. The Intel 8086 or the Motorola
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said eagerly; “and that you will sink the past and join us in
working heart and soul for every one’s benefit.”

The Major looked curiously at Clive, whom the excitement


of the interview seemed to be rousing from his despondent
state, but drawing himself up, the latter said quietly—

“I am sorry, of course, sir, for the innocent shareholders in


the mine, but the interim dividends that they have received
prevent them from being heavy losers. As to the
speculators, they must thank fate that their losses are not
greater.”

“Yes, yes, of course, Mr Reed, but you will soon set all that
right. Take a month at sea, sir, at the company’s expense,
and come back strong as a lion, ready to go to work again,
and make the ‘White Virgin’ richer than ever.”

“No, sir,” said Clive coldly. “I lose more heavily than any
one, and I am prepared to stand by my losses.”

“Yes, yes, but you will soon recoup—there will be no losses.


I know that you must naturally feel a jealousy of my friend,
Jessop Reed.”

Clive’s face darkened.

“But he shall not be in your way, my dear sir. You can take it
for granted that he will in future have no part in the
management. You shall stand at the head, and your
judgments shall be unquestioned.”

“I thank you, sir, for this great display of confidence,” said


Clive coldly; “but I have ceased to take any interest in the
mine—I may say in anything whatever in life. No, sir, I will
have no dealings whatever with you and your partner in the
cowardly scheme by which I was overthrown. I can only
thank you for arranging that this collapse should not occur
during my management. All right, Doctor; I have done. I
am not going to be excited, and this interview is at an end.”

“Yes, this one,” said Wrigley, rising. “You are still weak, Mr
Reed, and I will not bother you more to-day. I shall stay at
the mine, and be happy to run over on receiving a
message, for that you will come round to my wishes I am
convinced. Good morning, gentlemen, and I should advise
you both to invest heavily in the mine shares, for this
second panic has sent them down almost to zero.”

He smiled pleasantly and went out to join Jessop, who was


waiting impatiently, but with his eyes fixed upon Dinah’s
open window all the time.

“A smooth, deceitful scoundrel!” said Clive contemptuously,


and he held out a hand to the Doctor, who laid a finger upon
his pulse. “Quite calm, Doctor,” he continued. “Yes, I’m
about well now. I only want rest and peace. As soon as you
will let me, I will go right away. On the Continent, I think.”
“Yes; do you a great deal of good, my dear boy,” said the
Major. “We must have a change too. Poor Dinah is very
pale.”

Clive was silent for a few moments, and then said coldly—

“Yes, Miss Gurdon looks very white. I am most grateful to


you, Major Gurdon, for the care and attention I have
received in this house.”

“Then prove it, sir,” said the Major sternly.

“I will,” said Clive, with not a muscle moving. “I will do so


by releasing your daughter from an engagement which has
become irksome and painful to her.”

“What!”

“From any ties which held her to a kind of bankrupt—to a


man broken in health, pocket, and his belief in human
nature.”

“Mr Clive Reed,” began the Major haughtily. “No: Clive, my


dear boy, you are sick and look at things from a jaundiced
point of view. Don’t talk nonsense. You will think differently
in a week.”

“Never,” said Clive firmly. “All that, sir, is at an end.”

“And pray why?” cried the Major. “When that attachment


sprang up we believed you to be a poor man. Do you
suppose Dinah’s love for you came from the idea that you
were well-to-do?”

“We will not argue that, sir. Your daughter wishes the
engagement to be broken off.”
“Indeed! I’ll soon prove that to be false,” cried the Major,
springing up.

“No, sir,” cried the Doctor; “there has been enough for one
day.”

But he was too late, for the Major had flung open the door,
called “Dinah,” loudly, and her foot was already upon the
stairs.

“You want me, father?” she said as she entered, looking


wan and thin, but perfectly quiet and self-contained.

“Yes, my child,” cried the Major, taking her hand. “Our


patient is better, and wants to go away for a change.”

“Yes, father dear,” she said, without glancing at Clive, who


kept his eyes averted; “it would be better as soon as he can
bear a journey.”

“But he says that you wish the engagement to be at an


end.”

She bowed her head.

“Yes, dear,” she said gently, “it is better so.”

“For the present,” cried the Doctor quickly.

“For the present that lasts till death,” said Clive sternly.

And Dinah in acquiescence bowed her head without uttering


sob or sigh, but to herself—

“It is the end.”


Chapter Forty.
The Telegram.

“Go on, Doctor, say what you like. I cannot defend myself.”

“I will go on, sir; I will say what I like, and I will risk its
hurting you, for I feel towards you as a father, and it
maddens me to see my old friend Grantham’s son behaving
like a scoundrel towards as sweet and lovable a girl as ever
lived.”

Clive drew a deep breath as they walked slowly along the


shelf path towards the mine.

“Yes, sir, you may well shrink. I brought you out here for a
walk to make you wince. I can talk to you, and say what I
like out here without expecting the poor girl and her father
to come back and interrupt. Look here, Clive; I’m a
cleverish sort of old fellow in my way, and experience has
put me up to a good many wrinkles in the treatment of
disease, but I tell you frankly it was not I, but Dinah
Gurdon, who saved your life by her nursing.”

“I suppose so,” said Clive, with a sigh.

“Then why the deuce, sir, do you go on like this and break
the poor girl’s heart?”

“I cannot explain matters,” said Clive sadly. “You saw for


yourself that Miss Gurdon accepted the position.”

“Of course she did, sir; so would any girl of spirit if she
found a man playing fast and loose with her. Now look here,
Clive, my boy, surely you are not throwing her over because
you have lost all this money? Hang it, man! she would be
just as happy if you hadn’t a penny. Now, then, out with it;
was it because of the money?”

“The money! Absurd!” cried Clive, with an angry gesture.

“Then it must be due to some silly love quarrel. Look here,


Clive, my boy, for your honour and your father’s honour, I’m
going to take you back to the cottage, and when they
return this evening, you will have to show them by your
apology that if there is a scoundrel in the Reed family his
name is not Clive. What do you say to that?”

“Impossible, sir. Doctor, you do not know, and I cannot tell


you, the reasons why I act as I do.”

“You’re mad; that’s what’s the matter with you.”

“I wish your words were true, sir,” said Clive despondently,


and stretching out his hand, he rested against the rock, and
then let himself down to sit upon a rough stone. “I’m very
weak, I find,” he continued apologetically; and then he
shuddered as he noted that they were in the spot where
Dinah had turned upon him and handed him the paper
which he struck from her hand.

“Yes, my boy, you are weak, and I oughtn’t to press you;


but I cannot stand it. Come, be frank to me. What have you
done to make that poor girl throw you over?”

“I? nothing,” said Clive sternly.

“What! then you accuse her? Hang it, I won’t believe a word
of it, sir. That girl could no more do anything to justify your
conduct than an angel could out of heaven. Look here, sir, I
constitute myself her champion.—What’s that noise?”
“I don’t know. I heard it twice before. Some shepherd
calling his sheep, I suppose.”

The Doctor looked up at the bold precipitous bulwark of rock


above their heads, and then downward toward the far-
stretching vale below the shelf-like path, where a flock of
sheep dotting the bottom by the river, endorsed the
suggestion that the sound might be a call.

“Never mind that,” said the Doctor. “Come, I say that Dinah
has given you no reason for behaving as you have.”

“Doctor, I resent all this,” cried Clive angrily. “I make no


charge against Miss Gurdon, and I tell you that you have no
right to attack me as you do. A man is helpless in such a
case. Hush! No more.—Major Gurdon.”

For the old officer came round an angle of the steeply-


scarped rock above them, walking fast, and descended
agilely to where they stood.

“You here, gentlemen?” he said; “have you seen my


daughter?”

“No, but we have been no farther than this,” said the


Doctor.

“I’m growing uneasy about her,” said the Major; and a


curious sensation of mingled dread and jealousy attacked
Clive.

“Did she go out—come this way?” said the Doctor.

“Yes. Martha told me she struck off over the mountain in


this direction.”
He looked sharply about him, but the path curved suddenly
before toward the mine, and backward in the direction of
the river, forming out there a natural terrace in the huge
rampart of limestone.

“Perhaps you have missed her,” said the Doctor. “She may
have returned home another way, without she has gone on
toward the mine.”

A spasm shot through Clive, who stood up firmly now,


nerved by the bitter thoughts which suggested to his
jealous mind Dinah seeking his brother once more.

“She would not go there,” cried the Major angrily. “Ah,


what’s that?”

For at that moment the cry they had before heard came
faintly to their ears.

The Major stepped quickly to the edge of the path,


protected only by a rough parapet of loose stones, looked
over, and then, leaping back, threw off his coat, leaped over
the rough protection, and began to lower himself down the
steep precipice.

For a moment or two Clive could not stir; then, weak,


trembling, and with his mouth hot and dry, he walked to the
edge, and looked down to see, quite two hundred feet
below, a portion of a woman’s dress, and directly after, as
she clung there desperately, Dinah Gurdons white upturned
face; and he knew now whence came the wailing sound.

“Clive! what are you going to do?”

“Get down to help,” he said hoarsely.


“Madness! You have no strength. You could not hold on for a
minute.”

Clive groaned, for even as he stood there a sensation of


faintness came over him, to teach him that he was helpless
as an infant.

“Good heavens! what a place!” cried the Doctor. “I cannot—I


dare not go down. It would be madness at my age.”

Then he stood speechless as his companion; and they


craned over, and watched the Major, active still as a young
man from his mountain life, descending quickly from block
to block, making use of the rough growth of heather for
hand hold, and now quite fifty feet below where they knelt,
while the look of agony in Dinah’s eyes as she clung there,
apparently unnerved and helpless, was as plain through the
clear air as if she were close at hand.

“Your work, Clive,” cried the Doctor furiously, but in a low


whisper. “The poor girl in her misery and despair has thrown
herself over, and lodged where she is. Thank God, I am
down here. I can be of use when we get her home. If we
get her home alive,” he added to himself.

Clive made no reply, but knelt down panting and enraged


against the weakness which kept him there supine, when, in
spite of all, he would have given a dozen years of his life to
have been able to descend and bear the poor girl up to a
place of safety.

But he could only gaze down giddily with heart beating as


he watched the Major slowly and carefully descending, now
making good progress, now slipping or sending down a
loose stone. Once they saw him hanging only by his hands,
again losing his footing and seeming to be gone. The next
minute, though, he was still descending, and in the silence
of the mountain side, they could hear his words, short,
sharp, and decisive, as he called to his child, bidding her be
of good heart, for he would be with her directly; and that
she would be safe.

Then, to Clive’s horror and despair, he saw the starting eyes


which had looked up so wildly, gradually close, and the sun
gleamed on them no more. He knew only too well what it
meant; that Dinah was turning faint and weak; and once
more unable to bear the agony, he made a rapid movement
to descend.

“Madman!” cried the Doctor, and he flung himself upon


Clive, mastering him directly, for the sudden strength
flickered away at once. “Don’t you see,” he panted, “you
cannot do it, and your fall would be destruction to them
both. Keep still and silent. The Major will reach her directly.
Yes: look: he is as active as a goat. Ah! great God! No:
saved—he has her!”

The Doctor shrank away unable to bear it, for as they


stared below with dilated eyes they saw Dinah begin to
glide downward just as her father was steadying himself,
holding on by one hand to a tough root. Then he seemed to
make a dart with the other, and his child suddenly became
stationary while he shifted his position, got his feet against
a piece of rock, and they saw him draw her up to his side
and hold her there.

The rest of that scene was dreamlike to Clive, as he lay with


his breast over the edge looking down, till nerved and urged
on by her father’s strong will, Dinah seemed to recover, and
began to climb up under his directions and with his help,
step by step, and inch by inch, till at last she was so close
that Clive stretched out his hands to help her, while the
Major supported her from below. But their eyes met, and
she did not touch those hands, but gave her wet and
bleeding fingers to the Doctor, who drew her into safety on
the path, where she rose now to stand shivering while the
Major sprang to her side.

“I did not think I could have done it,” he panted. “Oh,


Dinah, my child, don’t say you threw yourself down there.”

“No,” she said, giving him a piteous look, and then turning
slowly to face Clive. “I went down to fetch this—to give to
Clive Reed before he left us for ever. I thought it must be
there.”

She took from her breast, where it had evidently been


thrust, a stained scrap of reddish paper, made more ruddy
where she held it, for her fingers bled freely.

“A telegram,” cried the Doctor.

“Yes. Take it, Clive,” said Dinah slowly, but evidently rapidly
recovering her strength. “It is the message I received from
you that day.”

“I sent no message,” he cried, as he hastily read the stained


slip, and caught the words “come”—“meet me”—some
figures “P.M.,” and his name in full—“Clive Reed.”

“A forgery!” he cried wildly, as the truth flashed upon him.


“There is no postal mark upon it. I did not send this lie.”

“No?” said Dinah faintly, as the look of despair grew more


marked in her eyes. “I have thought since that I had been
deceived, but I felt that I would sooner die than you should
not know the truth.” Then she turned pale and shrank to her
father’s side, as a spasm of rage shot through Clive Reed.
“Jessop again!” he whispered hoarsely to the Doctor; and
his fingers crooked, and he held out his hands as if about to
spring at another’s throat. Then he reeled, but recovered
himself with an exultant cry, for a voice came loudly to their
ears from round the buttress toward the mine.

“Curse you! I will. The police shall stop that.”

“No; you don’t get away,” cried another voice; and Dinah
turned of a sickly white. “Stop, you! and let’s have it out, or
I’ll heave you down below. Blast you! I tell you she was my
lass—before you and your cursed brother came in the way.
Mine, I tell you.—Ah! just in time!”

Sturgess uttered a savage laugh, and he stopped short


facing the little group upon the shelf, and holding on by
Jessop’s collar, in spite of the latter’s struggles to get free.

“Look here, all of you. This man, my servant—you are


witnesses—he has threatened my life. I go in fear of him.
I’ll have him in charge. I go in fear, I tell you.”

“Yes, so much,” cried Sturgess, with a mocking laugh, “that


he was off down again to the cottage to see pretty little
Miss Gurdon here, only I stopped him, for I’ve had enough
of it. Master or no, he don’t go poaching on my estate. I’d
sooner break his cursed neck.”

“Silence, sir!” roared the Major.

“Silence yourself!” cried Sturgess savagely. “Who are you?”

“The father of the lady you insulted, and but for her sake
you would have been sent to gaol.”

“For courting a pretty girl,” cried Sturgess, with a mocking


laugh. “But I’ll have no more of it. Do you hear, both of you
—you too, Clive Reed? You call yourselves my masters. I’m
yours. Keep off, both of you, if you value your necks. I tell
you she’s my girl—my lass—my very own to marry or leave
as I please.”

Dinah uttered a piteous moan, and turned her agonised face


to Clive, who stood there with jaw dropped and the paper
trembling in his hand.

“Yes. You see. She don’t deny it.”

“Dinah!” cried Clive wildly, and there was so agonising an


appeal in his voice, that his cry thrilled her, and sent the
blood flushing into her pale cheeks, as she now stood up
unsupported.

“Yes, all of you; it’s all right. I used to meet her on the hill
side, and we used to go courting among the heather before
these white-faced hounds came down. She don’t deny it.
She daren’t. Dinah, my lass, come here.”

Clive made a movement to fling himself upon the ruffian,


but the Doctor passed a hand across his chest.

“Too weak, boy,” he whispered. “Give the scoundrel rope.”

“I do deny it,” said Dinah at last, as she drew herself up, a


true woman now, her honour at stake, and all listening for
her refutation of her pursuer’s words.

“There, what’s the good of lying, little one,” cried Sturgess,


with a mocking laugh. “It’s all nature, and there’s nothing to
be ashamed of in a strong man’s love.”

“I do deny it,” said Dinah again, more firmly now. “Father,


dear—Clive Reed—this man lies. It is not true.”
“What!” cried Sturgess. “There, what’s the good of hiding it
all, pussy? I’m an honest man, and I love you. I’ll marry
you to-morrow if you like.”

“Must I speak again?” said Dinah proudly, as she looked


round, letting her eyes rest last on Clive’s deadly white
face; and then she uttered a gasp, for she saw his cheeks
flush, and his eyes brighten, as they met hers, for she knew
that she was believed. “It is an insult, father, and a lie.”

“What!” cried Sturgess, as the Major caught her to his


breast; “didn’t you meet me that afternoon yonder, and go
with me down the mine gap? Before there was any one
there but me, gentlemen all.”

“Yes—wretch!” cried Dinah fiercely, “coward! You did pursue


me down there; I, a poor defenceless girl—you, a strong,
savage man. I must speak now, father, Clive; God, who is
my judge, hear me too. Faint and exhausted, he seized me
at last, and I was at his mercy, till my poor old faithful Rollo
came and set me free.”

“Yah, nonsense!” cried Sturgess triumphantly. “Perhaps you


will say I did not come to your window night after night.
What about that time when your father had gone up to
town?”

“The wound upon your shoulder is my answer, my witness


to the truth. Father, my only protector lay helpless in a
drugged sleep. Poor Rollo was poisoned by this miscreant’s
hand. I was alone, and at his mercy, till I fired!”

“What, this?” cried Sturgess mockingly; “this was a fall.”

“Yes,” said the Doctor, “when the shot had entered in. Major,
it was a gun-shot wound, and the marks of the dog’s teeth
are in his leg. I’ll swear to that.”
“Liar and hound,” cried the Major, dashing at him, but he
was too late, for, nerving himself for one blow, Clive Reed
threw himself upon the ruffian, and the next moment he lay
quivering on the ground, with the young man’s foot upon
his chest.

“Dinah, my child,” cried the Major reproachfully, “why was I


not told all this?”

“Because I was a woman, and shame closed my lips,” she


said softly. “Take me home, father. Silence has been my
only sin.”

“One word before you rise, my good fellow,” said Doctor


Praed, as he drew his patient from where Sturgess lay;
“whether the law deals with you or no is not my affair; but
I, as a doctor, tell you this: mad or only enraged there’s
sometimes a deadly poison in the tooth of a dog. You have
had a long taste of delirium from that gun-shot wound.
Mind what you’re about, or I wouldn’t give sixpence for your
life; and if you’re bad again you may die before I’ll run a
step to save you. Here, Jessop. Those of a feather flock
together; take this bird of prey back to his cage. You’re not
wanted here.”

He stood watching as Sturgess rose and staggered away


like a drunken man, while Jessop, after a vain effort to
speak, walked rapidly off in turn.

Then the Doctor turned to where the Major stood with


Dinah in his arms, her face buried in his breast.

“You will not fear to be alone, Major?” he said quietly.

“Afraid, sir,” said the Major, with an angry look. “No.”


“Then I will leave you now, and take my patient back to
town. Good day, my dear sir, and God bless you. I must
come and see you again. Dinah, an old man wants to say
good-bye.”

She turned her wild eyes to his, and his look was sufficient.
She left her father and the next moment rested in his arms.

“Good-bye, and I need not say God bless you, my darling,”


said the Doctor, with his voice quivering a little. “There, au
revoir. Clive will ask your pardon another time. Not now.”

The next morning Clive Reed had to be helped up the steps


into Doctor Praed’s house in Russell Square, a relapse
having prostrated him; and by the time he was about again
the ‘White Virgin’ mine was a solitude once more. It was
waiting for orders to go forth about the sale of the valuable
engines and other machinery, Robson now having the
property in charge, and going over four or five times a week
to see that the place was uninjured, though the weather
had already begun to make its mark.

One day he met the Major, and was ready enough to


become communicative, and tell how Sturgess had been
taken bad the day he returned to the mine, and how he had
been fetched at last by friends who came all the way from
Cornwall.

“Death’s mark was on him, safe enough, sir. I shouldn’t be


at all surprised to hear that he had gone.”

“And those gentlemen?” said the Major, clearing his throat,


and speaking still huskily, for he did not like his task.

“Mr Jessop Reed and Mr Wrigley, sir? Oh, they haven’t been
down again. Don’t suppose they will come, for the poor
mine’s played out.”
Two months more had passed away before Clive Reed
visited those parts again. He was thin and worn, but there
was a bright look in his eyes, as he breasted the hills from
Blinkdale and plunged down into the deep, chasm-like
vales. For he knew that the past, with its cruel doubting,
was forgiven, and that the woman he loved more than life
was ready to take him to her breast.

It was down the deep valley by the side of the rushing river
that Dinah did take him to her throbbing heart, and hold
him as tightly as his arms grasped her; for in that solitary
place, where the glancing sunbeams shot from the silver
river, there were only the trout to tell tales, and the tales
they told never reached the air.

She had gone to meet him, and when they had sauntered
on another half mile there was the Major whipping a dark
pool under the shadow of the rocks.

“Ah, Clive, my boy,” he cried, winding in his line and


speaking as if they had only parted the previous day, after a
glance at Dinah’s eyes where the love-light burned brightly.
“Glad to see you down again. Why didn’t you bring the
Doctor?”

“He is rather in trouble about his daughter?”

“Ill?”

“Well, mentally more than bodily, sir. She is back home, and
he will hardly leave her for a moment.”

“Home, eh? And her husband?”

“He is in New Zealand, and not likely to return.”


“So much the better for old England, my boy. Come along,
you must be like me, hungry.”

They walked through the old wild garden, which looked


more beautiful than ever; and Martha was ready to smile a
welcome; while to Clive, as he let himself sink back in his
old seat, it was as if he had at last found rest.

It was during a walk next morning with the Major, who took
Clive round by the ‘White Virgin’ mine, that the old officer
suddenly turned to him and said—

“Clive, my lad, the machinery here is to be sold next week.”

“I know it,” said the young man, frowning slightly.

“You must buy it, and start afresh. I can’t have you turn
rusty for want of work.”

“No, sir, it is useless. The chances are too great against the
old lode being found again.”

“Not at all, boy; it is found close to the surface.”

“What!” cried Clive excitedly. “Where?”

“On the patch of old waste of limestone that I bought all


those years ago, when, for a fault I never committed, I had
to exile myself and come to live down here—to rot in
despair, as I thought, but to find a lasting peace.”

“Oh, impossible!” cried Clive. “Are you sure?”

“As sure as a man can be who has dabbled over minerals


for twenty years. There it is—a foot beneath the surface,
and as rich as it was in the ‘White Virgin’ mine. The White
Virgin—my dearest child—gives it to you as her dowry, the
day you call her wife.”

The Major held out his hands; and as they were taken a
white dress was seen fluttering on the hill side a few
hundred yards away, and the Major said softly—

“She does not know it. I have left the news for you to tell.
One moment: I have a stipulation to make.”

“That you never leave us, sir.”

“No; but you may throw that in, boy, and not rob me of all.
Let the new vein still be called the ‘White Virgin’ mine.”

| Chapter 1 | | Chapter 2 | | Chapter 3 | | Chapter 4 | | Chapter 5 |


| Chapter 6 | | Chapter 7 | | Chapter 8 | | Chapter 9 | | Chapter 10
| | Chapter 11 | | Chapter 12 | | Chapter 13 | | Chapter 14 | |
Chapter 15 | | Chapter 16 | | Chapter 17 | | Chapter 18 | | Chapter
19 | | Chapter 20 | | Chapter 21 | | Chapter 22 | | Chapter 23 | |
Chapter 24 | | Chapter 25 | | Chapter 26 | | Chapter 27 | | Chapter
28 | | Chapter 29 | | Chapter 30 | | Chapter 31 | | Chapter 32 | |
Chapter 33 | | Chapter 34 | | Chapter 35 | | Chapter 36 | | Chapter
37 | | Chapter 38 | | Chapter 39 | | Chapter 40 |
*** END OF THE PROJECT GUTENBERG EBOOK THE WHITE VIRGIN
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