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Assignments 1 and 2 BTEC-23404 Computer Architecture

The document outlines assignments for the Computer Architecture course at Sardar Beant Singh State University, detailing objectives and corresponding questions for two assignments. It includes a variety of short, medium, and long answer questions covering topics such as microprocessor design, memory systems, and control units. The assignments aim to assess students' understanding of key concepts in computer architecture.

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0 views4 pages

Assignments 1 and 2 BTEC-23404 Computer Architecture

The document outlines assignments for the Computer Architecture course at Sardar Beant Singh State University, detailing objectives and corresponding questions for two assignments. It includes a variety of short, medium, and long answer questions covering topics such as microprocessor design, memory systems, and control units. The assignments aim to assess students' understanding of key concepts in computer architecture.

Uploaded by

mk4373773
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Sardar Beant Singh State University Gurdaspur

BTEC-23404: Computer Architecture


4th Semester (Batch 2023) ECE Jan-June 2025
Assignment 1
Course Objective Coverage Table

Objective Assignment 1 (Q Nos.)

1. Analyze microprocessor block diagram Q6, Q24

2. Apply instruction sets for assembly programming Q5, Q26

3. Design memory module & CPU interfacing Q8, Q9, Q27

4. Classify hardwired & microprogrammed control Q7, Q20, Q26

5. Synthesize I/O organization & standards Q11, Q12, Q23

Short Answer Questions

1. Define stored program concept and its significance in modern computers.


2. What is the difference between RAM and ROM?
3. Explain two’s complement representation with an example.
4. Why is carry save addition faster than ripple carry addition?
5. Name three addressing modes and give an example for each.
6. What is the role of the program counter (PC) in a CPU?
7. Differentiate between horizontal and vertical microprogramming.
8. What is locality of reference in memory systems?
9. Why is cache memory faster than main memory?
10. Explain the term "virtual memory" in one sentence.
11. What is the purpose of DMA (Direct Memory Access)?
12. Compare USB vs. SCSI in terms of speed and applications.
13. Define pipeline hazard and list its types.
14. What is cache coherence, and why is it needed in multiprocessors?
15. Why are multicore processors more efficient than single-core CPUs?

Medium Answer Questions

16. Explain IEEE 754 floating-point representation (single-precision format).


17. Compare RISC vs. CISC architectures with examples.
18. Describe the Booth multiplication algorithm with a numerical example.
19. Explain non-restoring division with steps.
20. Discuss hardwired vs. microprogrammed control units (advantages & disadvantages).
21. Explain fully associative, direct-mapped, and set-associative cache mapping techniques.
22. Describe interrupt-driven I/O with a block diagram.
23. Explain MESI protocol for cache coherence in multiprocessors.

Long Answer Questions

24. Design a 4-bit ALU that performs addition, subtraction, AND, OR, and XOR operations.
Explain its working.
25. Explain pipelining in processors (5-stage pipeline), including hazards and solutions.
26. Compare x86 and ARM instruction sets (addressing modes, formats, and use cases).
27. Discuss memory hierarchy (registers, cache, RAM, disk) with access time trade-offs.
28. Explain symmetric multiprocessing (SMP) and multicore architectures with examples.
Sardar Beant Singh State University Gurdaspur
BTEC-23404: Computer Architecture
4th Semester (Batch 2023) ECE Jan-June 2025

Assignment 2

Objective Assignment 2 (Q Nos.)

1. Analyze microprocessor block diagram Q7, Q24

2. Apply instruction sets for assembly programming Q5, Q17, Q26

3. Design memory module & CPU interfacing Q8, Q20, Q27

4. Classify hardwired & microprogrammed control Q19, Q26

5. Synthesize I/O organization & standards Q11, Q12, Q23

Short Answer Questions

1. What is the von Neumann bottleneck?


2. Differentiate between big-endian and little-endian byte ordering.
3. How does sign-magnitude representation differ from two’s complement?
4. Explain carry propagation delay in adders.
5. What is an immediate addressing mode? Give an example.
6. Why does ARM use a reduced instruction set (RISC)?
7. What is the role of the MAR (Memory Address Register)?
8. Differentiate between SRAM and DRAM (speed, cost, volatility).
9. What is a write-back cache policy?
10. Explain the term "TLB (Translation Lookaside Buffer)".
11. What is bus arbitration in I/O systems?
12. Compare PCI Express vs. SATA in terms of speed and applications.
13. What is a data hazard in pipelining?
14. Define heterogeneous multicore processing (e.g., ARM big.LITTLE).
15. Why is SCSI still used in servers and high-performance storage?

Medium Answer Questions

16. Explain floating-point addition and subtraction with examples.


17. Describe array multiplier for unsigned numbers.
18. Compare restoring vs. non-restoring division techniques.
19. Explain control memory and microinstruction sequencing in microprogrammed control.
20. Discuss virtual memory (paging vs. segmentation).
21. Explain asynchronous data transfer (handshaking protocol).
22. Describe multiprocessor cache coherence and the snooping protocol.
23. Explain USB protocol layers (physical, data link, protocol layers).

Long Answer Questions

24. Design a 16-bit carry look-ahead adder and explain its working.
25. Explain instruction pipelining in CISC processors (challenges & optimizations).
26. Compare hardwired vs. microprogrammed control units (design complexity, flexibility).
27. Discuss memory interleaving and RAID levels for performance improvement.
28. Explain parallel processing architectures (SIMD, MIMD, GPU computing).

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