UNIT:2:Architecture of the 8086 Microprocessor

2.0 Architecture of 8086

The 8086 microprocessor is a 16-bit microprocessor that operates in a
segmented memory model, capable of addressing up to 1MB of
memory. It uses a separate bus interface unit (BIU) and execution
unit (EU), with a variety of registers and functional components to
perform complex operations efficiently. The 8086 microprocessor is
widely recognized for its contribution to the evolution of
microprocessors and the x86 architecture.

2.1 State the Features of 8086 Microprocessor

Some prominent features of the 8086 Microprocessor are:

 16-bit Microprocessor: It processes 16 bits of data at once and

has a 16-bit wide data bus.
 20-bit Address Bus: It can address up to 1MB of memory (2^20
addresses).
 Clock Speed: Typically operates at 5 MHz, 8 MHz, or 10 MHz.
 Segmented Memory: It uses a segmented memory model,
dividing memory into segments of 64KB each.
 Instruction Queue: It has a 6-byte instruction queue for pre-
fetching instructions, enhancing instruction processing speed.
 Support for Two Modes: It operates in minimum mode (single
processor systems) and maximum mode (multiprocessor systems).
 Multiplexed Address/Data Bus: The data and address buses share
the same pins to reduce the number of physical pins.

2.2 Draw the Functional Block Diagram of 8086 and Explain

The functional block diagram of the 8086 consists of two main parts:

1. Bus Interface Unit (BIU): This unit manages the communication

with the memory and input/output devices. It handles address
calculation, data transfer, and instruction pre-fetching.
o Segment Register: Stores the base addresses of the
segments.
o Address Adder: Calculates the physical address by adding
the segment base address with the offset.
o Instruction Queue: A 6-byte queue that pre-fetches
instructions for faster execution.
o Bus Controller: Controls the data transfer between the
microprocessor, memory, and I/O devices.
2. Execution Unit (EU): The EU performs the actual computation. It
contains:
o ALU (Arithmetic Logic Unit): Performs arithmetic and
logical operations.
o General Purpose Registers: These include AX, BX, CX,
DX, which are used for temporary data storage.
o Control Unit: Decodes instructions and generates control
signals.
o Flags Register: Contains flags that represent the state of the
microprocessor.

2.3 State the Need of Bus Control Logic

The Bus Control Logic in the 8086 microprocessor is essential to
manage the communication between the processor and other
components like memory and I/O devices. It generates control signals,
such as READ, WRITE, and MEMORY, ensuring that data is
transferred at the right time to the correct place. Without proper bus
control, the processor wouldn't be able to manage the timing and
sequencing of operations efficiently.
2.4 State the Need of Memory Segmentation
Memory segmentation in 8086 allows for more efficient management of
memory by breaking it up into smaller blocks, called segments, each of
which is 64KB in size. This helps in organizing the 1MB memory space
into logical units, making it easier to handle large programs and data
structures. Segmentation also allows for better memory protection,
flexibility, and easier access.

2.5 State the Importance of Segment Registers

The segment registers in 8086 (CS, DS, SS, ES) are essential for
pointing to the start of specific segments in memory. These registers
make it possible to address data, code, and stack areas in memory by
storing the base addresses of the respective segments:

 CS (Code Segment): Points to the segment that contains the

program instructions.
 DS (Data Segment): Points to the segment that contains data
variables.
 SS (Stack Segment): Points to the segment that contains the stack,
which stores temporary data.
 ES (Extra Segment): Often used as an additional data segment for
string operations.

These registers help in organizing memory into 64KB segments, making

memory access efficient and structured.

2.6 State the Purpose of Instruction Pointer

The Instruction Pointer (IP) register holds the address of the next
instruction to be executed by the processor. After each instruction
execution, the IP is updated to point to the next instruction in sequence.
In the case of a branch, jump, or call instruction, the IP is updated to
point to the target address of the instruction.

2.7 State the Function of Instruction Queue

The Instruction Queue is a 6-byte buffer in the 8086 that stores pre-
fetched instructions from memory. The Bus Interface Unit (BIU)
fetches instructions while the Execution Unit (EU) is busy executing
the current instruction. This helps speed up the overall instruction
execution by reducing the idle time of the microprocessor, as it can
always have the next instruction ready to be executed.

2.8 List Different General Purpose Registers of 8086 and

State Their Function
The general-purpose registers in 8086 include:

1. AX (Accumulator): Used for arithmetic, logic, and data transfer

operations.
2. BX (Base Register): Often used as a pointer to data in memory.
3. CX (Count Register): Used for loop counters and string
operations.
4. DX (Data Register): Used in input/output operations and extended
arithmetic operations.

These registers are used to temporarily store data during processing and
facilitate various types of operations.

2.9 State the Purpose of Pointer and Index Registers

The pointer and index registers in 8086 include:
  SP (Stack Pointer): Points to the top of the stack, used for push
and pop operations.
 BP (Base Pointer): Points to the base of the current stack frame in
stack-based operations.
 SI (Source Index): Used for string operations to point to the
source operand.
 DI (Destination Index): Used for string operations to point to the
destination operand.

These registers help manage memory and stack operations during

program execution.

2.10 Explain the Working of ALU and Control Unit

 ALU (Arithmetic Logic Unit): The ALU performs arithmetic
operations (such as addition, subtraction) and logical operations
(such as AND, OR, NOT). It takes input from the registers,
performs the operation, and stores the result back in a register.
 Control Unit (CU): The control unit decodes instructions fetched
from memory, generates the necessary control signals, and directs
the operations of the ALU and registers. It ensures the proper
sequence of operations in the microprocessor.

2.11 List Different Flags of 8086 and Mention Their Use

The flags in the 8086 microprocessor are:

1. Carry Flag (CF): Set if there is a carry or borrow during

arithmetic operations.
 2. Parity Flag (PF): Set if the number of 1's in the result is even.
3. Auxiliary Carry Flag (AF): Set if there is a carry from bit 3 to bit
4 during BCD operations.
4. Zero Flag (ZF): Set if the result of an operation is zero.
5. Sign Flag (SF): Set if the result is negative.
6. Overflow Flag (OF): Set if the result of an operation overflows
the capacity of the register.
7. Direction Flag (DF): Used in string operations to determine
whether string operations should increment or decrement the index
registers.
8. Interrupt Flag (IF): Enables or disables interrupts.
9. Trap Flag (TF): Used for single-step debugging, causing an
interrupt after each instruction.

2.12 Draw the Pin Diagram of 8086 and State the Function
of Each Pin
The 8086 microprocessor has 40 pins. Some important pins include:

 AD0-AD15: Multiplexed address/data bus (16 bits).

 A16-A19: High-order address bus.
 M/IO: Signals whether the operation is memory or I/O.
 RD: Read control signal.
 WR: Write control signal.
 INTA: Interrupt acknowledge signal.
 ALE: Address latch enable.
 CLK: Clock input.

Each pin serves a specific role in managing the data transfer, memory
access, and I/O operations.

2.13 Describe the Maximum and Minimum Mode of Operation

  Minimum Mode: This mode is used in systems with a single
processor. The 8086 microprocessor controls the system directly
and generates the necessary control signals without the need for
external bus controllers.
 Maximum Mode: In this mode, the 8086 works with an external
bus controller (8288), allowing for multiprocessor configurations.
The bus controller generates control signals, enabling more
complex operations.

2.14 Illustrate the Generation of 20-bit Physical Address

with an Example
To generate the physical address in 8086, the 16-bit segment value is
shifted left by 4 bits and then added to the 16-bit offset value.

For example, if:

 Segment Address (CS) = 0x1234

 Offset Address (IP) = 0x5678

The physical address is calculated as:

PhysicalAddress=(Segment×16)+Offset=(0x1234×16)+0x5678=0x1234
0+0x5678=0x179B8Physical Address = (Segment \times 16) + Offset =
(0x1234 \times 16) + 0x5678 = 0x12340 + 0x5678 = 0x179B8

2.15 Draw the Timing Diagrams of Memory Read and

Memory Write Cycles
In the memory read cycle, the 8086 microprocessor sends the memory
address on the address bus, asserts the RD signal, and reads data from
memory.
In the memory write cycle, the 8086 asserts the WR signal to write data
to memory. The data is placed on the data bus.

2.16 i) State the Need of Interrupts

Interrupts are essential for handling real-time events, such as user
input, external device requests, or errors, without the microprocessor
having to continuously check for these events. They allow the
microprocessor to react immediately to important events, improving the
system's responsiveness.

ii) List Different Types of Interrupts

There are two primary types of interrupts:

1. Hardware Interrupts: Triggered by external hardware (e.g.,

keyboard press).
2. Software Interrupts: Initiated by software instructions (e.g.,
system calls).

iii) Explain the Interrupt Response in 8086

When an interrupt occurs, the 8086 performs the following steps:

1. Save Context: It pushes the current program counter and flags

onto the stack.
2. Interrupt Service Routine (ISR): It jumps to the ISR, a
predefined memory location.
3. Restore Context: After completing the ISR, the program counter
and flags are restored, and the execution of the program continues.

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