SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003

D Operating Voltage Range of 4.5 V to 5.5 V D Low Input Current of 1 µA Max

D High-Current 3-State Outputs Interface D Inputs Are TTL-Voltage Compatible
Directly With System Bus D Provide Bus Interface From Multiple
D Typical tpd = 17 ns Sources in High-Performance Systems
D Low Power Consumption, 80-µA Max ICC D Buffered Inputs and Outputs
D ±6-mA Output Drive at 5 V
SN54HCT257 . . . J PACKAGE SN54HCT257 . . . FK PACKAGE
SN74HCT257 . . . D OR N PACKAGE (TOP VIEW)
(TOP VIEW)

VCC
A/B
NC

OE
1A
A/B 1 16 VCC
1A 2 15 OE 3 2 1 20 19
1B 4 18 4A
1B 3 14 4A
1Y 5 17 4B
1Y 4 13 4B
NC 6 16 NC
2A 5 12 4Y
2A 7 15 4Y
2B 6 11 3A
2B 8 14 3A
2Y 7 10 3B 9 10 11 12 13
GND 8 9 3Y

2Y

3Y
3B
GND
NC
NC − No internal connection

description/ordering information
The ’HCT257 devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in
bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at
the high logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
PDIP − N Tube of 25 SN74HCT257N SN74HCT257N
Tube of 40 SN74HCT257D
−40°C to 85°C
SOIC − D Reel of 2500 SN74HCT257DR HCT257
Reel of 250 SN74HCT257DT
CDIP − J Tube of 25 SNJ54HCT257J SNJ54HCT257J
−55°C to 125°C
LCCC − FK Tube of 55 SNJ54HCT257FK SNJ54HCT257FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.




   !"#$%&' #"'('   Copyright  2003, Texas Instruments Incorporated
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+&#)#("' +&* & &*% ") &/( '*$%&' ('!(*! 0(**('1.
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1



 
      

 

 
    

SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003

FUNCTION TABLE
INPUTS
OUTPUT
SELECT DATA
OE Y
A/B A B
H X X X Z
L L L X L
L L H X H
L H X L L
L H X H H

logic diagram (positive logic)

15
OE

1
A/B

2
1A
4
1Y
3
1B

5
2A
7
2Y
6
2B

11
3A
9
3Y
10
3B

14
4A
12
4Y
13
4B

Pin numbers shown are for the D, J, and N packages.

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265



 
      

 

 
    

SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

SN54HCT257 SN74HCT257
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage VCC = 4.5 V to 5.5 V 2 2 V
VIL Low-level input voltage VCC = 4.5 V to 5.5 V 0.8 0.8 V
VI Input voltage 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC V
tt Input transition (rise and fall) time 500 500 ns
TA Operating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
TA = 25°C SN54HCT257 SN74HCT257
PARAMETER TEST CONDITIONS VCC UNIT
MIN TYP MAX MIN MAX MIN MAX
IOH = −20 µA 4.4 4.499 4.4 4.4
VOH VI = VIH or VIL 4.5 V V
IOH = −6 mA 3.98 4.3 3.7 3.84
IOL = 20 µA 0.001 0.1 0.1 0.1
VOL VI = VIH or VIL 4.5 V V
IOL = 6 mA 0.17 0.26 0.4 0.33
II VI = VCC or 0 5.5 V ±0.1 ±100 ±1000 ±1000 nA
IOZ VO = VCC or 0, VI = VIH or VIL 5.5 V ±0.01 ±0.5 ±10 ±5 µA
ICC VI = VCC or 0, IO = 0 5.5 V 8 160 80 µA
One input at 0.5 V or 2.4 V,
∆ICC‡ 5.5 V 1.4 2.4 3 2.9 mA
Other inputs at 0 or VCC
4.5 V
Ci 3 10 10* 10 pF
to 5.5 V
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3



 
      

 

 
    

SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003

switching characteristics over recommended operating free-air temperature range, CL = 50 pF

(unless otherwise noted) (see Figure 1)
FROM TO TA = 25°C SN54HCT257 SN74HCT257
PARAMETER VCC UNIT
(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX
4.5 V 20 30 45 38
A or B Y
5.5 V 17 27 40 34
tpd ns
4.5 V 20 30 45 38
A/B Y
5.5 V 17 27 40 34
4.5 V 20 30 45 38
ten OE Y ns
5.5 V 17 27 40 34
4.5 V 20 30 45 38
tdis OE Y ns
5.5 V 17 27 40 34
4.5 V 8 15 22 19
tt Any ns
5.5 V 7 14 21 17

switching characteristics over recommended operating free-air temperature range, CL = 150 pF

(unless otherwise noted) (see Figure 1)
FROM TO TA = 25°C SN54HCT257 SN74HCT257
PARAMETER VCC UNIT
(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX
4.5 V 22 38 57 48
A or B Y
5.5 V 19 35 53 44
tpd ns
4.5 V 22 38 57 48
A/B Y
5.5 V 19 35 53 44
4.5 V 23 40 60 50
ten OE Y ns
5.5 V 20 38 57 48
4.5 V 17 42 63 53
tt Any ns
5.5 V 14 38 57 48

operating characteristics, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load 13 pF

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4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265



 
      

 

 
    

SCLS072D − NOVEMBER 1988 − REVISED SEPTEMBER 2003

PARAMETER MEASUREMENT INFORMATION

VCC
PARAMETER RL CL S1 S2

S1 tPZH 50 pF Open Closed

Test ten 1 kΩ or
Point RL tPZL 150 pF Closed Open
From Output
Under Test tPHZ Open Closed
CL tdis 1 kΩ 50 pF
(see Note A) S2 tPLZ Closed Open

50 pF
tpd or tt −− or Open Open
150 pF
LOAD CIRCUIT

3V Output
3V
Input 1.3 V 1.3 V Control
1.3 V 1.3 V
0V (Low-Level
Enabling) 0V
tPLH tPHL
tPZL tPLZ
In-Phase VOH ≈VCC
90% 90% Output
Output 1.3 V 1.3 V Waveform 1 1.3 V
10% 10% V
OL (See Note B) 10% VOL
tr tf
tPHL tPLH tPZH tPHZ
Out-of- VOH
90% 90% Output VOH
Phase 1.3 V 1.3 V 90%
Output 10% 10% Waveform 2 1.3 V
VOL (See Note B) ≈0 V
tf tr

VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS

OUTPUT AND 3-STATE BIDIRECTIONAL I/O ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
PROPAGATION DELAY TIME

NOTES: A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

 PACKAGE OPTION ADDENDUM

www.ti.com 14-Oct-2022

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SN74HCT257D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT257 Samples

SN74HCT257DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT257 Samples

SN74HCT257N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HCT257N Samples

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 14-Oct-2022

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74HCT257DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74HCT257DR SOIC D 16 2500 340.5 336.1 32.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

TUBE

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
SN74HCT257D D SOIC 16 40 507 8 3940 4.32
SN74HCT257N N PDIP 16 25 506 13.97 11230 4.32
SN74HCT257N N PDIP 16 25 506 13.97 11230 4.32

Pack Materials-Page 3
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