TS3A27518E-Q1

SCDS311D – JANUARY 2010 – REVISED OCTOBER 2022

TS3A27518E-Q1 6-bit, 1-of-2 Multiplexer or Demultiplexer With Integrated IEC

L-4 ESD and 1.8-V Logic Compatible Control Inputs

1 Features 3 Description
• Qualified for automotive applications The TS3A27518E-Q1 is a 6-bit 1-of-2 multiplexer-
• AEC-Q100 qualified with the following results: demultiplexer designed to operate from 1.65 V to 3.6
– Device temperature grade 2: –40°C to 105°C V. This device can handle both digital and analog
ambient operating temperature range signals, and signals up to V+ can be transmitted
– Device HBM ESD classification level H2 in either direction. The TS3A27518E-Q1 has two
– Device CDM ESD classification level C3B control pins, each controlling three 1-of-2 muxes at
• Functional Safety-Capable the same time, and an enable pin that is used to
– Documentation available to aid functional safety put all outputs in high-impedance mode. The control
system design pins are compatible with 1.8-V logic thresholds and
• 1.65-V to 3.6-V single-supply operation are backward compatible with 2.5-V and 3.3-V logic
• Powered-off protection (isolation in powerdown thresholds as well.
mode, Hi-Z when V+ = 0) The TS3A27518E-Q1 allows any SD, SDIO, and
• Low capacitance switches, 21.5 pF (typical) multimedia card host controllers to be expanded out
• Bandwidth up to 240 MHz for high-speed rail-to-rail to multiple cards or peripherals because the SDIO
signal handling interface consists of 6-bits: CMD, CLK, and Data[0:3]
• Crosstalk and off isolation of −62 dB signals. The TS3A27518E-Q1 has two control pins
• 1.8-V logic threshold compatibility for control inputs that give additional flexibility to the user, for example,
• 3.6-V tolerant control inputs the ability to mux two different audio-video signals
• ESD performance: NC/NO ports in equipment such as an LCD television, an LCD
– ±6-kV contact discharge (IEC 61000-4-2) monitor, or a notebook docking station.
• 24-pin TSSOP (7.80 mm × 4.40 mm) and 24-pin
QFN (4.00 mm × 4.00 mm) package Package Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
2 Applications RTW (WQFN, 24) 4.00 mm × 4.00 mm
TS3A27518E-Q1
• SD/SDIO and MMC two port MUX PW (TSSOP, 24) 7.80 mm × 4.40 mm
• PC VGA video MUX/video systems
(1) For all available packages, see the orderable addendum at
• Audio and video signal routing the end of the data sheet.
VCC

IN1
Logic
EN IN2

NC1
NO1 NC4
COM1 NO4
COM4
NC2
NO2 NC5
COM2 NO5
COM5
NC3
NC6
NO3
NO6
COM3
COM6

GND

Copyright © 2016, Texas Instruments Incorporated

Functional Block Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1 8.3 Feature Description...................................................19
2 Applications..................................................................... 1 8.4 Device Functional Modes..........................................19
3 Description.......................................................................1 9 Application and Implementation.................................. 20
4 Revision History.............................................................. 2 9.1 Application Information............................................. 20
5 Pin Configuration and Functions...................................3 9.2 Typical Application.................................................... 20
6 Specifications.................................................................. 4 10 Power Supply Recommendations..............................21
6.1 Absolute Maximum Ratings........................................ 4 11 Layout........................................................................... 22
6.2 ESD Ratings............................................................... 4 11.1 Layout Guidelines................................................... 22
6.3 Recommended Operating Conditions.........................4 11.2 Layout Example...................................................... 22
6.4 Thermal Information....................................................5 12 Device and Documentation Support..........................23
6.5 Electrical Characteristics for 3.3-V Supply .................5 12.1 Documentation Support.......................................... 23
6.6 Electrical Characteristics for 2.5-V Supply .................7 12.2 Receiving Notification of Documentation Updates..23
6.7 Electrical Characteristics for 1.8-V Supply .................9 12.3 Support Resources................................................. 23
6.8 Typical Characteristics.............................................. 11 12.4 Trademarks............................................................. 23
7 Parameter Measurement Information.......................... 14 12.5 Electrostatic Discharge Caution..............................23
8 Detailed Description......................................................19 12.6 Glossary..................................................................23
8.1 Overview................................................................... 19 13 Mechanical, Packaging, and Orderable
8.2 Functional Block Diagram......................................... 19 Information.................................................................... 23

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (January 2019) to Revision D (November 2022) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Added functional safety-capable information to the Features section................................................................ 1

Changes from Revision B (May 2012) to Revision C (January 2019) Page

• Added Device Information table, ESD Ratings table, Recommended Operating Conditions table, Feature
Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section ..................................................................................................1
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1

Changes from Revision A (March 2012) to Revision B (May 2012) Page

• Changed device temp grade from 1 to 2, removed maximum withstand voltage info, changed C3B2 to C3B.. 1
• Added extra row to ordering information table....................................................................................................1
• Changed TA = –40°C to 85°C to TA = –40°C to 105°C.......................................................................................5
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C and limits -7.5 to 7.5........................5
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 68................................... 5
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 70................................... 5
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 5 µA................................ 5
• Changed TA = –40°C to 85°C to TA = –40°C to 105°C.......................................................................................7
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 38.4................................ 7
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 3..................................... 7
• Changed TA = –40°C to 85°C to TA = –40°C to 105°C.......................................................................................9
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C and limits –5.8 to 5.8.......................9
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 35.2................................ 9
• Changed Full to –40°C to 85°C and added extra row with 85°C to 105°C with limits 2.5.................................. 9

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5 Pin Configuration and Functions

N.C.

NC1

NC2

NC6
NC3
IN1
NC2 1 24 IN1

NC1 2 23 NC3
24

23

22

21

19
20
N.C. 3 22 NC6

CO M1 1 18 NC4 CO M1 4 21 NC4

GND 2 17 EN GND 5 20 EN

CO M2 3 16 NC5 CO M2 6 19 NC5
Th ermal
CO M3 7 18 NO5
CO M3 4 Pad 15 NO5
VCC 8 17 NO4
VCC 5 14 NO4
CO M4 9 16 NO6
CO M4 6 13 NO6
CO M5 10 15 NO3
10

12
11
7

NO1 11 14 IN2

CO M6 12 13 NO2
CO M5

NO1

CO M6

NO2

NO3
IN2

No t to scale No t to scale

Figure 5-1. RTW Package, 24-Pin WQFN (Top View) Figure 5-2. PW Package, 24-Pin TSSOP (Top View)

Table 5-1. Pin Functions

PIN
TYPE(1) DESCRIPTION
NAME RTW PW
COM1 1 4 I/O Common-signal path
COM2 3 6 I/O Common-signal path
COM3 4 7 I/O Common-signal path
COM4 6 9 I/O Common-signal path
COM5 7 10 I/O Common-signal path
COM6 9 12 I/O Common-signal path
EN 17 20 I Digital control to enable or disable all signal paths
GND 2 5 — Ground.
IN1 21 24 I Digital control to connect COM to NC or NO
IN2 11 14 I Digital control to connect COM to NC or NO
N.C. 24 3 — Not connected
NC1 23 2 I/O Normally closed-signal path
NC2 22 1 I/O Normally closed-signal path
NC3 20 23 I/O Normally closed-signal path
NC4 18 21 I/O Normally closed-signal path
NC5 16 19 I/O Normally closed-signal path
NC6 19 22 I/O Normally closed-signal path
NO1 8 11 I/O Normally open-signal path
NO2 10 13 I/O Normally open-signal path
NO3 12 15 I/O Normally open-signal path
NO4 14 17 I/O Normally open-signal path
NO5 15 18 I/O Normally open-signal path
NO6 13 16 I/O Normally open-signal path
VCC 5 8 — Voltage supply

(1) I = input, O = output

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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
V+ Supply voltage range(2) –0.5 4.6 V
VNC
VNO Analog voltage range(2) (3) (4) –0.5 4.6 V
VCOM
IK Analog port diode current(5) V+ < VNC, VNO, VCOM < 0 –50 mA
INC
INO ON-state switch current(6) VNC, VNO, VCOM = 0 to V+ –50 50 mA
ICOM
VI Digital input voltage range(2) (3) –0.5 4.6 V
IIK Digital input clamp current(2) (3) VIO < VI < 0 –50 mA
I+ Continuous current through V+ 100 mA
IGND Continuous current through GND –100 mA
Tstg Storage temperature range –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) This value is limited to 5.5 V maximum.
(5) Requires clamp diodes on analog port to V+.
(6) Pulse at 1-ms duration <10% duty cycle

6.2 ESD Ratings

VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
AEC-Q100 Classification Level H2
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±750
AEC-Q100 Classification Level C3B

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process..
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage VCC 1.65 3.6 V
VNC
Analog signal voltage VNO 0 VCC V
VCOM
Digital input voltage VI 0 VCC V

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6.4 Thermal Information

TS3A27518E
THERMAL METRIC (1) PW (TSSOP) RTW (WQFN) UNIT
24 PINS 24 PINS
RθJA Junction-to-ambient thermal resistance 104 40.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 51.6 42.9 °C/W
RθJB Junction-to-board thermal resistance 57.5 19.2 °C/W
ψJT Junction-to-top characterization parameter 9.9 1 °C/W
ψJB Junction-to-board characterization parameter 57.1 19.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — 8 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

6.5 Electrical Characteristics for 3.3-V Supply

V+ = 3 V to 3.6 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch

ON-state 0 ≤ (VNC or VNO) ≤ V+, Switch ON, 25°C 4.4 6.2

ron 3V Ω
resistance ICOM = –32 mA, See Figure 7-1 Full 7.6
ON-state 25°C 0.3 0.7
VNC or VNO = 2.1 V, Switch ON,
resistance match Δron 3V Ω
ICOM = –32 mA, See Figure 7-1 Full 0.8
between channels
ON-state 25°C 0.95 2.1
0 ≤ (VNC or VNO) ≤ V+, Switch ON,
resistance ron(flat) 3V Ω
ICOM = –32 mA, See Figure 7-2 Full 2.3
flatness
VNC or VNO = 1 V, 25°C –0.5 0.05 0.5
VCOM = 3 V,
INC(OFF),
or 3.6 V
INO(OFF) Full –7 7
VNC or VNO = 3 V,
NC, NO VCOM = 1 V, Switch OFF,
OFF leakage μA
VNC or VNO = 0 to 3.6 V, See Figure 7-2 25°C –1 0.05 1
current
VCOM = 3.6 V to 0,
INC(PWROFF),
or 0V
INO(PWROFF) Full –12 12
VNC or VNO = 3.6 V to 0,
VCOM = 0 to 3.6 V,
VNC or VNO = 3 V, 25°C –1 0.01 1
VCOM = 1 V,
ICOM(OFF) or 3.6 V
VNC or VNO = 1 V, Full –2 2
COM VCOM = 3 V, Switch OFF,
OFF leakage μA
VNC or VNO = 3.6 V to 0, See Figure 7-2 25°C –1 0.02 1
current
VCOM = 0 to 3.6 V,
ICOM(PWROFF) or 0V
VNC or VNO = 0 to 3.6 V, Full –12 12
VCOM = 3.6 V to 0,
25°C –2.5 0.04 2.2
VNC or VNO = 1 V,
NC, NO VCOM = Open, –40°C
INO(ON), Switch ON, –7 7
ON leakage or to 85°C 3.6 V μA
INC(ON) See Figure 7-3
current VNC or VNO = 3 V,
85°C to
VCOM = Open, –7.5 7.5
105°C
VNC or VNO = Open, 25°C –2 0.03 2
COM VCOM = 1 V,
Switch ON,
ON leakage ICOM(ON) or 3.6 V μA
See Figure 7-3 Full –7 7
current VNC or VNO = Open,
VCOM = 3 V,
Digital Control Inputs (IN1, IN2, EN)(1)
Input logic high VIH Full 3.6 V 1.2 3.6 V
Input logic low VIL Full 3.6 V 0 0.65 V

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6.5 Electrical Characteristics for 3.3-V Supply (continued)

V+ = 3 V to 3.6 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
25°C –0.1 0.05 0.1
Input leakage current IIH, IIL VI = V+ or 0 3.6 V μA
Full –2.5 2.5
Dynamic
25°C 3.3 V 18.1 59
–40°C
VCOM = V+, CL = 35 pF, 60
Turn-on time tON to 85°C ns
RL = 50 Ω, See Figure 7-5 3 V to 3.6 V
85°C to
68
105°C
25°C 3.3 V 25.4 60.6
–40°C
VCOM = V+, CL = 35 pF, 61
Turn-off time tOFF to 85°C ns
RL = 50 Ω, See Figure 7-5 3 V to 3.6 V
85°C to
70
105°C

Break-before- VNC = VNO = V+/2, CL = 35 pF, 25°C 3.3 V 4 11.1 22.7

tBBM ns
make time RL = 50 Ω, See Figure 7-6 Full 3 V to 3.6 V 28
VGEN = 0, CL = 0.1 nF,
Charge injection QC 25°C 3.3 V 0.81 pC
RGEN = 0, See Figure 7-10
NC, NO CNC(OFF), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 3.3 V 13 pF
OFF capacitance CNO(OFF) Switch OFF,
COM VNC or VNO = V+ or GND,
CCOM(OFF) See Figure 7-4 3.3 V 8.5 pF
OFF capacitance Switch OFF,
NC, NO CNC(ON), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 3.3 V 21.5 pF
ON capacitance CNO(ON) Switch OFF,
COM VCOM = V+ or GND,
CCOM(ON) See Figure 7-4 25°C 3.3 V 21.5 pF
ON capacitance Switch ON,
Digital input
CI VI = V+ or GND See Figure 7-4 25°C 3.3 V 2 pF
capacitance
Switch ON,
Bandwidth BW RL = 50 Ω, 25°C 3.3 V 240 MHz
See Figure 7-6
RL = 50 Ω, Switch OFF,
OFF isolation OISO 25°C 3.3 V –62 dB
f = 10 MHz, See Figure 7-8
RL = 50 Ω, Switch ON,
Crosstalk XTALK 25°C 3.3 V –62 dB
f = 10 MHz, See Figure 7-9
RL = 50 Ω, Switch ON,
Crosstalk adjacent XTALK(ADJ) 25°C 3.3 V –71 dB
f = 10 MHz, See Figure 7-9
Total harmonic RL = 600 Ω, f = 20 Hz to 20 kHz,
THD 25°C 3.3 V 0.05 %
distortion CL = 50 pF, See Figure 7-11
Supply
25°C 0.04 0.3
–40°C
Positive 3
I+ VI = V+ or GND, Switch ON or OFF to 85°C 3.6 V μA
supply current
85°C to
5
105°C

(1) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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6.6 Electrical Characteristics for 2.5-V Supply

V+ = 2.3 V to 2.7 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch

ON-state 0 ≤ (VNC or VNO) ≤ V+, Switch ON, 25°C 5.5 9.6

ron 2.3 V Ω
resistance ICOM = –32 mA, See Figure 7-1 Full 11.5
ON-state 25°C 0.3 0.8
VNC or VNO = 1.6 V, Switch ON,
resistance match Δron 2.3 V Ω
ICOM = –32 mA, See Figure 7-1 Full 0.9
between channels
ON-state 25°C 0.91 2.2
0 ≤ (VNC or VNO) ≤ V+, Switch ON,
resistance ron(flat) 2.3 V Ω
ICOM = –32 mA, See Figure 7-2 Full 2.3
flatness
VNC or VNO = 0.5 V, 25°C –0.3 0.04 0.3
VCOM = 2.3 V,
INC(OFF),
or 2.7 V
INO(OFF) Full –6 6
VNC or VNO = 2.3 V,
NC, NO VCOM = 0.5 V, Switch OFF,
OFF leakage μA
VNC or VNO = 0 to 2.7 V, See Figure 7-2 25°C –0.6 0.02 0.6
current
VCOM =2.7 V to 0,
INC(PWROFF),
or 0V
INO(PWROFF) Full –10 10
VNC or VNO = 2.7 V to 0,
VCOM = 0 to 2.7 V,
VNC or VNO = 0.5 V, 25°C –0.7 0.02 0.7
VCOM = 2.3 V,
ICOM(OFF) or 2.7 V
VNC or VNO = 2.3 V, Full –1 1
COM VCOM = 0.5 V, Switch OFF,
OFF leakage μA
VNC or VNO = 2.7 V to 0, See Figure 7-2 25°C –0.7 0.02 0.7
current
VCOM = 0 to 2.7 V,
ICOM(PWROFF) or 0V
VNC or VNO = 0 to 2.7 V, Full –7.2 7.2
VCOM = 2.7 V to 0,
NC, NO VNC or VNO = 0.5 V or 2.3 25°C –2.1 0.03 2.1
INO(ON), Switch ON,
ON leakage V, 2.7 V μA
INC(ON) See Figure 7-3 Full –6 6
current VCOM = Open,
VNC or VNO = Open, 25°C –2 0.02 2
COM VCOM = 0.5 V,
Switch ON,
ON leakage ICOM(ON) or 2.7 V μA
See Figure 7-3 Full –5.7 5.7
current VNC or VNO = Open,
VCOM = 2.3 V,
Digital Control Inputs (IN1, IN2, EN)(1)
Input logic high VIH VI = V+ or GND Full 2.7 V 1.15 3.6 V
Input logic low VIL Full 2.7 V 0 0.55 V
25°C -0.1 0.01 0.1
Input leakage current IIH, IIL VI = V+ or 0 2.7 V μA
Full –2.1 2.1
Dynamic

VCOM = V+, CL = 35 pF, 25°C 2.5 V 17.2 36.8

Turn-on time tON ns
RL = 50 Ω, See Figure 7-5 Full 2.3 V to 2.7 V 42.5
25°C 2.5 V 17.1 29.8
–40°C
VCOM = V+, CL = 35 pF, 34.4
Turn-off time tOFF to 85°C ns
RL = 50 Ω, See Figure 7-5 2.3 V to 2.7 V
85°C to
38.4
105°C

Break-before- VNC = VNO = V+/2, CL = 35 pF, 25°C 2.5 V 4.5 13 30

tBBM ns
make time RL = 50 Ω, See Figure 7-6 Full 2.3 V to 2.7 V 33.3
VGEN = 0, CL = 0.1 nF,
Charge injection QC 25°C 2.5 V 0.47 pC
RGEN = 0, See Figure 7-10
NC, NO CNC(OFF), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 2.5 V 13.5 pF
OFF capacitance CNO(OFF) Switch OFF,
COM VNC or VNO = V+ or GND,
CCOM(OFF) See Figure 7-4 2.5 V 9 pF
OFF capacitance Switch OFF,

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6.6 Electrical Characteristics for 2.5-V Supply (continued)

V+ = 2.3 V to 2.7 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
NC, NO CNC(ON), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 2.5 V 22 pF
ON capacitance CNO(ON) Switch OFF,
COM VCOM = V+ or GND,
CCOM(ON) See Figure 7-4 25°C 2.5 V 22 pF
ON capacitance Switch ON,
Digital input
CI VI = V+ or GND See Figure 7-4 25°C 2.5 V 2 pF
capacitance
Switch ON,
Bandwidth BW RL = 50 Ω, 25°C 2.5 V 240 MHz
See Figure 7-6
RL = 50 Ω, Switch OFF,
OFF isolation OISO 25°C 2.5 V –62 dB
f = 10 MHz, See Figure 7-8
RL = 50 Ω, Switch ON,
Crosstalk XTALK 25°C 2.5 V –62 dB
f = 10 MHz, See Figure 7-9
RL = 50 Ω, Switch ON,
Crosstalk adjacent XTALK(ADJ) 25°C 2.5 V –71 dB
f = 10 MHz, See Figure 7-9
Total harmonic RL = 600 Ω, f = 20 Hz to 20 kHz,
THD 25°C 2.5 V 0.06 %
distortion CL = 50 pF, See Figure 7-11
Supply
25°C 0.01 0.1
–40°C
Positive 2
I+ VI = V+ or GND, Switch ON or OFF to 85°C 2.7 V μA
supply current
85°C to
3
105°C

(1) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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6.7 Electrical Characteristics for 1.8-V Supply

V+ = 1.65 V to 1.95 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch

ON-state 0 ≤ (VNC or VNO) ≤ V+, Switch ON, 25°C 7.1 14.4

ron 1.65 V Ω
resistance ICOM = –32 mA, See Figure 7-1 Full 16.3
ON-state 25°C 0.3 1
VNC or VNO = 1.5 V, Switch ON,
resistance match Δron 1.65 V Ω
ICOM = –32 mA, See Figure 7-1 Full 1.2
between channels
ON-state 25°C 2.7 5.5
0 ≤ (VNC or VNO) ≤ V+, Switch ON,
resistance ron(flat) 1.65 V Ω
ICOM = –32 mA, See Figure 7-2 Full 7.3
flatness
VNC or VNO = 0.3 V, 25°C –0.25 0.03 0.25
VCOM = 1.65 V,
INC(OFF),
or 1.95 V μA
INO(OFF) Full –5 5
VNC or VNO = 1.65 V,
NC, NO VCOM = 0.3 V Switch OFF,
OFF leakage
VNC or VNO = 1.95 V to 0, See Figure 7-2 25°C –0.4 0.01 0.4
current
VCOM = 0 to 1.95 V,
INC(PWROFF),
or 0V μA
INO(PWROFF) Full –7.2 7.2
VNC or VNO = 0 to 1.95 V,
VCOM = 1.95 V to 0,
VNC or VNO = 0.3 V, 25°C –0.4 0.02 0.4
VCOM = 1.65 V,
ICOM(OFF),
or 1.95 V μA
ICOM(OFF) Full –0.9 0.9
VNC or VNO = 1.65 V,
COM VCOM = 0.3 V
Switch OFF,
OFF leakage 25°C –0.4 0.02 0.4
VNC or VNO = 1.95 V to 0, See Figure 7-2
current
VCOM = 0 to 1.95 V, –40°C
ICOM(PWROFF), –5 5
or to 85°C 0V μA
ICOM(PWROFF)
VNC or VNO = 0 to 1.95 V,
85°C to
VCOM = 1.95 V to 0, –5.8 5.8
105°C
VNC or VNO = 0.3 V, 25°C –2 0.02 2
NC, NO VCOM = Open,
INO(ON), Switch ON,
ON leakage or 1.95 V μA
INC(ON) See Figure 7-3 Full –5.2 5.2
current VNC or VNO = 1.65 V,
VCOM = Open,
VNC or VNO = Open, 25°C –2 0.02 2
COM VCOM = 0.3 V,
Switch ON,
ON leakage ICOM(ON) or 1.95 V μA
See Figure 7-3 Full –5.2 5.2
current VNC or VNO = Open,
VCOM = 1.65 V,
Digital Control Inputs (IN1, IN2, EN)(1)
Input logic high VIH VI = V+ or GND Full 1.95 V 1 3.6 V
Input logic low VIL Full 1.95 V 0 0.4 V
25°C -0.1 0.01 0.1
Input leakage current IIH, IIL VI = V+ or 0 1.95 V μA
Full -2.1 2.1
Dynamic
25°C 1.8 V 14.1 49.3
VCOM = V+, CL = 35 pF,
Turn-on time tON 1.65 V to 1.95 ns
RL = 50 Ω, See Figure 7-5 Full 56.7
V
25°C 1.8 V 16.1 26.5
–40°C
VCOM = V+, CL = 35 pF, 31.2
Turn-off time tOFF to 85°C 1.65 V to 1.95 ns
RL = 50 Ω, See Figure 7-5
85°C to V
35.2
105°C
25°C 1.8 V 5.3 18.4 58
Break-before- VNC = VNO = V+/2, CL = 35 pF,
tBBM 1.65 V to 1.95 ns
make time RL = 50 Ω, See Figure 7-6 Full 58
V
VGEN = 0, CL = 1 nF,
Charge injection QC 25°C 1.8 V 0.21 pC
RGEN = 0, See Figure 7-10

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6.7 Electrical Characteristics for 1.8-V Supply (continued)

V+ = 1.65 V to 1.95 V, TA = –40°C to 105°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
NC, NO CNC(OFF), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 1.8 V 9 pF
OFF capacitance CNO(OFF) Switch OFF,
NC, NO CNC(ON), VNC or VNO = V+ or GND,
See Figure 7-4 25°C 1.8 V 22 pF
ON capacitance CNO(ON) Switch OFF,
COM VCOM = V+ or GND,
CCOM(ON) See Figure 7-4 25°C 1.8 V 22 pF
ON capacitance Switch ON,
Digital input
CI VI = V+ or GND See Figure 7-4 25°C 1.8 V 2 pF
capacitance
Switch ON,
Bandwidth BW RL = 50 Ω, 25°C 1.8 V 240 MHz
See Figure 7-6
RL = 50 Ω, Switch OFF,
OFF isolation OISO 25°C 1.8 V -60 dB
f = 10 MHz, See Figure 7-8
RL = 50 Ω, Switch ON,
Crosstalk XTALK 25°C 1.8 V -60 dB
f = 10 MHz, See Figure 7-9
RL = 50 Ω, Switch ON,
Crosstalk adjacent XTALK(ADJ) 25°C 1.8 V -71 dB
f = 10 MHz, See Figure 7-9
Total harmonic RL = 600 Ω, f = 20 Hz to 20 kHz,
THD 25°C 1.8 V 0.1 %
distortion CL = 50 pF, See Figure 7-11
Supply
25°C 0.01 0.1
–40°C
Positive 1.5
I+ VI = V+ or GND, Switch ON or OFF to 85°C 1.95 V μA
supply current
85°C to
2.5
105°C

(1) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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6.8 Typical Characteristics

7 8

6 7

6
ON-State Resistance, rON (W)

ON-State Resistance, rON (W)

5

5
4
4
3
3

2
2 85ºC
85ºC
25ºC
1 25ºC 1 -–40ºC
–40ºC
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 0.5 1.0 1.5 2.0 2.5
COM Voltage, VCOM (V) COM Voltage, VCOM (V)

Figure 6-1. ON-State Resistance vs COM Voltage (VCC = 3 V) Figure 6-2. ON-State Resistance vs COM Voltage (VCC = 2.3 V)
12 600

550

10 500
COM (OFF)
450 COM (ON)
ON-State Resistance, rON (W)

Leakage Current, II (nA)

8 400 NO (OFF)
NO (ON)
350

6 300

250

4 200

85ºC 150
25ºC
2 100
-–40ºC
50

0 0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 –40 25 85
COM Voltage, VCOM (V) Temperature, TA (°C)

Figure 6-3. ON-State Resistance vs COM Voltage (VCC = 1.65 V) Figure 6-4. Leakage Current vs Temperature (VCC = 3.3 V)
45 4.0

40
3.5
35
3.0
Output Voltage, VOUT (V)

30
Supply Current, I+ (nA)

2.5
25

20 2.0

15
1.5
10
1.0
5
INx = High
INx = Low 0.5
0

–5 0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Supply Voltage, V+ (V) Input Voltage, VIN (V)

Figure 6-5. Supply Current vs Supply Voltage Figure 6-6. Control Input Thresholds (IN1, TA = 25°C)

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6.8 Typical Characteristics (continued)

–10 –10

–20 –20

–30 –30

–40 –40
Magnitude (dB)

Magnitude (dB)
–50 –50

–60 –60

–70 –70
NO1TOCOM1-NO2 1.8 V
–80 NO1TOCOM1-NO3 2.5 V
–80
NO1TOCOM1-NO4
3.3 V
NO1TOCOM1-NO5
–90
NO1TOCOM1-NO6 –90

–100
–100
0.1 1 10 100 1000
Frequency (MHz) 0.1 1 10 100 1000
Frequency (MHz)
Figure 6-7. Crosstalk Adjacent
Figure 6-8. Crosstalk
0.11 –10

–20
0.10
–30
Total Harmonic Distortion, THD (%)

0.09 –40
Magnitude (dB)

1.8 V
–50
0.08 2.5 V

3.3 V –60

0.07 –70

1.8 V
–80
2.5 V
0.06
3.3 V
–90

0.05 –100
0.1 1 10 100 1000 0.1 1 10 100 1000
Frequency (Hz) Frequency (MHz)
Figure 6-9. Total Harmonic Distortion vs Frequency Figure 6-10. OFF Isolation
0 1

–2
0

–4
–1
–6
Charge Injection, QC (pC)

–2
Magnitude (dB)

–8

–10 –3

–12
–4

–14 1.8 V
2.5 V –5
–16 3.3 V
–6
–18

–20 –7
0.1 1 10 100 1000 0 0.3 0.6 0.9 1.2 1.5 1.8
Frequency (MHz) Bias Voltage (V)

Figure 6-11. Insertion Loss Figure 6-12. Charge Injection vs Bias Voltage (1.8 V)

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6.8 Typical Characteristics (continued)

2 4

2
0
0

–2
Charge Injection, QC (pC)

Charge Injection, QC (pC)

–2
–4

–4 –6

–8
–6
–10

–12
–8
–14

–10 –16
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.5 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.4 2.7 3.0 3.3
Bias Voltage (V) Bias Voltage (V)
Figure 6-13. Charge Injection vs Bias Voltage (2.5 V) Figure 6-14. Charge Injection vs Bias Voltage (3.3 V)

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7 Parameter Measurement Information

Table 7-1. Parameter Description
SYMBOL DESCRIPTION
VCOM Voltage at COM
VNC Voltage at NC
VNO Voltage at NO
ron Resistance between COM and NC or NO ports when the channel is ON
Δron Difference of ron between channels in a specific device
ron(flat) Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INC(OFF) Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF state
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON state and the output
INC(ON)
(COM) open
INO(OFF) Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
INO(ON)
(COM) open
ICOM(OFF) Leakage current measured at the COM port, with the corresponding channel (COM to NC or NO) in the OFF state
Leakage current measured at the COM port, with the corresponding channel (COM to NC or NO) in the ON state and the
ICOM(ON)
output (NC or NO) open
VIH Minimum input voltage for logic high for the control input (IN, EN)
VIL Maximum input voltage for logic low for the control input (IN, EN)
VI Voltage at the control input (IN, EN)
IIH, IIL Leakage current measured at the control input (IN, EN)
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation
tON
delay between the digital control (IN) signal and analog output NC or NO) signal when the switch is turning ON.
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation
tOFF
delay between the digital control (IN) signal and analog output (NC or NO) signal when the switch is turning OFF.
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NC or NO)
QC output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Charge injection, QC = CL × ΔVCOM, CL is the load capacitance and ΔVCOM is the change in analog output voltage.
CNC(OFF) Capacitance at the NC port when the corresponding channel (NC to COM) is OFF
CNC(ON) Capacitance at the NC port when the corresponding channel (NC to COM) is ON
CNO(OFF) Capacitance at the NC port when the corresponding channel (NO to COM) is OFF
CNO(ON) Capacitance at the NC port when the corresponding channel (NO to COM) is ON
CCOM(OFF) Capacitance at the COM port when the corresponding channel (COM to NC) is OFF
CCOM(ON) Capacitance at the COM port when the corresponding channel (COM to NC) is ON
CI Capacitance of control input (IN, EN)
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
OISO
frequency, with the corresponding channel (NC to COM) in the OFF state.
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (NC1 to NO1). Adjacent
XTALK crosstalk is a measure of unwanted signal coupling from an ON channel to an adjacent ON channel (NC1 to NC2) .This is
measured in a specific frequency and in dB.
BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of
THD root mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental
harmonic.
I+ Static power-supply current with the control (IN) pin at V+ or GND

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VCC

Ω
IN
+

Figure 7-1. ON-state Resistance (rON)

VCC

+ OFF-State Leakage Current

Channel OFF
+

IN
+

Figure 7-2. OFF-State Leakage Current (ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWROFF))

VCC

ON-State Leakage Current

+ Channel ON

IN
+

Figure 7-3. ON-State Leakage Current (ICOM(ON), INC(ON))

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VCC

VNO NO
Capacitance
Meter VBIAS = VCC or GND and
VI = VIH or VIL
COM COM Capacitance is measured at NO,
VBIAS COM, and IN inputs during ON
and OFF conditions.

Figure 7-4. Capacitance (CI, CCOM(OFF), CCOM(ON), CNC(OFF), CNC(ON))

VCC
TEST

50 Ω 35 pF

50 Ω 35 pF

IN

Logic VCC
Intput

Switch 90% 90%

Output

A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
B. CL includes probe and jig capacitance.

Figure 7-5. Turn-On (tON) and Turn-Off Time (tOFF)

VCC

VNC or VNO

NC or NO VCC

NC or NO

VOH

VNC or VNO = VCC

RL = 50 Ω
CL = 35 pF
A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.

Figure 7-6. Break-Before-Make Time (tBBM)

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VCC

Channel ON: NO to COM

50 Ω
VI = VIH or VIL

Network Analyzer Setup

IN Source Power = 0 dBM

Ω (632-mV P-P at 50-Ω load)
+ DC Bias = 350 mV

Figure 7-7. Bandwidth (BW)

VCC

Channel OFF: NO to COM

50 Ω
VI = VIH or VIL

Ω
Network Analyzer Setup

Source Power = 0 dBM

IN
(632-mV P-P at 50-Ω load)
Ω + DC Bias = 350 mV

Figure 7-8. OFF Isolation (OISO)

VCC

Channel ON: NC to COM

50 Ω NC Channel OFF: NO to COM
VI = VIH or VIL
NO

Ω Network Analyzer Setup

Source Power = 0 dBM

Ω IN
(632-mV P-P at 50-Ω load)
+ DC Bias = 350 mV

Figure 7-9. Crosstalk (XTALK)

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VCC

VCC
IN

xΔ

A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
B. CL includes probe and jig capacitance.

Figure 7-10. Charge Injection (QC)

Channel ON: COM to NO VI = VIH or VIL RL = 600 Ω

VSOURCE = VCC P-P fSOURCE = 20 Hz to 20 kHz CL = 50 pF

VCC

Audio Analyzer NO

600 Ω COM

IN
+

600 Ω

A. CL includes probe and jig capacitance.

Figure 7-11. Total Harmonic Distortion (THD)

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8 Detailed Description
8.1 Overview
The TS3A27518E-Q1 is a bidirectional, 6-channel, 1:2 multiplexer-demultiplexer designed to operate from 1.65
V to 3.6 V. This device can handle both digital and analog signals, and can transmit signals up to VCC in either
direction. The TS3A27518E-Q1 has two control pins, each controlling three 1:2 muxes at the same time, and
an enable pin that puts all outputs in high-impedance mode. The control pins are compatible with 1.8-V logic
thresholds and are backward compatible with 2.5-V and 3.3-V logic thresholds.
8.2 Functional Block Diagram
VCC

IN1
Logic
EN IN2

NC1
NO1 NC4
COM1 NO4
COM4
NC2
NO2 NC5
COM2 NO5
COM5
NC3
NC6
NO3
NO6
COM3
COM6

GND

Copyright © 2016, Texas Instruments Incorporated

8.3 Feature Description

The isolation in power-down mode, VCC = 0 feature places all switch paths in high-impedance state (High-Z)
when the supply voltage equals 0 V.
8.4 Device Functional Modes
The TS3A27518E-Q1 is a bidirectional device that has two sets of three single-pole double-throw switches.
Two digital signals control the 6 channels of the switch; one digital control for each set of three single-pole,
double-throw switches. Digital input pin IN1 controls switches 1, 2, and 3, while pin IN2 controls switches 4, 5,
and 6.
The TS3A27518E-Q1 has an EN pin that when set to logic high, it places all channels into a high-impedance or
HIGH-Z state. Table 8-1 lists the functions of TS3A27518E-Q1.
Table 8-1. Function Table
NC1/2/3 TO COM1/2/3, NC4/5/6 TO COM4/5/6, NO1/2/3 TO COM1/2/3, NO4/5/6 TO COM4/5/6,
EN IN1 IN2
COM1/2/3 TO NC1/2/3 COM4/5/6 TO NC4/5/6 COM1/2/3 TO NO1/2/3 COM4/5/6 TO NO4/5/6
H X X OFF OFF OFF OFF
L L L ON ON OFF OFF
L H L OFF ON ON OFF
L L H ON OFF OFF ON
L H H OFF OFF ON ON

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9 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

9.1 Application Information

The switches are bidirectional, so the NO, NC, and COM pins can be used as either inputs or outputs.
9.2 Typical Application
VCC
VCC VCC

NC1

COM1

NO1

NC2
COM2

NO2

NC3

COM3 SD/MMC Memory

Card
NO3

NC4

SDIO Port COM4

NO4

NC5
COM5

NO5

NC6

COM6

NO6

Digital Baseband or IN1, IN2, EN VCC

Apps Processor

TS3A27518

SDIO Peripheral
(Bluetooth, WLAN,
DTV, etc)

Copyright © 2016, Texas Instruments Incorporated

Figure 9-1. SDIO Expander Application Block Diagram

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9.2.1 Design Requirement

Ensure that all of the signals passing through the switch are within the recommended operating ranges to ensure
proper performance. For more information, see Section 6.3.
9.2.2 Detailed Design Procedure
The TS3A27518E-Q1 can operate properly without any external components. However, TI recommends
connecting unused pins to the ground through a 50-Ω resistor to prevent signal reflections back into the device.
TI also recommends that the digital control pins (INX) be pulled up to VCC or down to GND to avoid undesired
switch positions that could result from the floating pin.
For the RTW package connect the thermal pad to ground.
9.2.3 Application Curves
7

6
ON-State Resistance, rON (W)

85ºC
1 25ºC
–40ºC
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
COM Voltage, VCOM (V)

Figure 9-2. ON-State Resistance vs COM Voltage (VCC = 3 V)

10 Power Supply Recommendations

TI recommends proper power-supply sequencing for all CMOS devices. Do not exceed the absolute maximum
ratings, because stresses beyond the listed ratings can cause permanent damage to the device. Always
sequence VCC on first, followed by NO, NC, or COM. Although it is not required, power-supply bypassing
improves noise margin and prevents switching noise propagation from the VCC supply to other components. A
0.1-μF capacitor is adequate for most applications, if connected from VCC to GND.

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11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, TI recommends following these common printed-circuit board layout
guidelines:
• Bypass capacitors should be used on power supplies, and should be placed as close as possible to the VCC
pin
• Short trace-lengths should be used to avoid excessive loading
• For the RTW package, connect the thermal pad to ground
11.2 Layout Example
To System
= VIA to GND Plane

You may ground the

N.C pin or not
include a trace
NC1
N.C.

NC2

NC3

NC6
COM1 IN1 NC4

GND EN

COM2 NC5

COM3 NO5

0603 Cap Vcc NO4

COM4 NO6
COM6
COM5

NO1

NO2

NO3
IN2

Figure 11-1. WQFN Layout Recommendation

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12 Device and Documentation Support

12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, TS3A27518E-Q1 Functional Safety FIT Rate, FMD and Pin FMA report
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

12.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGING INFORMATION

Orderable part number Status Material type Package | Pins Package qty | Carrier RoHS Lead finish/ MSL rating/ Op temp (°C) Part marking
(1) (2) (3) Ball material Peak reflow (6)
(4) (5)

TS3A27518EIPWRQ1 Active Production TSSOP (PW) | 24 2000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 YL518EQ1
TS3A27518EIPWRQ1.B Active Production TSSOP (PW) | 24 2000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 105 YL518EQ1
TS3A27518EIRTWRQ1 Active Production WQFN (RTW) | 24 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 27518EI
TS3A27518EIRTWRQ1.B Active Production WQFN (RTW) | 24 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 105 27518EI
TS3A27518ETRTWRQ1 Active Production WQFN (RTW) | 24 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 105 27518ET
TS3A27518ETRTWRQ1.B Active Production WQFN (RTW) | 24 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 105 27518ET

(1)
Status: For more details on status, see our product life cycle.

(2)
Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance,
reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional
waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

(3)
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(4)
Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum
column width.

(5)
MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown.
Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

(6)
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Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two
combined represent the entire part marking for that device.

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makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative
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and other limited information may not be available for release.

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Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 23-May-2025

OTHER QUALIFIED VERSIONS OF TS3A27518E-Q1 :

• Catalog : TS3A27518E

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Sep-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS3A27518EIPWRQ1 TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
TS3A27518EIRTWRQ1 WQFN RTW 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2
TS3A27518ETRTWRQ1 WQFN RTW 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Sep-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS3A27518EIPWRQ1 TSSOP PW 24 2000 356.0 356.0 35.0
TS3A27518EIRTWRQ1 WQFN RTW 24 3000 356.0 356.0 35.0
TS3A27518ETRTWRQ1 WQFN RTW 24 3000 356.0 356.0 35.0

Pack Materials-Page 2
 PACKAGE OUTLINE
PW0024A SCALE 2.000
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

SEATING
PLANE
6.6 C
TYP
A 6.2
0.1 C
PIN 1 INDEX AREA
22X 0.65
24
1

2X
7.9 7.15
7.7
NOTE 3

12
13
0.30
24X
4.5 0.19 1.2 MAX
B
4.3 0.1 C A B
NOTE 4

0.25
GAGE PLANE
0.15
0.05

(0.15) TYP
SEE DETAIL A 0.75
0 -8 0.50
DETAIL A
A 20

TYPICAL

4220208/A 02/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.

www.ti.com
 EXAMPLE BOARD LAYOUT
PW0024A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

24X (1.5) SYMM

1 (R0.05) TYP

24X (0.45) 24

22X (0.65)
SYMM

12 13

(5.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 10X

SOLDER MASK METAL UNDER SOLDER MASK

METAL
OPENING SOLDER MASK OPENING

EXPOSED METAL EXPOSED METAL

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

NON-SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
15.000

4220208/A 02/2017
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
PW0024A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE

24X (1.5) SYMM

(R0.05) TYP
1
24X (0.45) 24

22X (0.65)
SYMM

12 13

(5.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE: 10X

4220208/A 02/2017
NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
 GENERIC PACKAGE VIEW
RTW 24 WQFN - 0.8 mm max height
4 x 4, 0.5 mm pitch PLASTIC QUAD FLATPACK - NO LEAD

This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.

4224801/A

www.ti.com
 PACKAGE OUTLINE
RTW0024B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK-NO LEAD

B 4.15 A
3.85

4.15
3.85

PIN 1 INDEX AREA

C
0.8 MAX
SEATING PLANE
0.05
0.00 0.08 C

2X 2.5 (0.2) TYP

EXPOSED
7 12 THERMAL PAD
20X 0.5
6 13

2X SYMM 25
2.45±0.1
2.5

1 18
24X 0.3
0.18
24 19
PIN 1 ID 0.1 C A B
(OPTIONAL) SYMM
0.05 C
24X 0.5
0.3

4219135/B 11/2016
NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.

www.ti.com
 EXAMPLE BOARD LAYOUT
RTW0024B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK-NO LEAD

( 2.45)

SYMM
24 19

24X (0.6)

1 18
24X (0.24)

(0.97)

SYMM 25
(3.8)

20X (0.5)

(R0.05)
6 13
TYP

(Ø0.2) TYP
VIA
7 12
(0.97)

(3.8)

LAND PATTERN EXAMPLE

SCALE: 20X

0.07 MAX
0.07 MIN SOLDER MASK
ALL AROUND
ALL AROUND OPENING
METAL

SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED SOLDER MASK
(PREFERRED) DEFINED

SOLDER MASK DETAILS

4219135/B 11/2016

NOTES: (continued)

3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).

www.ti.com
 EXAMPLE STENCIL DESIGN
RTW0024B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK-NO LEAD

4X( 1.08)
(0.64) TYP
(R0.05) TYP 24 19

24X (0.6)

25
1 18
(0.64)
24X (0.24)
TYP

SYMM
20X (0.5)
(3.8)

6 13

7 12
METAL
TYP SYMM

(3.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 25:

78% PRINTED COVERAGE BY AREA UNDER PACKAGE
SCALE: 20X

4219135/B 11/2016

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com
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