Experiment No.

1
DC Characteristics of Silicon Controlled Rectifier (SCR)

I. Objectives:
1. To determine the characteristics of SCR in DC Circuits
2. To draw the characteristic curve of the SCR

II. Introductory Information:

A member of the thyristor family, the SCR, is widely known for its numerous
applications ranging from switching to power control. Figure 1-1 shows the SCR symbol.
Just like the diode, the SCR conducts current in only one direction. To switch the device on,
the anode terminal (A) must be positive with respect to the cathode terminal (K). Leaving
the gate terminal open, the SCR needs a high anode cathode voltage for it to be turned on
(typical 100 V). Once the SCR turns on, current readily flows from the anode to the cathode.
The device remains in the ON state as long as the current IAK does not go below the SCR
holding current. Holding current is the minimum current that will sustain the SCR in the
ON state. If the current flowing from the anode to the cathode goes below the holding
current, then the SCR will revert back to the OFF state. This means that one way of
switching off an SCR in a given circuit, is by shorting the anode to cathode terminal. By
doing this, the current through the SCR will be reduced practically to zero. The SCR can also
be turned off when it is reverse biased i.e. the anode is negative with respect to the cathode.

A: Anode
G: Gate
A K K: Cathode
G K G A

Figure 1-1. SCR Symbol and Pin Configuration

Figure 1-2 shows the characteristic curve of the SCR. The graph can be analyzed by
imagining that a DC variable voltage is connected across the anode cathode terminal of the
SCR leaving the gate terminal open. Initially the output of the DC source is set at 0V. As one
starts to increase the output voltage of the DC source, there will come a time that the output
voltage will reach the SCR’s forward breakover voltage (FBV); at this condition, the SCR will
fire forcing current to flow from the anode to the cathode. As seen in Figure 1-2, the curve
at the first quadrant shows a linearly increasing voltage from the origin up to FBV2 with a
corresponding slight increase in current. The curve from the origin to FBV2 represents the
off state of the SCR. Ideally, the curve in the off state should be lying along the x axis; this is
because when the SCR is off, no current can flow from the anode to the cathode terminal. In
reality however, there are some leakage current flowing even when the SCR is off. The curve
from FBV2 going up represents the ON state of the SCR. Here, as soon as the voltage
between the anode and the cathode terminal reaches the SCR’s breakover voltage, the anode
shorts with the cathode causing a drastic decrease in the voltage drop across the SCR. This
explains the shift of the curve from right to left starting at the point corresponding to FBV2.
As for the current, one can see that it increases drastically in the ON state. Since the gate
terminal is open, IG2 is zero. The discussion so far presented applies to the analysis that the
gate terminal of the SCR is open. Typical forward breakover voltage to fire the SCR for this
1
condition is quite high. Some SCR fires at voltage values close to 100V or even more. If it is
desired to fire the SCR at a voltage much lower than 100V, then the gate terminal of the
SCR will have to be used. One characteristic of the SCR is that it can be fired even when its
anode cathode voltage is held at a low value (e.g. 10V) as long as sufficient current is applied
through its gate terminal. This is known as the gate triggering current. This means that as
long as the anode terminal is positive with respect to the cathode terminal, the SCR can fire
when a current greater than or equal to its gate triggering current is applied to its gate
terminal. Typical gate triggering current ranges from 20mA to 80mA [Boylestad, 1991]. The
graph shown in Figure 1-2 shows a curve corresponding to FBV1. Here the forward
breakover voltage of the SCR (FBV1) is less than the previous one discussed (FBV2). This is
due to the introduction of the gate current IG1 which can cause the SCR to fire at a lower
FBV reduced by inducing sufficient gate current into the device.
IAK
IG2>0

IG2=0
RBV
IHO
VAK

FBV1 FBV2

FBV: Forward Breakover Voltage

RBV: Reverse Breakdown Voltage
IHO: Holding Current

Figure 1-2. SCR Characteristic Curve

III. Materials:

Quantity Description
1 – SCR (2N5060) or equivalent
1 – DC Power Supply
2 – Digital VOM
1 – 220 kΩ Resistor
1 – 100 kΩ Resistor
1 – 50 kΩ Resistor
1 – 150 Ω Resistor
1 – 1.5 MΩ Potentiometer
1 – Miniature Lamp (12V)
1 – Breadboard
Connecting Wires

IV. Procedure

2
A. Testing the SCR
1. Switch the VOM to the Diode Test selector. Identify the cathode, anode and gate
terminals of the SCR.

2. Connect the negative terminal of the VOM to the anode and the positive terminal of the
VOM to the cathode.

3. Note the reading of the VOM and determine whether the Anode- Cathode (A-K)
terminal is open or shorted. Fill up the first row of Table 1-1.

Table 1-1: VOM Readings for Testing an SCR

Procedure A-K state
VOM+ VOM - Remarks
No. (open or short)
3 gate is always open
cathode Anode (1st row starts here)

4 after gate is momentarily

cathode Anode
shorted to ( - )
5 after gate is momentarily
cathode Anode
shorted to (+)
7 gate is always open
anode Cathode

8 after gate is momentarily

anode Cathode
shorted to ( - )
9 after gate is momentarily
anode Cathode
shorted to (+)

4. Without removing any of the connections in #2, momentarily short the gate terminal of
the SCR to the negative terminal of the VOM and then disconnect the shorting so that
the gate terminal is left unconnected again. Note the state of the A-K terminal (open or
shorted). Fill up the second row of Table 1-1.

5. Without removing any of the connections resulting from #4, momentarily short the gate
terminal of the SCR to the positive terminal of the VOM and then disconnect the
shorting so that the gate terminal is left unconnected again. Note the state of the A-K
terminal (open or shorted). Fill up the 3rd row of Table 1-1.

6. Reverse the connection of the VOM by connecting this time, the positive terminal to the
anode and the negative terminal to the cathode.

7. Note the A-K state and fill up the 4th row of Table 1-1.

3
8. Without removing any of the connections in #6, momentarily short the gate terminal of
the SCR to the negative terminal of the VOM and then disconnect the shorting so that
the gate terminal is left unconnected again. Note the state of the A-K terminal (open or
shorted). Fill up the 5th row of Table 1-1.

9. Without removing any of the connections resulting from #8, momentarily short the gate
terminal of the SCR to the positive terminal of the VOM and then disconnect the
shorting so that the gate terminal is left unconnected again. Note the state of the A-K
terminal (open or shorted). Fill up the 6th row of Table 1-1.

10. Examine the results of Table 1-1, a shorted reading indicates that the SCR has fired or
has turned “ON”. When did this happen?

__________________________________________________________________

11. When the SCR fires and the gate terminal is left open afterwards, will the SCR remain in
the “ON” state?

____________________________________________________________________

12. Disconnect everything and get ready for the SCR performance characteristics in DC
circuits.

B. Characteristic Curve of the SCR

13. Connect the circuit as shown in Figure 1-3 with R2 set at 100 kΩ.

14. Make sure that the supply voltage Vs, is 0V and that the fine knob of the power supply is
also set to minimum.

15. Connect an analog voltmeter across the A-K terminal of the SCR and another voltmeter
across the power supply itself.

16. Switch on the DC Supply and slowly increase its output (NOTE: YOU HAVE TO DO
THIS VERY SLOWLY). Note that initially, as DC supply increases, the Analog
voltmeter reading connected across the SCR also increases. Increase the DC supply until
the analog voltmeter across the SCR suddenly drops in reading.

4
 220k Lamp

A
VS R2

K
G

SCR Triggering using Resistor

Figure 1-3

17. Note down the supply voltage Vs,and the A-K voltage VAK.

18. Solve for the gate triggering current, IGT using the equation below:

Vs = IGT (220,000 + R2) +0.7

19. Disconnect one of the VOMs and connect it across the lamp. Note down its voltage.

20. Fill up the first row of Table 1-2. If you are sure with your results otherwise repeat steps
14 to 19 at least once to verify the consistency of your data.

21. Reduce the output of the power supply, Vs to 0V and turn off the power supply.

22. Change the value of R2 to the following values (one at a time) and repeat steps 14 to 19.

R2 = 50KΩ
R2 = 0Ω

Fill up the subsequent rows of Table 1-2. Note: Don’t forget to “zero” the power
supply and then turn it off after each trial.

23. Turn off the power supply and connect the circuit as shown in Figure 1-4. Note that
the potentiometer is adjusted to minimum so that the resistance between x and y is zero
or near zero.

5
 220 k Lamp
A

G
VS K
x
R2

Circuit for Determining I GT

Figure 1-4

Table 1-2: Comparison of IGT Values for Different values of R2

Vs VR2 IGT
R2=100k 
R2 = 50 k
R2 =0 

24. Connect a voltmeter across the A-K terminal of the SCR. Make sure that the DC supply
is OFF and the knob is fully turned to minimum.

25. Switch ON the supply and slowly increase the output while monitoring the VOM.
Initially, as the supply increases, the VOM reading also increases. Continue increasing the
supply very slowly until the VOM registers a sudden drop in voltage across A-K. At this
point, the VOM should register a voltage less than 1 volt. Note down the value of the
supply voltage, Vs.

26. Slowly adjust the potentiometer while carefully monitoring the VOM. Adjust the
potentiometer very slowly until the VOM reading suddenly shoots up to a value greater
than 1V. The value of the potentiometer resistance that results from this step is important in determining
the approximate value of the SCR’s holding current. If by chance, you think you committed
some errors in performing this step or you adjusted the potentiometer too fast, you may
want to try again by going back to step # 25.

27. Turn off the power source; remove the potentiometer from the circuit and measure its
resistance, RP.

6
28. Calculate the approximate value of the SCR’s holding current, IHO using the equation
below:
Vs = IHO (150 + RP ) + 0.7

Guide Questions and Analysis:

1. Draw the characteristic curve of the SCR based on the results obtained from this
experiment.

2. Cite the different ways of turning off an SCR once it has fired.

3. Can an SCR be fired without using the gate terminal?

4. Why is it necessary to switch off the supply after every trial in this experiment?

7
 Experiment No. 2
SCR in AC Circuits

I. Objectives:
1. To determine the behavior of the SCR in an AC circuit.
2. To use the SCR in controlling the power across a given load.
3. To study the different ways of increasing the firing angle of the SCR.

II. Introductory Information:

Power control using an SCR is realized by controlling its gate current. Figure 2-1a
shows a sample circuit. Here the SCR’s gate terminal is connected to a variable resistor
R2. Since the power source is AC, the voltage across the resistor R2 is also sinusoidal
varying. This means the voltage across R2 varies from 0 to a maximum value then back to
zero for every cycle of the input signal. If gate triggering current for the SCR in this
circuit is 30mA and R2 is set to 1 ohm, then the instantaneous value of the voltage across
R2 must reach 30mV for the SCR to fire. Take note that this is a purely resistive circuit;
this means the sinusoidally varying voltage across R2 is synchronized with the input
voltage. For simplicity purposes, if the peak voltage across R2 is 300mV, then the SCR
fires at a very early stage of the positive half cycle. This is shown in Figure 2-1b. The
portion of the sine wave from 0 up to the 300 mV voltage value represents the firing
angle of the SCR. Note that once the SCR has fired, the remaining portion of the positive
half cycle is developed across the load. This is obviously seen in Figure 2-1a; with the
SCR in the ON state, the load is practically connected across the voltage source. If R2 is
now set to 10 ohms, then the instantaneous voltage across R2 must reach 300mV for the
SCR to fire. This makes the firing angle of the latter case greater than the firing angle of
the former case. Figure 2-1b gives a clear illustration. As seen from the figure, if the
firing angle is increased, then the net voltage developed across the load is decreased.
Since power is function of the voltage and the current, then a change in firing angle
results to a corresponding change in the power across the load. Increasing the firing angle
decreases the power across the load. The circuit just presented however, can only limit
the maximum firing angle up to 90 degrees. This is because at 90 degrees, the gate
current reaches its maximum value; if the SCR does not fire at this angle there won’t be a
chance for it to fire anymore since the current will have to start decreasing.

8
 R1
LOAD

A
R2
VIN=Vsin
K
G

Figure 2-1a. SCR Power Control Using a Purely Resistive Load

VIN

300 mV
30 mV
VR2

VAK

VLOAD

VAK

VLOAD

Figure 2-1b. Waveforms Across the SCR and

the Load for Different Values of R2

Figure 2-2 shows a way of increasing the SCR firing angle beyond 90 degrees
[Maloney, 1987]. By inserting a capacitor between the gate cathode terminal, the
9
capacitor provides delay before it charges up to positive 0.7 V required to fire the SCR.
Moreover, everytime the capacitor starts the positive half cycle, it has to spend some
time discharging the accumulated charge in the previous (negative) half cycle. This
constitutes a delay d in the signal across the capacitor with respect to the input signal.
This delay can cause the firing angle to go beyond 90 degrees.

Lamp
R A
SCR
Vsin G K

SCR Triggering using a Capacitor

Figure 2-2

III. Materials Required:

Quantity Description
1 – Dual Trace Oscilloscope
1 – 220 : 3 – 4.5 – 6 – 7.5 – 9 – 12 Transformer
1 – 2N5060 SCR
1 – 1MΩ Resistor
1 – 10kΩResistor
1 – 1kΩ Resistor
1 – 50 kΩ Potentiometer
1 – 1uF/50V Capacitor
2 – 0.1uF/50V Capacitor
1 – Breadboard
Connecting Wires

IV. Procedure:

1. Connect the circuit as shown in Figure 2-3. Adjust the potentiometer such that the
resistance points 2 and 1 is 0Ω. Comment on the condition of the lamp (on or off).

10
 Lamp
R1
10 k A
2N5060
12 V G K
2

R2
50 k
1

SCR Triggering using Pure

Resistors
Figure 2-3

Condition of Lamp: ______________

2. Measure the voltage across the lamp, and the voltage across anode-cathode terminal
of the SCR.

VLAMP = ______ volts

VAK = ______ volts

3. Connect the probe of the oscilloscope across the SCR. Sketch the waveform as
viewed from the oscilloscope.

Graph 2-1

4. Disconnect the probe connected across the SCR and connect it across the lamp. Draw
the waveform as viewed from the oscilloscope.

11
 Graph 2-2

5. Slowly adjust the potentiometer until the lamp lights up. Make sure that the lamp is in
its dimmest possible condition. Sketch the waveform across the SCR and the lamp.
Measure approximately, the firing angle of the SCR, as viewed from the oscilloscope.
Measure also the voltage across the lamp using a voltmeter.

Graph 2-3

Firing Angle = ______________

VLAMP = __________V

6. Slowly adjust the potentiometer until the lamp gets brighter. Sketch the waveform
across the SCR and the lamp. Measure also the voltage across the lamp using a
voltmeter..

12
 Graph 2-4

VLAMP = ________ V

7. Connect the circuit of Figure 2-4. Repeat step 5

R1
10 k

R2
50 k
12V 2N5060

0.1uF

Figure for Procedure #7

Figure 2-4

13
 Graph 2-5

Firing Angle = ______________

VLAMP = __________V

8. Repeat step 6.

Graph 2-6

VLAMP = __________V

9. Connect the circuit of Figure 2-5. Repeat step 5.

14
 R1
10 k

R2
50 k
12V 2N5060

R3
C1 1k
0.1uF

SCR Tiggering using

Capacitor w/ series
Resistor
Figure 2-5

Graph 2-7

Firing Angle = ______________

VLAMP = __________V
10. Repeat step 6.

15
 Graph 2-8

VLAMP = __________V

11. Connect the circuit of Figure 2-6. Repeat step 5.

R1
10 k

R2
50 k
12V 2N5060

R3
C1 1k C2
0.1uF 0.1 uF

Circuit for Procedure #11

Figure 2-6

Graph 2-9

Firing Angle = ______________

16
 VLAMP = __________V

12. Repeat step 6.

Graph 2-10

VLAMP = __________V

13. Connect the circuit of Figure 2-8. Repeat step 5.

R1
10 k

R2
50 k
12V 2N5060

C1
1 uF

SCR Triggering using a higher

value of Capacitor
Figure 2-7

17
 Graph 2-11

Firing Angle = ______________

VLAMP = __________V

14. Repeat step 6.

Graph 2-12

VLAMP = __________V

Guide Questions:

1. The maximum firing angle for all the circuits presented in this experiment is obtained
when the lamp is in its dimmest possible condition. Give a discussion on the
maximum firing angle of each of the circuit in this experiment and explain whey they
are not equal.

2. The capacitor is used to delay the firing angle of the SCR. Explain how this works.

18
 Experiment No. 3
TRIAC Performance Characteristics

I. Objectives :
1. To determine the gate triggering current values of the TRIAC for various modes of
operation.
2. To observe the TRIAC’s performance for various triggering circuits.

II. Introductory Information:

The triac is another member of the thyristor family. Just like the SCR, the triac is a
3-terminal device. Figure 3-1 shows the symbol for the triac. As seen from the figure, the
triac has 2 main terminals (MT1 and MT2) and 1 gate terminal (G). Unlike the SCR however,
the triac is bidirectional. When the triac fires, current flows from the more positive terminal
to the less positive terminal.
MT1

MT1: Main Terminal 1

G MT2 MT2: Main Terminal 2 MT1 MT2 G
G: Gate Terminal

Figure 3-1. Triac Symbol and Pin Assignment

IMT1MT2

-VBO

VMT1MT2
VBO

Figure 3-2. Triac Characteristic Curve

The triac’s firing angle is controlled by the introduction of sufficient current to its
gate. Just like the SCR, the triac has its own gate triggering circuit. Figure 3-2 shows the
characteristic curve of the TRIAC [Maloney, 1987]. Practical considerations on the triac

19
reveals that the breakover voltage in the first quadrant may not be the same as the breakover
voltage in the third quadrant. As a matter of fact, the gate triggering current are not the same
for both cases. In comparison to the SCR, when triac is used to control the power across a
given load, the voltage drop across the load becomes AC rather than pulsating DC. Figure
3-3a shows a typical triac power control circuit and Figure 3-3b shows the characteristic
waveforms developed across the load and across the triac [Maloney, 1987].

R1
Load

R2
Vsin 

Figure 3-3a. Triac Power Control Circuit

VIN

VMT1MT2

VLOAD

Figure 3-3b. Voltage Waveforms Across the Triac and Across the
Load

20
III. Materials:

Quantity Description
1 - Diode 1N4001
1 - miniature lamp 12V
1 - Dual Trace oscilloscope
1 - Electronic VOM
1 - Variable Transformer 220:3-45-6-7.5-9-12
1 - Breadboard
2 - DC Supplies
1 - TRIAC (2N6342)
1 - 2N4991 SBS
Resistors:
1 - 4.3 kΩ
1 - 1 kΩ
1 - 50 kΩ potentiometer
Capacitors
1 - 10 uF
Connecting Wires

III. Procedure:

A. Getting IGT for various modes of operation:

1. Construct the circuit of Figure 3-4. VSI must be set to 0V. Make sure that the fine
knob of VSI is also set to minimum. VS2 is set to 7 V. After setting the 2 DC supplies,
turn off the power supplies while connected to the circuit.

2. Turn on both DC Supplies. Slowly adjust VS1 until the lamp lights up. (Note: you must
do this very slowly . Care should be taken that no further adjustments should be made
as soon as the lamp lights up).

3. Record the value of VS1 in Table 3-1.

4. Calculate the value of IGT using the equation:

VS1 =IGT * 4300 + 0.7

Table 3-1 : IGT for Various Quadrants of Operation

Procedure No. Gate MT2 MT1
VS1 IGT
Polarity Polarity Polarity
5 + + -
8 - + -
10 - - +
12 + - +

21
5. Record the computed value of IGT .

6. Reduce VS1 to 0V and turn off both power supplies.

7. Reverse the polarity of VS1 such that the negative terminal is now connected to the
TRIAC and the positive terminal is now connected to the ground.

8. Repeat steps 2 to 6.

9. Reverse the polarity of VS2 so that the negative terminal is now connected to main
terminal 2 of the TRIAC while the positive terminal is connected to the ground.

10. Repeat steps 2 to 6.

11. Reverse the polarity of VS1 so that the positive terminal is connected to the gate and the
negative terminal is connected to the ground.

12. Repeat steps 2 to 6.

4.3 k

VS1 VS2

Circuit for Determining I GT for

Various Quadrants of Operation
Figure 3-4

B. Observing the performance of the TRIAC for different triggering circuits:

13. Construct the circuit of Figure 3-5. Slowly adjust the potentiometer (clockwise or
counterclockwise) until the lamp is in its dimmest condition.

22
 1k

9V AC

50 k

TRIAC Triggering on a Purely

Resistive Network
Figure 3-5
14. Connect the oscilloscope across the MT2-MT1 terminals of the TRIAC. Sketch the
waveform as viewed from the oscilloscope and note the firing angle for both the positive
and negative half cycle.

Graph 3-5

Firing Angle (positive half cycle) :______________

Firing Angle (negative half cycle):______________

15. Record your data.

16. Slowly adjust the potentiometer until the lamp becomes a bit brighter (Take care not to
adjust the lamp to its brightest condition).

17. Sketch the waveform as viewed from the oscilloscope. Connect the circuit as shown in
Figure 3-6.

23
 Graph 3-5

Firing Angle (positive half cycle) :______________

Firing Angle (negative half cycle):______________

1k

9V AC
50 k

10uF

Triac Triggering using RC

Figure 3-6
18. Slowly adjust the potentiometer (clockwise or counterclockwise) until the lamp is in its
dimmest condition.

19. Connect the oscilloscope across the MT2-MT1 terminals of the TRIAC. Sketch the
waveform as viewed from the oscilloscope and note the firing angle for both the positive
and negative half cycle.

24
 Graph 3-5

Firing Angle (positive half cycle) :______________

Firing Angle (negative half cycle):______________

20. Record your data

21. Connect the circuit of Figure 3-7. Note that the gate of the SBS is left open and the
potentiometer used is still 50 kΩ.

1k

6V AC

50 k

Triac Triggering using SBS

Figure 3-7
22. Slowly adjust the potentiometer until the lamp is in its dimmest condition.

23. Note down the maximum firing angle at this point and record your data.
24. Slowly adjust the potentiometer until the lamp turns off. (Note that you must do this
slowly).

25. Turn off the supply and connect the diode to the SBS such that the anode is connected
to the gate of the SBS while the cathode is connected to the positive terminal of the
power supply.

26. Turn on the supply and connect the oscilloscope across the MT2-MT1 terminals of the
TRIAC. Sketch the waveform as viewed from the oscilloscope.

25
 Graph 3-5

27. Turn off the power supply and reverse the connection of the diode with the cathode this
time connected to the gate of the SBS while the anode is connected to the positive
terminal of the supply.

28. Turn on the supply and sketch the waveform as viewed from the oscilloscope.

29. Comment on the role of the diode in this circuit.

26
 Experiment No. 4
The Unijunction Transistor (UJT)

I. Objectives:
1. To draw the characteristic curve of the UJT
2. To study the behavior of the UJT in a relaxation oscillator

II. INTRODUCTORY INFORMATION:

The UJT is an example of triggering device with 3 terminals namely the emitter (E),
base1 terminal (b1) and base2 terminal (b2). Figure 4-1 shows the symbol for UJT. In
operation, the UJT works like a switch.

B2

E
B1 B1 E B2

Figure 4-1. UJT Symbol and Pin Assignment

Initially, under “power off” condition, there is a high impedance between the base1
terminal (b1) and the emitter (E). To trigger the UJT, the emitter to base1 voltage must reach
a certain voltage value known as the Peak Voltage, VP. The formula for VP is [Maloney,
1987]:
VP = η*Vb2b1 + 0.7
where η is the intrinsic standoff ratio of the UJT and Vb2b1 is the base2 to base1 voltage.

rB2

rB1

Figure 4-2. UJT Equivalent Ckt.

27
 Figure 4-2 shows the equivalent circuit of the UJT. Notice the diode between the
emitter and the base terminals. “rB1 and rB2” represent the internal resistances of the UJT. By
considering the loop comprising the emitter, the diode and rB1, the voltage Veb1 becomes:
Veb1 = Vd + Vrb1
But by voltage divider equation, Vrb1 is:
rB1
Vrb1  Vb 2 b1
rB1  rB2 
so that::
rB1
Veb1  Vd  Vb 2 b1
rB1  rB2 
Vd is the voltage across the diode which is typically set to 0.7.
So that:
rB1
Veb1  0.7  Vb 2 b1
rB1  rB2 
To fire the UJT, Veb1 must reach VP; by comparing the first and last equations, it is inferred
rB1

rB1  rB2 
that:

Veb1
VP

VV

IP IV IEb1

Figure 4-3. UJT Characteristic Curve

Figure 4-3 shows the characteristic curve of the UJT. As can be seen, the UJT fires
once the emitter to base1 voltage reaches VP and at the same time the current through the
emitter reaches IP. The drastic drop in the voltage between the emitter and b1 terminal is
brought about by the shorting of the emitter to the base1 terminal.
On the other hand, turning off the UJT requires that the voltage between the emitter
and base1 terminal goes below the so called valley voltage (VV) and that the current between
the aforementioned terminal be below the valley current. Note also that the valley current is
greater than the peak current. One sample application of the UJT is the UJT relaxation
oscillator. Figure 4-4 shows the circuit. In this case, when the power supply VS is turned on,

28
the capacitor starts charging until it reaches VP. At VP, the UJT turns on, allowing current to
flow from the emitter to base1 terminal. At this point, the capacitor starts discharging until it
goes below the valley voltage which eventually turns off the UJT. At this point, the capacitor
starts charging again until the UJT turns on once more. What happens here is a series of on-
off states of the UJT and the charge-discharge action of the capacitor [Maloney, 1987].
VS

Re R2

Ce
R1

Figure 4-4. UJT Relaxation Oscillator

III. Materials:

Quantity Description
2 - DC Supplies
1 - MU2646 UJT
1 - Oscilloscope
2 - VOMs
1 - Breadboard
Connecting Wires
Resistors:
1 - 1 kΩ
1 - 50 kΩ
1 - 100 kΩ
1 - 500 Ω
1 - 100 Ω
1 - 1.5 MΩ potentiometer
Capacitors:
1 - 0.1 uF

iv. Procedure:
1. Note down the approximate value of the lamp resistance (Rlamp) and then connect the
circuit as shown in Figure 4-5.

29
 1k
E B2 VS2
VS1 B1

Circuit for Determining Vp

Figure 4-5

2. VS1 and VS2 are set to 0V. Make sure that the fine knob of VS1 is also set to minimum.
Both supplies must be initially switched OFF.

3. Connect an analog VOM across the B2-B1 terminal of the UJT. Switch on VS2 and
slowly adjust its value until the voltmeter reads 5V. Record the value of VS2 on the first
row of Table 4-1.

Table 4-1: Determining the Value of η

Procedure Lamp Condition
VS1 VB2B1 VS2
No. (On or OFF)
3 0V 5
5 <<1 same
9 Close to 5V same

4. Turn ON VS1. Slowly increase its value until the analog voltmeter connected across B2-
B1 terminals suddenly deflects backward.

5. Record the value of VS1 and determine the state of the lamp. Fill up the 2nd row of
Table 4-1.

6. Using the equation below, compute for the value of the UJT's intrinsic standoff ratio.

VS1  0.7

5

7. Solve for the value of rBB using the equation below:

VS2 5

( rBB  1 k ) rBB

8. Slowly decrease the value of VS1 until the VOM connected to the B2 and B1 terminals
registers close to 5V again.

30
9. Note down the value of VS1 and record your data on Table 4-1.

10. Connect the circuit of Figure 4-6.

VS=12V

R2
Re 500
100 k

Ce
R1
0.1uF
100

UJT Relaxation Oscillator

Figure
Figure4-6
4-6

11. Connect the oscilloscope across the capacitor. A sawtooth waveform must appear on
the scope screen.

12. Measure the value of the capacitor's peak voltage, VP and the frequency of oscillation.

13. Measure the value of the capacitor’s minimum voltage, VV as viewed on the oscilloscope
screen.
14. Solve for the VB2B1 using the equation:

VB 2 B1 VS

rBB rBB  R 1  R 2 
Note: The value of rBB is the value obtained in step #7

15. Solve for the intrinsic stand off ratio using the equation:


VP  0.7
VB 2 B1

Note: VP is the peak capacitor voltage obtained in step #14

16. Compare the value of s obtained in steps 6 and 16. Are they equal? If not, find the %
difference.

17. Connect the oscilloscope across R1 and sketch the output waveform.

31
 Graph 4-1

18. Connect the oscilloscope across the B2 terminal of the UJT (don't include R2) and
sketch the output waveform.

Graph 4-2

19. Turn off the supply and change the value of Re to 50 kΩ.
20. Turn on the power supply and connect the oscilloscope across the capacitor.

21. Measure the frequency of oscillation.

22. Connect the oscilloscope across R1 and sketch the output waveform.

32
 Graph 4-3

23. Connect the oscilloscope across the B2 terminal of the UJT (don't include R2) and sketch
the output waveform.

Graph 4-4

24. Turn off the power supply and replace Re with the potentiometer. The potentiometer
should be adjusted close to midrange value before it is connected to the circuit.

25. Connect the oscilloscope probe across the capacitor.

26. Slowly adjust the potentiometer by increasing its resistance until the sawtooth waveform
disappears.

27. Turn off the supply and pull out the potentiometer from the circuit. Measure its value
and record the value in Table 4-2 as Rmax.

28. Using the value of Rmax in #27 and the value of VP in #12. Solve for the value of Ip
using the equation:

VS  VP
R MAX 
IP

33
29. Adjust the potentiometer to midrange value and connect it back to the circuit.

30. Connect the oscilloscope probe across the capacitor.

31. Slowly adjust the potentiometer by decreasing its resistance until the sawtooth
waveform disappears

32. Turn off the supply and pull out the potentiometer from the circuit. Measure its value
and record the value in Table 4-2 as Rmin.

33. Using the value of Rmin in # 32 and the value of VV in # 13, solve for the value of IV
using the equation:
V  VV
R MIN  S
IV

Table 4-2: Limiting Values of Re

Rmax
(Measured)
Rmin
(Measured)
Ip
(computed)
Iv
(computed)

Guide Questions:

1. In a UJT relaxation oscillator, what is the effect of the voltage supply to the frequency of
the circuit?

2. How does one alter the frequency of the UJT relaxation oscillator?

34
 Experiment No. 5
Photoconductive Cell Characteristics

I. Objectives:
1. To determine the behavior of the photocell in an SCR circuit.
2. To measure the varying resistance of the photocell in response to changes in light
intensity.

II. Introductory Information:

Photocells are devices whose outputs vary in response to changes in light
intensity. There are 2 types of photocells: photovoltaic and photoconductive. The
photovoltaic cell acts like a voltage source. This device changes its voltage output in
response to changes in light intensity. Figure 5-1 shows a typical voltage vs light
intensity curve for this type of photocell [Maloney, 1987]. The graph shows the voltage
output across a sample photovoltaic cell vs the light intensity focused on it.

Output Voltage
of the Photocell (V)

0.3

0.2

0.1
Light Intensity
(foot candles)

1 10 100 1000 10000 100000

Figure 5-1. Characteristic Curve of a Photovoltaic Cell

The photoconductive cell, on the other hand, produces a variation in its resistance in
response to changes in light intensity. Figure 5-2 shows the resistance vs light curve for
this type of photocell. Notice that as the light intensity increases, the resistance of the
photocell decreases. There are various applications for the photocell. Some of them are:
1. Sensing the presence of an opaque object.
2. Sensing the degree of translucence of objects.
Typical applications concerning these actually require a light source aimed at the receiving
photocell. An opaque object is detected once it blocks the light being received by the
photocell. For the degree of translucence, the light is allowed to pass through a translucent

35
object. The emerging light is then received by a photocell. The amount of light received
measurers the degree of translucence of the object.
Photocell Resistance,


1M

100 K
10 K
1K

Illumination
(foot candles)

100
0 0.01 0.1 1 10 100 1000
Figure5-2. Characteristic Curve of a Photoconductive Cell

III. Materials:

Quantity Description
1 - SCR (2N5060 or equivalent)
1 - Photocell
1 - Lamp (12V)
1 - Variable AC source
1 - Oscilloscope
1 - VOM
1 - Breadboard
Connecting Wires
Resistors:
1 - 1 kΩ
1 - 100 Ω
1 - 50 kΩ potentiometer
Capacitor:
1 - 1 uF

IV. Procedure:

1. Note: For this experiment, you must use only 1 oscilloscope probe. Connect the 12V
miniature lamp to a 12V ac source. Focus the light of the lamp onto the photocell.

2. Using a VOM, measure the resistance of the photocell.

3. Decrease the voltage applied across the lamp from 12V to:
36
 a) 7.5V
b) 9.0V
c) 6.0V
d) 4.5V
e) 3.0V
and get the corresponding resistance of the photocell.

4. Construct the circuit of Figure 5-3.

LDR
R=500
A
9Vac SCR
K
G
1uF

Triggering an SCR using a

Photocell
Figure 5-3

5. Cover the photocell.

6. Connect the oscilloscope probe across the anode cathode terminal of the SCR and
graph the output waveform.

7. Remove the cover from the photocell, observe any changes in the waverform across
the anode cathode terminal of the SCR.

8. Focus a bright light (miniature lamp connected to 12V source) onto the photocell.
Monitor the firing angle of the SCR. Sketch the waveform as viewed from the
oscilloscope.

37
 Graph 6-1

9. Decrease the intensity of the light source in accordance with the different voltage
applied to it as listed in step #3. Monitor and sketch the waveform across the SCR for
each case. Record the firing angle.

Graph 6-2

Guide Questions:

1. What is the effect of decreasing the light intensity, focused onto the photocell, on the
firing angle of the SCR in the above circuit?

2. Aside from a photocell, name 3 other photo-sensitive devices and give a distinction of
one over the other.

38
 Experiment No. 5
Photoconductive cells and Relays

I. Objectives:
1. To be familiar with the function of relays.
2. To learn some applications of relays
3. To measure the varying resistance of the photocell in response to changes in
light intensity

II. Introductory Information:

The photoconductive cell produces a variation in its resistance in response to changes in

light intensity. Figure 5-2 shows the resistance vs light curve for this type of photocell.
Notice that as the light intensity increases, the resistance of the photocell decreases.
There are various applications for the photocell. Some of them are:
3. Sensing the presence of an opaque object.
4. Sensing the degree of translucence of objects.
Typical applications concerning these actually require a light source aimed at the receiving
photocell. An opaque object is detected once it blocks the light being received by the
photocell. For the degree of translucence, the light is allowed to pass through a translucent
object. The emerging light is then received by a photocell. The amount of light received
measurers the degree of translucence of the object.
Photocell Resistance,


1M

100 K
10 K
1K

Illumination
(foot candles)

100
0 0.01 0.1 1 10 100 1000
Figure5-2. Characteristic Curve of a Photoconductive Cell

Relays are very important for the industrial electronics of today. They are used as
actuators, as control load currents, and as protective devices, for switching and for circuit
breakers. Protective relays are used as circuit breakers. When there is an excess of current in
the circuit, the circuit breaker removes its shorted contacts so as not to harm any other
devices in the circuit. They may also be used as an indicating relay or signaling relay. When a
part of the circuit breaks down, the relay connected with a lamp or buzzer will indicate the
failed region.

39
 Relays are electromagnetically operated devices. A relay consists of a core with a
coil, an armature, and contacts. Basically, there are two types of contacts. They are the
normally-open contacts and the normally-closed contacts. For the normally-open
contacts, when the relay coil is energized, the contacts will then close, thus closing the
circuit connected to the contacts. On the other hand, when the coil is energized for the
normally-closed contacts, the contacts will open thus having an open circuit. These types
of connection is usually used for indicating devices or signaling devices. There are four
types of connections of the relay. The first is a single-pole single-throw relay (SPST), the
second is the single-pole double-throw (SPDT), the third is the double-pole single-throw
(DPST) and the last is the double-pole double-throw relay (DPDT).
For this experiment, the students will use the relay type of SPDT, when the pull-
in current is achieved, current will energize the coil and produce a magnetic field in the
core of the relay. When this happens, the armature of the relay will be attracted to the
core. Now depending on the orientation of the relay contacts, the relay will either close
the normally-open terminals or open the normally-closed contacts. In the circuit, when
the armature is attracted to the core, the normally-open contacts will close , thus
completing the circuit to the load which is the lamp. The pull-in current is the minimum
current that can trip the armature of the relay and the pull-in voltage is the minimum
voltage that can also trip the relay. Another parameter will be the drop-out current and
drop-out voltage. Any values of current and voltage below these parameters will
disengage the armature of the relay from the core.

III. Materials:

1 relay
1 DC supply
1 2N309 NPN transistor
1 74LS04 Inverter Chip
1 50K potentiometer
2 VOMs
1 photocell
Resistors:
220 
100 
1k
2 DC supplies
1 Variable AC Supply
1 12V lamp

IV. Procedure:

Part I.
10. Connect the 12V miniature lamp to a 12V ac source. Focus the light of the lamp onto
the photocell.

40
11. Using a VOM, measure the resistance of the photocell.

12. Decrease the voltage applied across the lamp from 12V to:
f) 7.5V
g) 9.0V
h) 6.0V
i) 4.5V
j) 3.0V
and get the corresponding resistance of the photocell.

Part II.

1. With the help from your laboratory instructor, identify the coil terminal and contact
terminals of your relay.

1. Connect the circuit as shown in Figure 6-1.

 mA
ohmmeter
Vs

Determinging the Relay's

Actuating Current
Figure 6-1

2. Set the ohmmeter to x10 position.

3. Initially, the supply voltage must be set to minimum. Slowly increase the voltage
supply, Vs while monitoring both the ammeter and the ohmmeter.

4. Stop increasing the voltage supply as soon as the ohmmeter registers low resistance
value.

5. Record the reading of the ammeter in Table 6-1.

Table 6-1: Relay Parameters

Step Parameter Data
4 Actuating Current
6 Reset Current

41
7. Slowly, decrease the value of the voltage supply until the ohmmeter reading reverts
back to high resistance value.

8. Record the corresponding reading of the ammeter in Table 6-1.

9. Connect the circuit as shown in Figure 6-2.

10. Note that pin 7 and pin 14 of the 74L04 Inverter IC must be connected to ground and
5V respectively.

11. Connect Pin 2 of the inverter IC to the ground. Note down the voltmeter reading and
the ammeter reading . Note down also the status of the lamp and Fill up Table 6-2.

Table 6-2: Data for Relay Driver Circuit

Step Voltmeter Ammeter Reading Lamp Status
Reading (ON /OFF)
11
16

12. Connect the circuit as shown in Figure 6-3.

13. Note again, that pin 7 and pin 14 of the 74L04 IC must be connected to ground and
5V respectively.

42
14. Connect Pin 2 of the Inverter gate to the ground.

15. Note down the reading of the voltmeter, ammeter and the status of the lamp.

16. Fill up the 2nd row of Table 6-2

17. Connect the circuit of figure 6-4.

18. Cover the photocell with your hand or with any opaque object.

19. Note down the status of the lamp connected to the relay.

20. Fill up the first row of Table 6-3.

Table 6-3: Data for Light Activated Relay Circuit

Step Condition Status of Load Lamp (ON/OFF)
20 Photocell is Blocked from Light
22 Photocell is exposed to Light

43
 Vcc=20V

50K
12V

180

Light Activating Circuit

using Relay
Figure 6-4

21. Connect another lamp to the 12 V DC Source and focus it on the photocell.

22. Comment on the status of the Load lamp connected to the relay and fill up the next
row of Table 6-3.

23. What type of circuit is Figure 6-3? What is its common application?

____________________________________________________________________

Guide Questions:

1. Identify the different types of relay and differentiate one over the other.
2. What is/are the main requirement/s to activate a relay?

44
 Experiment No. 6
Ultrasonic Systems (MA40A5S and MA40A5R)

I. Objectives:
1. To understand the theory of operation of ultrasonic transmitter and receiver.
2. To determine the region of operation of the ultrasonic transmitter and receiver.
3. To determine the range of the ultrasonic sensor.
4. To understand the importance of signal conditioning.

II. Introductory Information:

Vibrational waves of electromagnetic frequencies that are above the hearing range
of the normal ear are termed as Ultrasonic waves.
A simple sound wave, as it travels outward from its source, loses strength rapidly
as the distance increases. This decrease in the strength of sound waves along a path can
be greatly affected by discontinuities within the path. With an ultrasonic control system,
a sound path through air is established. The strength of the sound wave at any point along
the path is a function of the distance from the point of origin. The introduction into the
path of any material capable of absorbing some of the sound energy or reflecting it away
from the original path can be measured. This change in the normal weakening or
attenuation of sound along a path can be used to operate electronic circuitry.
There are many ultrasonic wave control systems. Some are used in an air medium.
Others are used in a media such as water or other liquids. In this section, the MA40A5S
(Ultrasonic transmitter) and the MA4OA5R (Ultrasonic receiver) will use air as a
medium. Such Ultrasonic transducer operates at the range of 38 kHz to 42 kHz, with the
center frequency at 40 kHz.
The ultrasonic sensors are directional in their response to sound waves. There will
be a transmission and reception of signal when the following conditions are met:
a) The transmitting and receiving sensors face each other.
b) The path between the two sensors is unobstructed.
c) The electrical gain in the amplifier is sufficient to overcome the losses in sound
energy across the path between the two sensors.
The ultrasonic system can be used in many ways. One is to install the sensors such that it
will provide a direct path in which an obstruction between the sensors breaks the
acoustic path, thereby operating a relay. A relay may then be connected to an external
device. Such devices may include a lamp, buzzer, switch, etc. Another, the direct path
method can also be used to detect the absence or loss of an object from the beam. When
the object is obstructing the beam, the output relay is closed. But when the object is
removed, the acoustic path will then be completed and the relay will then be open. The
ultrasonic system can also be used by locating them such that a reflective path will be in
front of them. In this method, the sound waves emitted from the transmitting sensor are
reflected from an object to the second sensor to provide the acoustic path. They will
prove to be useful for such devices like a proximity meter or an anti-bump system.

45
III. Materials:

Quantity Description
1 - Ultrasonic Transmitter (MA40A5S)
1 - Ultrasonic Receiver (MA40A5R)
1 - LM 348 Operational Amplifier
1 - Dual Trace Oscilloscope
1 - Audio Generator
1 - Ultrasonic Wave System Module
Resistors:
58KΩ, 4.7KΩ , 330 Ω

IV. Procedure:

1. Set the audio generator to 40 kHz sine wave, 5 volts peak-to-peak.

2. Connect the Ultrasonic Transmitter to the audio generator.

3. Set both channels of the dual trace oscilloscope to 5 volts/div.

4. Connect channel 1 of the dual trace oscilloscope to the Ultrasonic Transmitter and
channel 2 to the Ultrasonic Receiver. Focus the receiver onto the transmitter (about
two inches away).

5. Draw channel 1’s waveform obtained as viewed from the oscilloscope

6. With channel 2 of the oscilloscope set to 0.2 volts/div, draw the received signal and
get its amplitude. Comment on the quality of the received signal.

7. Slowly reduce the frequency of the audio generator until no signal is received. Record
this frequency (FL).

8. Increase the frequency of the audio generator until no signal is received. Record this
frequency (FH).

9. Obtain five frequencies between FL and FH, get their corresponding amplitudes. Plot
the response curve. Get the frequency between FL and FH with the highest amplitude
(FC).

10. With the frequency set at FC, block the path by a paper. Observe the received signal.

46
11. At FC, move the receiver away from the transmitter until no signal is received. Record
the distance.

12. Put the transmitter and receiver side by side, place a book in front and slowly move it
away. Observe the received signal. Record the distance wherein there is no signal
present.

13. At the same frequency fc, position the receiver around 5 inches away from the
transmitter and it should be facing the transmitter.

14. Note the received signal when the receiver is facing the transmitter. Let this received
signal be called signal A. Now place your hand between the transmitter and the
receiver and note the received signal again. Let the new signal be called signal B.

15. Remove your hand between the transmitter and the receiver so that the received
signal is once again Signal A.

16. Guided by figure 7-1 slowly move the receiver horizontally along segment xz until
the received signal is approximately the same as signal B obtained in #14. Measure
the distance traveled by the receiver along segment xz .

Figure 7-1

17. Compute for the angle 1 using the tangent formula.

18. Repeat step #16 but this time move the receiver along the xy segment instead of xz.

19. Compute for angle 2.

20. Solve for the beamwidth of the ultrasonic sensor by adding 1 and 2.

47
 Figure 7-1: Signal Conditioning for Ultrasonic Receiver

21. Connect the LM348 Operational Amplifier circuit as shown in Figure 7-1:

22. Make sure that the transmitter is still connected to the output of the audio generator.

23. Connect the oscilloscope across the pin 8 and ground terminal of the LM348 op amp.

24. Repeat steps 7 to 12.

25. Switch the audio generator to square wave output.

26. Repeat steps 7 to 12.

Guide Questions:

1. Without any power supply attached to it, the ultrasonic receiver is able to generate an
ultrasonic wave in response to the ultrasonic transmitter. Explain the principle behind this
capability.

48
 Experiment No. 7
Temperature Sensor (LM335)

I. Objectives:
1. To understand the operation of LM335.
2. To determine the rate of change (per 0C) of the LM335.
3. To build a signal conditioning circuit that will make the sensor microprocessor
compatible.

II. Introductory Information:

LM335 is a precision, easily-calibrated, integrated circuit temperature sensor. It
operates as a two-terminal zener. LM335 has a linear output. It has a temperature range
of –400C to +1000C. The sensor has a linear temperature coefficient of +10 mV/0C.
Signal Conditioning
The low drift LM308 operational amplifier is used to amplify the temperature
coefficient. This will depend on the scale factor of the operational-amplifier. A negative
reference voltage is applied at the non-inverting input of the op-amp to allow the output
to be adjusted to 0.0 V .
Differential Amplifier
To verify the accuracy of the LM335, a differential amplifier will be used. This
circuit will amplify the few millivolts difference between two signals coming from the
sensors. A standard inverting or non-inverting amplifier can not be used, since the large
DC voltage will be amplified along with the difference [Microprocessors and Interfacing,
Hall].

Rf
R1
V1

V2 Vout
R2

R3

Differential Amplifier
Figure 8-1

Figure 8-1 shows a simple differential amplifier. The resistors at the non-inverting
input hold the input at a voltage near the common-mode voltage. The amplifier holds the
inverting voltage at the same voltage. The output of this circuit will only be the
difference between V1 and V2 multiplied by the amplifier’s gain.
R 
Vout   V2  V1  f 
 R1 
49
III. Materials:

Quantity Description
2 - DC Power Supplies
1 - Digital Multimeter
2 - small liquid container
1 - water heater
2 - LM335 temperature sensor
1 - LM348 OPAMP
1 - Relay
1 - thermometer
1 - 2N2102 NPN Transistor

Potentiometer
50KΩ, 10KΩ
Resistors
180, 5K, 6K, 15K, 1K, 6.2K, 4.3K, 1K, 10K, 10K, 1.8K

IV. Procedure:

1. Familiarize yourself with the pin configuration of the LM335 temperature sensors as
shown in Figure 8-2.

NOTE: For this experiment, every time you are asked to dip the temperature sensor
into the water, take care to dip only the component’s casing; you must not allow the
water to touch the sensor’s pins because this will short the sensor.

2. Connect the circuit as shown in Figure 8-3.

50
3. Connect a voltmeter across the output terminal of the circuit.
4. Adjust the potentiometer so that the output voltage is fixed at 2.98V at room
temperature.
5. Let the temperature sensor touch a piece of ice.
6. Note the voltage registered by the VOM. Please wait for around 20 seconds (more or
less) to allow the temperature to stabilize and the output voltage to settle to a fix
value. Note down the voltage and measure the ice temperature by using the
thermometer. Fill up the first blank row of table 1.
7. Dip the temperature sensor in freshly boiled water. Similar to step #6, note down the
temperature(FB) and the output voltage. Fill up the second blank row of table 1.
8. Put a small ice cube into the freshly boiled water solution. Wait a few moments. This
will cause the water to start cooling down.
9. For every degree drop in the temperature, note down the voltage output. Fill up the
remaining rows of table 1.

TABLE 1
Temperature Voltage
Ice :
Freshly
Boiled(FB)
FB-1
FB-2
FB-3
FB-4
FB-5
FB-6
FB-7
FB-8

10. Plot the curve showing the voltage and temperature sensor with voltage reading on
the y axis and temperature on the x axis.

51
11. Connect the circuit shown in figure 8-4.

12. Adjust the 10K potentiometer so that the voltage across T2 is 2.55V.

13. Place the sensor T1 in freshly boiled water and adjust the 50K potentiometer so that
the voltage at the output terminal is approximately 0.0212V. We will refer to this
voltage as FB. Note down on Table 1, the temperature of the freshly boiled water.

14. Place a cube of ice into the freshly boiled water solution to allow the water to start
cooling. With the use of the thermometer, note down the output voltage for every 1
degree drop in water temperature. Fill up the other rows of table 2.

TABLE 2
Temperature Voltage
Freshly 0.0212
Boiled(FB)
FB-1
FB-2
FB-3
FB-4
FB-5
FB-6
FB-7
FB-8
Ice

15. Let T1 touch the ice, note down the temperature and the corresponding voltage at the
output terminal. Fill up the last row of table 2.
16. Plot the curve showing the voltage and temperature sensor with voltage reading on
the y axis and temperature on the x axis.

For the next part of the experiment, we will design a circuit that will energize an
actuator when a certain temperature in reached.

17. Connect the LM 348 OP AMP circuit as shown in Figure 8-5.

52
18. Note that the relay’s normally open contact is connected to an ohmmeter. If the relay
is actuated, the ohmmeter should register low reading otherwise the relay is said to be
in reset state.
19. Place the sensor on ice.
20. Wait for the values to stabilize. Note down the voltage at the output (pin 8) and the
relay state. Write the obtained data in table 3.
21. Place the sensor on freshly boiled water. Wait for the values to stabilize. Note again
the voltage output at pin 8 and the relay state. Write the obtained values in table 3.

Table 3
Circuit State Output Voltage Relay State
(actuated or not)
Sensor on Ice
Sensor on Hot
water

Guide Questions:
1. Is LM335 a good temperature sensor?
2. How can the sensitivity of the LM335 be further improved?

Experiment No. 8

53
 Familiarization with Analog-to-Digital Converters and
Digital to Analog Converters Chips

I. Objectives:
1. To show the operation of an 8-bit analog-to-digital (A/D) converter, the
ADC0809.
2. To understand how the ADC0809 works.
3. To demonstrate the theory of operation of digital-to-analog conversion.

II. Introductory Information:

The purpose of the analog-to-digital converter (ADC) in a data acquisition system
is to translate a continuous analog input signal into a finite number of digital bits. The
resulting digital “word” becomes the binary representation of the analog level at the
moment it was converted. Analog-to-digital converters are used to input the digital
equivalent of an external device’s analog output voltage to a computer. The computer can
make decisions based on the digital value of the voltage.
To understand further the operation of an analog-to-digital converter (ADC) two
important characteristics must be considered. The first characteristic is the resolution.
The resolution of an ADC is very much like the its DAC counterpart- it is the number of
bits with which the ADC will represent the analog signal. An ADC with 4 bits will have a
resolution of 4 bits, and can represent an analog signal with up to 24 or 16 binary words.
An 8-bit ADC can represent an analog signal with up to 28 or 256 binary words.
Therefore, the more bits of resolution an ADC can provide, the more accurately it will
represent the analog signal. Conversion time is another important aspect of analog-to-
digital converters. The conversion time is the period of time required to complete the
process of sampling the analog input signal, digitizing it, then making the binary result
available at the output. It can range anywhere from microseconds (for very fast
converters) to milliseconds (for slower devices).
The data acquisition system used for this experiment will be using the National
Semiconductor ADC0809 analog-to-digital converter. The chip is a CMOS device with
an 8-bit analog-to-digital converter, 8 channel multiplexer, and microprocessor
compatible control logic.

54
 D/A Converter

Parallel
Outputs

+
Analog
Input

MSB LSB Serial

D Output
SA Register
Clock CLK

Figure 10-1: Successive Approximation D/A Converter

The ADC0809 uses the successive-approximation technique for converting the analog
input into its digital equivalent. Figure 10-1 shows a basic block diagram of a four-bit
successive approximation A/D converter. It consists of a digital-to-analog converter
(D/A), successive approximation register (SAR), and comparator. The basic operation is
as follows: the bits of the D/A converter are enabled one at a time starting with the most
significant bit (MSB). As each bit is enabled, the comparator produces an output that
indicates whether the analog input voltage is greater or less than the output of the D/A.
If the D/A output is greater than the analog input, the bit in the register is reset. If the
D/A output is less than the analog input, the bit is retained in the register.

The features of this device actually make it ideally suited for the data acquisition
system. Such features include high speed, high accuracy, minimal temperature
dependence, excellent long-term accuracy and repeatability, and minimal power
consumption.

Working in the reverse manner, a digital circuit can be used to control an analog
device if the digital value is converted to an analog equivalent value. Digital-to-analog
converters (DAC’s) translate binary words from computers and other discrete circuitry into
proportional analog-voltage levels. D/A converters can be used to drive analog devices such
as meters, motor controllers, or audio circuitry.

Digital-to-analog conversion can be achieved using a number of different methods,

but the two most widely used schemes are: the binary-weighted resistor network or summing
amplifier and the R-2R ladder network. The binary-weighted technique is the oldest and
simplest method of converting digital bits into an analog signal. In this process, a voltage is
generated for each bit position in the input binary number, the value of which corresponds
to the weight of the binary bit. This is accomplished by using a resistor network with values
that represents the binary weights of the input bits of the digital word. The R-2R ladder-
network technique is capable of producing binary weighted voltages with only two values of
resistance (R and 2R) arranged in a type of voltage-divider network known as binary ladder.

55
III. Materials:

1 ADC 0809 / 0808

1 DAC chip
1 555 timer IC
Resistors:
75k , 1k , 5k, 5k
8 pcs 1k ,
Capacitor
0.1F, 0.01F, 1uF
8 LEDs
4 toggle switches
2 DC Supplies
1 Digital VOM
1 oscilloscope
1 Breadboard
Connecting wires

IV. Procedure

1 Connect one 555 timer circuit as shown in Figure 10-2. Note that Rb is set
at 75k.

2 Connect the oscilloscope probe across the 555 timer output and measure its
frequency. Record your answer on Table 10-1.

3. Switch off all power supplies and prepare the ADC module.

56
4 Connect the circuit as shown Figure 10-3. Note the toggle switch connected
to pin 22. The power supply for this chip should also come from the power
supply of the 555 timer.

5 Connect the 555 timer circuit output to the clock input of the ADC module
(pin 10).

57
6 Connect a second DC supply at the input terminal (pin 26) of the ADC.
Note: this power supply must be switch OFF with the voltage and fine knobs
set at minimum. Make sure that you have common ground terminal for all
the power supplies.

7 Switch on the DC supplies.

8 Momentarily turn the toggle switch so that the logic applied at pin 22 is high
for about 1 second and then turn the toggle switch again so that the logic
applied to pin 22 is low. (You may repeat this as often as needed to make
sure that the ADC is working correctly).

9 Slowly increase the DC supply applied to pin 10 (You can use the fine knob)
until the LED of the ADC module displays 00000001. Continue adjusting
the DC supply and find the minimum and the maximum voltage input that
corresponds to this output.

10 Repeat step 9 and fill up the corresponding blanks in Table 10-1A.

11 Turn off the DC supply.

12 Disconnect the 5V source from pin 12. Connect a separate DC supply (set at
2.5V) to this pin. Repeat steps 7 to 10 and fill up Table 10-1B.

13. Construct the DAC circuit as shown in 10-4.

+5V

MSB 13 5k
A1 5 14
+10V
A2 6
5k
A3 7 15

A4 8 2

A5 9

A6 10 4
OUTPUT
A7 11

A8 12 16
LSB 3
1 uF

-15V
Figure 10-4: Digital-to-Analog
Converter

58
 14. Connect pins 9 to 12 to the ground.
15. Connect toggle switches to pins 5,6,7 and 8.
16. Make sure that the toggle switches end terminals are connected to 5V supply,
one terminal to +5V and the other terminal to the ground.
17. Connect a digital VOM (switched to DC voltage mode) across the output of the
DAC.
18. With Pin5 as the most significant bit and pin 8 as the least significant bit among
the toggle switches, determine the analog output of the ADC for the given
digital input as shown in table 10-2.

Table 10-1A: Operating the ADC

Step 2 Frequency Output :
Step 11 Digital Output Input Voltage Range
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
00001010
00001011
00001100
00001101
00001110
00001111

Table 10-1B
Step 11 Digital Output Input Voltage Range
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
00001001
00001010
00001011
00001100
00001101
00001110
00001111

59
Table10- 2: Operating the DAC
Digital Analog Output
Input
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

60
 Experiment 9
Familiarization of the Programmable Logic Controller

Objective:
a) to be familiar with the basic operation of a Programmable Logic Controller (PLC)
b) To design and Implement Ladder Diagrams using PLC

Procedure:

1. Double click the V3.1 STEP 7 MicroWIN SP2 icon as displayed on the
desktop screen of your computer.

2. Familiarize yourself with the SIMATIC LAD window . This is also

shown in figure 1.

3. For your ladder diagram design, you will only need to use the following
tools: The contact, the coils and the wires. Figure 1 shows the location
of these tools marked by an arrow.

4.
5.
6.
7.

4. To use these tools, simply click on them while one of the networks listed
is highlighted. To identify these tools, simply point your mouse to any of
the tools and the corresponding name will appear.

61
5. To wire a ladder diagram, simply click on the item (contact or coil) that
you will be needing.

6. To delete any wire, coil or contact, simply highlight the item and then
press the delete key.

7. The different networks shown on the right side of the window indicates
the different set of ladder networks (Rung 1, Rung 2 …etc) typically
found in a ladder diagram.

8. On the left side of the window, by clicking on the drop down menu of
the bit logic (under Instructions heading), you will find the different
types of contacts and coils available. All you need is to point your
mouse to each of these items and the description will automatically be
shown.

9. Construct the first simple ladder diagram for network 1 shown in figure
2.

10. Notice that when you draw a contact, you will first be prompted to
choose among the different contacts available. After you making your
choice, the contact will have red ??? appearing on top of it. This means,
you have to provide a name for the contact. The names can be chosen
from those contacts shown on the PLC panel given to you. The same
rule applies for using coils.

Figure 2

62
11. Notice from figure 2 that there is a coil and contact named Q0.1. This
means, contact Q0.1 will close when the coil Q0.1 is energized. In the
case of I0.0, this contact will close when a high signal is applied to it.
This will only be realized when the ladder diagram is downloaded onto
the PLC.
12. Connect the download cable of your PLC to the serial port of your PC.
Let the other end of the cable be connected to either port 1 or port 0 of
the PLC.
13. Connect the power cable of your PLC and plug it into 220V AC source.
14. Turn on the PLC. The main switch is at the back of the PLC panel
beside the power cable socket.

15. Go to PLC menu and then choose type.

16. Click the read PLC button to make sure that your PC recognizes the type
of PLC it is communicating with.

17. Click the communications button. And then double click the double
click to refresh icon. This is to make sure that the PLC is properly
configured at the right address. Please be patient until all address values
have been consumed.

18. Exit the communication links window and click the ok button on the
PLC type window.

19. Click the download button to download your ladder diagram onto
the PLC.

20. Make sure you don’t get any error report at your console window.
(Bottom part of the main screen). Otherwise, you have to rework your
ladder diagram before coming back to procedure 19.

21. Press the run button to start running your ladder diagram.

22. To know if your ladder diagram is working correctly, connect a wire to

I0.0 contact socket. Connect the other end of the wire to any of the
CI0.0/2.7 blue sockets. This should activate contact I0.0 to close.

23. When I0.0 is activated, you should see the lamp corresponding to I0.0
light up. This should then activate relay Q0.1 and also Q0.2. Lamps
corresponding to Q0.1 and Q0.2 should also light up.

63
24. When Q0.1 lights up, it means that the socket corresponding to Q0.1
becomes shorted to socket CQ0.0/1.0. If Q0.1 is to represent a lamp, all
you need is to connect an external power supply in series with a lamp
with both ends of the circuit connected to Q0.1 and CQ0.0/1.0
respectively as shown in figure 3.

25. In the same manner, when Q0.2 is energized, sockets Q0.2 and
CQ0.0/1.0 becomes shorted.

25. When you are finished verifying your design. Be sure to stop your PLC
by pressing the stop button . You need to do this before you shut
down the PLC or before you start downloading a new design.

26. Your teacher will now give you a problem to work on. You are to design
the ladder diagram for that problem and make it work.

64
 Experiment No. 10
Sample and Hold Circuit

I. Objectives:
1. To explore the accuracy of the 555 timer IC.
2. To learn the operation of the sample and hold circuit.

II. Introductory Information:

The function of the sample and hold circuit is to hold the input voltage or
amplitude to the converter during conversion until the next level is introduced. When a
clock pulse is introduced to the strobe pin of the circuit, the high state of the pulse signals
the circuit to sample the input analog voltage. The sampled analog voltage is then read at
the output of the sample and hold circuit. On the following low state of the clock pulse,
the circuit then turns to its hold mode where the signal is held at the output of the circuit.
The output can then be fed to the ADC circuit for conversion. Any signal appearing at the
input of the ADC will not be sensed until the conversion process is through for the first
input signal.
As discussed above, a sample and hold circuit has two modes of operation. They
are the sample mode and the hold mode. In the sample mode, the output of the circuit is
the instantaneous value of the input signal. At the instant of receiving the hold command,
the output of the circuit is held constant at a value equal to the input signal.

R SW + where:
R - internal resistance
VO SW - s witch
Vin C C - charging capacitor
Vin - input voltage
- VO - output voltage

Figure 11-1: Simplest Form of Sample and Hold

Circuit
In practice, the simplest form of sample and hold circuit consists of a switch and a
capacitor, as shown in Figure 11-1. The switch will provide the means to charge the
capacitor to the sampled voltage and then remove the input so that the capacitor will
retain the input voltage. The output waveform of the circuit as well as its control logic is
shown in Figure 11-2. When the switch is closed while the control logic is in its HIGH
state, the output voltage will closely follow the input voltage and will be equal to it. At
the instant that the control logic goes LOW, the switch is opened and the capacitor will
hold the last input value. The output will then be held constant throughout the HOLD
interval.
When considering a sample and hold circuit, important specifications such as the
aperture time and acquisition time must be considered. Aperture time is defined as the
maximum delay between the time that the control logic switches to HIGH and orders the
switch to open and the time that the switch actually opens. As a result, this time delay
may degrade the performance of the system so selection of a switch is very important.
65
Usually, chip selection is done by means of determining the switch with an aperture time
which is much less than the reciprocal of the sampling rate (aperture time << 1/sampling
rate). The acquisition time, on the other, is the time it takes the HOLD command can be
given after the SAMPLE command was given with an output voltage that approximates
the input voltage [Schilling, pp. 702-704].

VO VO

VIN
VIN

Switch Closed

Switch Open
SAMPLE
Sample Logic Input
Control
where:
Logic VIN = analog input
VO = output wav ef orm
sampled lev el

HOLD

Figure 11-2: Output Waveform and Control

Logic Pulse of a Sample and Hold Circuit

The heart of the sample and hold circuit used is the 8-pin LF398 Integrated
Circuit. The LF398 utilizes BI-FET technology and has fast acquisition time. It operates
at a +10V and –10V voltage supplies such that the maximum input voltage will have a
peak voltage of 10V also. The holding capacitor chosen for this circuit has a value of
0.01 uF and is ceramic. The logic input for the chip comes from an astable 555 circuit.
The sampling rate of the control logic varies according to the different frequencies
implemented on the timer. The output frequency of the 555 astable circuit is manipulated
by its two resistors, RA and R B. By placing different sets of resistors according to the
period equations of the 555, the output frequencies can be changed. Thus, the sampling
frequency of the sample and hold circuit varies since the output period of the 555
controls the sampling rate of the circuit. The HIGH state of the 555 timer represents the
sampling period and its LOW state represents the hold mode.
For this experiment, the analog input presented is a sinusoidal waveform coming
from an Audio Generator. The frequency of the 555 astable circuit is then set by the
resistor values and is inputted to the control logic input of the sample and hold circuit.
The analog input is then connected to the input pin of the sample and hold circuit. With
the oscilloscope, the output waveform is viewed and the maximum analog input
frequency that the sample and hold circuit can maintain is determined. The Nyquist
sampling rate states that the sampling frequency fS must be set greater than or equal to
twice the maximum applied signal frequency. That is shown as:

fS  2fMAX

66
 Therefore the maximum analog input frequency must be equal to or less than half
of the sampling frequency set by the 555 astable circuit. Any analog input frequency
greater than half of the sampling frequency will not give the correct output waveform
since the sample and hold levels are too far apart.
When the sampling frequency is greater than twice the value of the analog input
frequency, a good output waveform can be constructed from the sampled levels of the
circuit since the sampling levels are more in the waveform.
III. Materials:

Quantity Description
1 - LF398 Sample and Hold IC
1 - LM555 IC
1 - dual-trace oscilloscope
3 - voltage supplies
1 - audio generator
Capacitors
1 - 0.1 uF
2 - 0.01 uF
Resistors
1 - 4.7 kΩ
1 - 820 Ω
1 - 680 Ω
1 - 910 Ω
1 - 1.2 kΩ
1 - 12 kΩ
1 - 9.1 kΩ
1 - 6.8 kΩ
1 - 4.3 kΩ
1 - 3 kΩ

IV. Procedure:

Part I. The 555 Astable Circuit

1. See Table 11-1 and take a look at the given resistor values for RA and RB.

2. Using the resistors of the first row of Table 11 -1, 4.7 kΩ for RA and 12 kΩ for RB,
connect the 555 timer circuit as shown in Figure 11-3.

3. Switch ON the oscilloscope and connect the channel 1 probe lead of the oscilloscope
to the clock output (pin 3) of the 555 astable circuit.

67
4. Look at the output waveform as viewed from the oscilloscope. Measure the period
for 1 complete cycle of the output waveform. Record the measured period in Table
11-1 as Tmeas.

5. Measure also the period of the HIGH state of the output waveform and the LOW state
of the output waveform seen at the monitor of the oscilloscope. Record in Table 11--1
as THIGH and TLOW respectively.

6. Remove the channel 1 probe lead from the clock output of the 555 astable circuit.

7. Using the formulas below, compute for the theoretical period, T, of the output
waveform.

TLOW = 0.7RBC

THIGH = 0.7(RA + RB)C

T = THIGH + TLOW

8. Record in Table 11-1 the computed period as TCOMP.

VCC

RA 8

7 4

RB 2 3
output

6 5
C 1
0.1 uF

C
0.01 uF

Figure 11-3 : Schematic Diagram of a 555

Astable Circuit

9. Repeat steps 2 to 8 for the succeeding rows of resistors in Table 11 -1.

10. Do not disconnect the 555 timer circuit. Instead replace the resistors RA and RB w with
values 4.7k and 12 k respectively.

68
 Table 1. Tabulation of Results from Part I
TMEAS TCOMP THIGH TLOW RA RB
4.7 kΩ 12 kΩ
820 Ω 9.1 kΩ
680 Ω 6.8 kΩ
910 Ω 4.3 kΩ
1.2 kΩ 3 kΩ

Part II. Sample and Hold Circuit with 555 as Control Logic

11. Connect the circuit as shown in Figure 11-4.

12. Connect the 555 astable timer output to the Control Logic pin (pin 8) of the LF398
IC.

13. Turn on the Audio Generator. Set to the lowest frequency and switch it to yield a
sinusoidal output waveform.

14. Connect the output of the Audio Generator to the analog input pin (pin 3) of the
LF398 chip.

15. Turn on the Sample and Hold Circuit as well as the 555 timer.

16. Connect the first channel probe of the oscilloscope to the analog input pin (pin 3) of
the sample and hold chip. Then connect the second channel probe to the output pin
(pin 5) of the IC.

17. Carefully adjust the frequency dial of the audio generator and find the maximum
analog input frequency for the first sampling frequency of the 555 timer.

Note: The maximum analog input frequency is the frequency wherein a bigger
sinusoidal waveform is being constructed by the sampling levels in the oscilloscope.

18. Find the ratio of the sampling frequency to the maximum input frequency and record
it in Table 11 -2.

19. Repeat steps 12 – 18 with the other values of RA and RB for the 555 timer provided
in Table 11-2.

69
 +10 V -10 V

1
ANALOG 4
INPUT 5
LF398 OUTPUT
3
6
7
0.1 uF
8

LOGIC
INPUT

Figure 11-4: Schematic Diagram

of the Sample and Hold Circuit

Table 11-2. Tabulation of Results from Part II.

Maximum Analog Sampling
Ratio RA RB
Input Frequency Frequency
4.7 kΩ 12 kΩ
820 Ω 9.1 kΩ
680 Ω 6.8 kΩ
910 Ω 4.3 kΩ
1.2 kΩ 3 kΩ

20. Compute for the average ratio.

Ratioave = ________

Questions:
1. What is the output waveform of the 555 timer? Do the computed periods of the output
waveform equal the measured periods of the output waveform in the oscilloscope?

2. What is the function of a sample and hold circuit?

3. Explain the Nyquist Sampling Theorem and state its importance for a sample and
hold circuit.

70
 PROJECT: DATA ACQUISITION SYSTEM

Objective: To construct a sensor /transducer module that is ready to be interfaced to a

PC for purpose of Data Acquisition System.

Procedure:
1. Choose 1 from any of the following transducers:

Temperature
Pressure
Motion (Variable Resistance)
Humidity

2. Using your background in Electronic Circuit (BASETRO and ELCIRAN), design a

signal conditioning circuit for the chosen transducer. Signal Conditioning circuit
includes the amplifier and the filter circuits.

3. Construct the appropriate analog to digital converter module to be connected to the

output of your signal conditioning circuit. The ADC module is intended to serve as
the interface between the input port of the PC and the entire transducer circuit. The
entire system is shown in Figure 1.

Signal Analog to
Transduce
Conditionin Digital
r
g Conversion

4. Subject the transducer to various conditions and note down the equivalent digital
output. For example, if you choose a temperature transducer, you must subject the
transducer to various temperatures and get the corresponding digital data for each
temperature.

5. Make an analysis to relate the digital output with respect to the analog input.

71