Memory Management Strategies

he memory management algorithms vary from a primitive bare-machine approach to paging and
Segmentation strategies. Each approach has its own advantages and disadvantages. Selection of a
memory-management method for a specif+t system depends on many factors, especially on the hardware
design of the system.

Logical versus Physical Address Space

An address generated by the CPU is commonly referred to as a Logical Address.
An address seen by the memory unit is commonly referred to as a PhysicalAddres5
The set of all logical addresses generated by a program is a logical address space.
The set of all physical addresses corresponding to these logical addresses is a physical address
space.
The run-time mapping from virtual to physical addresses is done by a hardware device called
Memory Management Unit (MMU).

ralocaon
ogister

14000
logica physical
address aciress
348
rarY
14346

MMU

wwwwwwsaaaava

Fragmentation
External Fragmentation: External fragmentation exists when there is enough total memory
space to satisfy a request but the available spaces are not contiguous; storage is fragmented into a large
number of small holes. This fragmentation problem can be severe. In the worst case, we could have a
block of free (or wasted) memory between every two processes. If all these small
pieces of memory were
in one big free block instead, we
might be able to run several more processes.
Internal Fragmentation: The memory allocated to a process may be slightly larger than the
requested memory. The difference between these two numbers is internal memory that is internal to a
partition.
LOmpaction: One solution to the problem of external fragmentation is Compaction. The goal is to
shufle the memory contents so as to place all free mermory together in one large block. Compaction is not
always possible. The simplest compaction algorithm is to move all processes toward one end of memory;
all holes move in the other direction, producing one large hole of available memory but this scheme can
be expensive. Another possible solution to the external-fragmentation problem is to permit the logical
address space of the processes to be noncontiguous.

Contiguous memoryallocation
I n contiguous memory allocation, cach process is contained in a single contiguous section of
memory.
Accessing memory in contiguous memory allocation is faster.
Managing contiguous memory allocation is easier.
External fragmentation may occur in contiguous memory allocation.
Contiguous memory allocation can be classified in following two categories:
1. MFT (Multiprogramming with Fixed number oftasks).
2. MVT (Multiprogramming with variable number of tasks)
MFT (Multiprogramming with Fixed number oftasks)
In this method memory is divided into fixed sized partitions. Each partition may contain exactly
one process. Thus, the degree of multiprogramming is bound by the number of partitions. In this
multiple partition method when a partition is free, a process is selected from the input queue and
is loaded into the free partition. When the process terminates, the partition becomes available for
another process. MFT suffers from following problems
Internal fragmentation may occurin this method.
External fragmentation may occur in this method.
Deciding most appropriate value of Number of partitions and size of partition is difficult.

MVT (Multiprogramming with variable number oftasks)

In the scheme, the operating system keeps a table indicating which parts of memory are available and
which are occupied. Initially, all memory is available for user processes and is considered one large block
of available memory, a hole.

As processes enter the system, they are put into an input queue. The operating
system takes into account the memory requirements of each process and the amount of available memory
space in determining which processes are allocated memory. When a process is allocated space, it is
loaded into memory, and it can then compete for CPU time. When a process terminates, it releases its
memory which the operating system may then fill with another process from the input queue.

This method solves the problem of internal fragmentation.

External fragmentation may occur in this method.
 Algorithms used in contiguous memory allocation
technigues
of the set of
First fit: Allocate the first hole that is big enough. Searching can start either at the beginning
holes or at the location where the previous first-fit search ended. We can stop searching as soon as we

find a free hole that is large enough.

the list is
Best fit:Allocate the smallest hole that is big enough. We must search the entire list, unless
ordered by size. This strategy produces the smallest leftover hole.

Worst fit: Allocate the largest hole. Again, we must search the entire list, unless it is sorted by size. This
may be useful than the smaller leftover hole from
strategy produces the largest leftover hole, which more

a best-fit approach.
 Paging
Paging is a memory-management scheme that permits the physical address space a process to be

non-contiguous.
Paging avoids external fragmentation but not internal fragmentation.

logical physical
sddress address o000..0000
CPU Ta
f1111111
P

physical
merory
PAge tabe

Paging hardware

Paging involves breaking physical memory into fixed-sized blocks called frames and breaking
logical memory into blocks of the same size called pages.
When a process is to be executed, its pages are loaded into any available memory frames from
their source
Every address generated the CPU (Logical address) is divided into two parts: a page number p and
a page offset d. The page number is used as an index into a page table. contains
The
page table the
base address of each page in physical memory. This base address is combined with the page ofset
to define the physical memory address that is sent to the memory unit.
T h e size of a page is typically a power of 2, varying between 512 bytes and 16 MB per page,
depending on the computer architecture. The selection of a power of 2 as a page size makes the
translation ofa logical address into a page number and page offiset particularly easy.
 Example
frame
number

page 0

page 1
o page 0

age 2 237 2

page 3 page table 3 Page 2

logical page 1
memory

page 3

physical
memory

Pagingmodel of logical and physicalmernory.

Page Table
Page table is a data structure maintained by OS.
In paging OS creates page table for every process separately.
number.
Page table contains frame number, corresponding to Page
because
Page table resides in physical memory; it wastes large space in physical memory
generally its size is large.
Protection in Paging
Memory protection in a paged environment is accomplishcd by protection bits associated
with each frame. Normally, these bits are kept in the page table.
One bit can define a page to þe read-write or read-only. Every reference to memory goes
through the page table to find the correct frame number. At the same time that the physical
address is being computed, the protection bits can be checked to verify that no writes are
to write to read-only causes a hardware
being made to a read-only page. An attempt a page
trap to the operating system.
valid-invalid bit.
One additional bit is generally attached to each entry in the page table called
address space and
When this bit is set to "valid," the associated page is in the process's logical
is thus a legal (or valid) page. When the bit is set to "invalid," the page is not in the process's
-invalid bit. The
logical address space. Illegal addresses are trapped by use of the valid
disallow access to the page.
operating system sets this bit for each page to allow or

2 page
O0000 ramenunber valid-invalid bt
page 3 pege 1
o2
page 1
3 page 2
24
page2 37
pago3 48
page 3
pag
70D
10.468 pago 5 | 8page 4
page tabie
12287

page n

Vahd (M or imvald (@ bit ina pege table.

 Segmentation
*
Segmentation is a memory-management scheme that supports user view of memory.
In segmentation logical address space is a collection of variable size segments. Each segment has
a name and a length.
*Segmentation avoids internal fragmentation and external fragmentation both.
Segment table takes lesser space in physical memory than page table.

imit jbase

Segment
CPU
table

no

trap: addresstng error physical memory

Each entry in the segment table has a segment base and a segment limit. The segment base
contains the starting physical address where the segment resides in memory, and the segment
limit specifies the length of the segment.

*In segmentation logical address consists of two parts: a segment number, s, and an offset into that
segment, d. the segment number are used as an index to the segment table. The ofset d of the
logical address must be between 0 and the segment limit. If it is not, we trap to the operating
system (logical addressing attempt beyond end of segment). When an offset is legal, it is added to
the segment base to produce the address in physical memory of the desired byte. The segment
table is thus essentially an array of base-limit register pairs.

Example: segment 2 is 400 bytes long and begins at location 4300. Thus, a reference to byte 53
of segment 2 is mapped onto location 4300 +53= 4353. A reference to segment 3, byte 852, is
mapped to 3200 (the base of segment 3) + 852 - 4052. A reference to byte 1222 of segment 0

would result in a trap to the operating system, as this segment is only 1,000 bytes long.
 100
egment
2400

Dasej
o000 1400
3200
1100 egmer
41000 T00
4300 grerA
4700
grerd
5700

Physicai memory

Virtual memory
execution of processes that are not completely in
Virtual memory is a technique that allows the
than physical
memory. One major advantage
of this scheme is that programs can be larger

memory.
and to implement shared memory.
Virtual memory also allows processes to share files easily
and may substantially decrease performance
Virtual memory is not easy to implement, however,
if it is used carelessly.

Demand Paging
I n demand-paged virtual memory, pages are only loaded when they
are demanded during
never accessed are thus never loaded
into physical memory.
program execution. Pages that are
This technique is commonly used in virtual memory systems.
page into memory unless
that page wil
paging lazy swapper is used. It never swaps
a
I n demand
be needed
Objective of Demand paging is to increase degree of multi-programming.
 OOO

memery

13

phyacal memory

of demand paging is generally measured by

Performance of Demand Paging: Performance
We would expect p to be close to
effective access time. Let p be the probability of a page fault (0 Sp S 1).
effective access time is then-
zero-that is, we would expect to have only a few page faults. The

page fault time.

* *
Effective access time=(1-p) ma +p

Page Replacement Policies

1.FIFO Page Replacement: is first-in, first-out (FIFO) algorithm. A FIFO

simplest page-replacement algorithm
a
The
brought into
each page the time when that page was
replacement algorithm associates with
page must be replaced,
the oldest page is chosen.
memory. When a
FIFO page-replacement algorithm is easy to understand and program.
1,2,3,4,1,2,5,1,2,3,4,5 number of faults
Belady's anomaly may occurs for some sequence like
for four frames (ten) is greater than the number of faults for three frames (nine).

Example
relerenc rin
3 2 1 2 0 1 7 0 1
7 0 2 3

page trames

2. OptimalPage Replacement:
I t has the lowest page-fault rate of all algorithms and will never suffer from Belady's
anomaly.
I t Replace the page that will not be used for the longest period oftime.
 U s e of this page-replacement algorithm guarantees the lowest possible page tault rate 1or a
fixed number of frames.
*The optimal page-replacement algorithm is difficult to implement, because it requires future
knowledge of the reference string.

Example:
reference string
7 0 1 2 0 3 04 2 3 03 2 1 20 1

page trames

3. LRU Page Replacement:

I n least recently algorithm we can replace the page that has not been used for the longest
period of time.
The major problem is how to implement LRU replacement. An LRU page-replacement

algorithm may require substantial hardware assistance.

Example
reference string
7 0 1 20 3 0 2 3 0 3 2 1 1 7 0 11

7
page trames

Thrashing
A process is thrashing if it spending more time in swap-in and swap-out than executing. Thrashing occurs
when we increase degree of multiprogramming too much.
 thrashing9

degree of muitiprogramming

Thrashing
until
increases, CPU utilization also increases, although more slowly,
As the degree of multiprogramming and
even further, thrashing sets in,
a maximum is reached. If the degree of multiprogramming is increased
we must
to increase CPU utilization and stop thrashing,
CPU utilization drops sharply. At this point,
decrease the degree of multiprogramming.

Locality of Reference
whose
to the the computer program to access instructions
tendency of
Locality of Reference refers shown by loops and
addresses are near one another. The property of locality of reference is mainly
subroutine calls in a program.
to the set of instructions that
In case
of loops in program control processing unit repeatedly refers
constitute the loop.
.In case of subroutine calls, every time the set ofinstructions are fetched from memory.
References to data items also get localized that means same data item is referenced again and
again.

current data instruction that is being fetched may be

Temporal Locality-Temporal locality means or
needed soon. So we should store that data or instruction in the cache memory so that we can avoid again
searching in main memory for the same data.

Spatial Locality - Spatial locality means instruction or data near to the current memory location that is
being fetched, may be needed soon in the near future. This is slightly different from the temporal locality.
Here we are talking about nearly located memory locations while in temporal locality we were talking
about the actual memory location that was being fetched.
 Bare Machine
In computer science, bare machine refers to a computer executing instructions directly on logic hardware
without an intervening operating system. prior to the development of operating systems, sequential
instructions were executed on the computer hardware directly using machine language without any
 system software layer. This approach is termed the "bare machine" precursor to modern operaung&
systems. Today it is mostly applicable to embedded systems and firmware Code runs faster on bare
machine but creating software is more expensive for bare machines.

Resident Monitor
In computing, resident monitor is a typë of system software program that was used in many
a
early
The name is
computers from the 1950s to 1970s. It can be considered a precursor to the operating system.
derived from a program which is always present in the computer's memory thus being "resident". Because
was often little more than a stub which
memory was very limited on these systems the resident monitor
and
would gain control at the end of a job and load a non-resident portion to perform required job cleanup
setup tasks.

the machine before

On general-use computer using punched card input, the resident monitor governed
a

and after each job control card was executed, loaded and interpreted each control card, and
acted as a job

processing operations. The functions that the resident monitor could perform
were:
sequencer for batch
clearing memory from the last used program (with the exception of itself), loading programs, searching
for program data and maintaining standard IO routines in memory.