School of Professional Advancement Doc.

No : QA-WI-
02
Course Outlines Issue No: 01
Rev : 00

Resource Person:

Module:

Course Title: Digital Logic and Design

Course Code:

Course Type: Foundation

Pre-Requisite: Basic Electronics

Counseling Hours: Class Days

Program Head: Imran Saleem

Name Signature Date

Checked By
(Program Head)
Approved By
(Director SPA)

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 School of Professional Advancement Doc. No : QA-WI-
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Course Outlines Issue No: 01
Rev : 00

Course Description
Digital Logic and Design is a technological subject which is intended to make students with
different type of designs. This course covers number systems, digital waveforms, basic gates and
logic functions; Boolean algebra, Boolean expressions; logic minimization techniques;
combinational logic building blocks including decoders, encoders, multiplexers, demultiplexers,
magnitude comparators; digital arithmetic, adders, subtractors; basics of sequential circuits,
basic latches and flip-flops; timing parameters and diagrams; counters, shift registers; basic
PLDs, CPLDs and FPGAs; architectures; binary counters and shift registers; system design with
state machines; memory devices and systems including RAM, ROM and dynamic RAM. After
studying this course students would have complete understanding about the low level architecture
of any digital system of diverse areas.

Course Objectives
 Understand elements of digital logic and its application to various problems in engineering.
 Design and analyze combinational logic circuits
 Design and analyze synchronous sequential circuits
 Understand encoder, decoders, multiplexers and demultiplexers
 Understand memory architecture and basic operations

Course Contents: Following is the session-wise breakup of the course:

Session 1: Introduction to Digital Logic

 One-to-one introduction
 Course Introduction, Teaching & Assessment Methodology
 Distribution of Course Outlines
 Discussion on Course Outline
 Setting up of Norms
 A brief introduction to Digital Logic Design.

Learning Outcomes
The main learning objective of the reading is to provide a basic and conceptual understanding of
Digital Logic Design.

Activities
Class discussion

Session 2: Number Systems

 An overview and Number Systems and Codes
 Binary storage and registers
 Binary logic
 Logic gates

Learning Outcomes
The main learning objective of the reading is to provide a basic and conceptual understanding of
number systems and logic gates.

Activities
1st Assignment

Session 3: Boolean Algebra

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Course Outlines Issue No: 01
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 Basics of Boolean algebra

 Operations
 Logic simplifications
 Laws of Boolean algebra
 Diagrammatic representations

Learning Outcomes
The main learning objective of the session is to introduce students with different algebraic
expressions and operations.

Activities
1st Quiz

Session 4: Logic Operations

 Canonical and standard forms
 Other logic operations

Learning Outcomes
The main learning objective of these sessions will be to understand different logical operations
and the standard forms.

Activities
Class Activity

Session 5: The map method

 Truth tables
 K-maps
 Boolean Expression simplification

Learning Outcomes
The students will learn the concepts of truth table and how to make a Karnaugh map.

Activities
2nd Assignment

Session 6: Logic operations design

 Product of Sum simplification
 NAND,NOR and XOR Implementation

Learning Outcomes
The students will learn about different type of gates such as NAND, NOR and XOR and typically
gets an idea as how to implement them.

Activities
2nd Quiz

Session 7: Design of combinational logic

 Combinational Logic design and analysis
 Adder/Subtractor logic
 Comparator

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Learning Outcomes
The students will learn about different designs of combinational logic, their analysis and the
implementation of adder, subtractor and comparator.

Activities
 Practice Questions
 Revision of the content

Session 8: MIDTERM

Session 9: Combinational Logic-II

 Decimal Adder
 Binary Multiplier
 Magnitude Comparator

Learning Outcomes
This session will introduce the students with the concept of enhanced Combinational logic that
particularly includes decimal adder, Multiplier and magnitude comparator.

Activities
 Mid Term Review and Solution Discussed

Session 10: Combinational Logic-III

 Decoders
 Encoders
 Multiplexers
 Demultiplexers

Learning Outcomes
The discussion is based on the further combinational logic that are decoders, encoder,
multiplexers and demultiplexers. Students will learn how to implement each one of them.

Activities
3rd Assignment

Session 11: Sequential logic-I

 Synchronous sequential logic
 Latches
 Flip-flops
 Asynchronous and Synchronous Circuits

Learning Outcomes
The major learning outcome of this session is to introduce students to the concept of sequential
logic, latches, flip flops and the differences between Asynchronous and Synchronous Circuits

Activities
3rd Quiz

Session 12: Sequential logic-II

 Clocked sequential circuits
 State reduction
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 State Machine
 Assignment and design procedure

Learning Outcomes
The students will learn about sequential circuits, different state machines and assignment and
their design procedures.

Activities
 4th Assignment
 Class Activity

Session 13: Shift registers

 Design and analysis of shift registers
 Shift Registers Counters
 Application of shift registers

Learning Outcomes
The students will learn about the concept of shift registers, the counters, the shift registers
counter and identify some of the real time applications of shift registers

Activities
4th Quiz

Session 14: Counters

 Ripple counters
 Synchronous counters
 Johnson counter
 Down Counters

Learning Outcomes
In this session the students will learn about different type of counters in order to design the
circuits.

Activities
 Practice Questions
 Class Activity

Session 15: Memory and Programming Logic

 RAM
 ROM
 PLA
 PAL
 Flash memory Array

Learning Outcomes
In this session the students will learn about the memory and the programmable logic design.

Activities
Revision of the course and Problems discussed

Session 16: FINALTERM

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Recommended Book (s):

Textbook:
 Digital Design,4 th Edition by Morris Mano (Required)
 Digital Design, Principles & Practices, 3rd Edition John F. Wakerly (Recommended)

Assessment Methodology

Distribution
Class Activity 10%
Quizzes 15%
Mid Term 25%
Assignments 15%
Final Exam 35%
Total 100%

Calendar of Activities
Session Topics Readings Activities
1 Introduction to Digital Logic TB: Class
 One-to-one introduction Chapter 1.1 discussion
 Course Introduction, Teaching & Assessment
Methodology
 Distribution of Course Outlines
 Discussion on Course Outline
 Setting up of Norms
 A brief introduction to Digital Logic Design.

2 Number Systems TB: 1st

 An overview and Number Systems and Codes Chapter Assignmen
 Binary storage and registers 1.2-1.9 t
 Binary logic
 Logic gates

3 Boolean Algebra TB: 1st Quiz

 Basics of Boolean algebra Chapter
 Operations 2.1-2.4
 Logic simplifications
 Laws of Boolean algebra
 Diagrammatic representations

4 Logic Operations TB: Class

 Canonical and standard forms Chapter Activity
 Other logic operations 2.5-2.8

5 The map method TB: 2nd

 Truth tables Chapter Assignmen
 K-maps 3.1-3.3 t
 Boolean Expression simplification

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6 Logic operations design TB: 2nd Quiz

 Product of Sum simplification Chapter
 NAND,NOR and XOR Implementation 3.5-3.9

7 Design of combinational logic TB: Practice

 Combinational Logic design and analysis Chapter Questions
 Adder/Subtractor logic 4.1-4.5 Revision
 Comparator of the
content

8 MIDTERM

9 Combinational Logic-II TB: Mid Term

 Decimal Adder Chapter Review
 Binary Multiplier 4.6-4.8 and
 Magnitude Comparator Solution
Discussed

10 Combinational Logic-III TB: 3rd

 Decoders Chapter Assignmen
 Encoders 4.9-4.11 t
 Multiplexers
 Demultiplexers

11 Sequential logic-I TB: 3rd Quiz

 Synchronous sequential logic Chapter
 Latches 5.1-5.4
 Flip-flops
 Asynchronous and Synchronous Circuits

12 Sequential logic-II TB: 4th

 Clocked sequential circuits Chapter Assignmen
 State reduction 5.5, 5.7 t
 State Machine Class
 Assignment and design procedure Activity

13 Shift registers TB: 4th Quiz

 Design and analysis of shift registers Chapter
 Shift Registers Counters 6.1-6.2
 Application of shift registers

14 Counters TB: Practice

 Ripple counters Chapter Questions
 Synchronous counters 6.3-6.5 Class
 Johnson counter Activity
 Down Counters

15 Memory and Programming Logic TB: Revision

 RAM Chapter 7 of the
 ROM course and
 PLA Problems

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 PAL discussed
 Flash memory Array

16 FINALTERM