Meerut Institute of Engineering & Technology, Meerut

Mega Revision Course (MRC)

Course: B.Tech Semester: II
Subject Name: Fundamentals of Electronics Engineering Subject Code: BEC201

Ques1: What do you mean by doping? Describe its need. [2018-19, 2020-21, 2021-22]
Ans: Doping is the process of adding impurities to intrinsic semiconductor. Trivalent and pentavalent
atoms are used for doping. When trivalent impurities are added then it becomes p-type semiconductor.
When pentavalent impurities are added then it becomes n-type semiconductor.
Need of doping: - Doping is done to increase the conductivity of semiconductor devices. Doping
creates extra holes and extra electrons to increase the flow of currents. So, conductivity of intrinsic
semiconductor increases.

Ques2: Why does the depletion region width decrease after putting diode in forward bias? [2024-
25]
Ans: When a diode is forward biased, the depletion region width decreases because the applied voltage
opposes the built-in potential barrier, effectively reducing the electric field and allowing majority
charge carriers to cross the junction.

Ques3: Define depletion layer in a diode

OR
Discuss the formation of depletion layers in diodes.
OR
Discuss the formation of depletion layer in diode. Also explain the effect of temperature on diode.
[2015-16, 2021-22]
Ans:
When a p-n junction is formed then hole starts to move from P to N and electron starts to move from N
to P due to concentration gradient. This is called diffusion process. An electric field is generated at the
junction, which stops the further movement of electrons and holes. So, a layer of immobile ions is
formed at the junction. This layer is called depletion layer or space charge region.

Effect of temperature on Conductivity of semiconductor:-

i. At low temperature:-
 Valance band is completely filled.
 Conduction band is completely empty.
 So at very low temperature semiconductor behaves as an insulator i.e. Conductivity is Zero.
ii. At room temperature:-
 Valance band is partially filled.
 Conduction band is also partially filled.
 The energy gag between conduction band and valance band is narrow. As temperature
increase, conductivity of semiconductor increases.
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Ques4: Explain the Knee voltage. What is the knee voltage for Ge, Si? [2017-18]
Ans: A minimum positive voltage is required to start conduction in a forward biased diode. This
minimum positive voltage is called knee voltage or cut-off voltage (Vr).
For Ge, Vr= 0.3V,
For Si, Vr= 0.7V

Ques5: How does a half wave rectifier differ from a full wave rectifier? Why bridge type full wave
rectifier is preferred over center tapped full wave rectifier. State two reasons. [2017-18, 2023-24]
Ans: A half-wave rectifier converts only half cycle of AC into DC, whereas a full-wave rectifier
converts the complete cycle of AC into DC.
A bridge rectifier is preferred over center tapped full-wave rectifier because:
1. The PIV for bridge rectifier is Vm whereas centre tap rectifier has a PIV of 2Vm.
2. There is no need for the centre tapping in bridge rectifier which itself is a difficult process.

Ques6: What are the function of clippers and clampers in electronics circuits? [2023-24]
Ans: In electronics, clippers and clampers are circuits that use diodes and capacitors to modify signals
in different ways:
Clippers: Also known as limiters, clippers remove parts of a signal that are above or below a certain
level. They can be used to remove noise or create new waveforms.
Clampers: Clampers shift an entire signal up or down to set a desired level for the positive or negative
peak. They add or restore a DC level to an electrical signal.

Ques7: The reverse saturation current of Si p-n junction diode is 10 µA at 300K. Determine the
forward bias voltage to be applied to obtain diode current of 100 mA. [2017-18]
Ans: Given: Is = 10 µA ; T = 300K ; Id = 100 mA ; Diode = Si
Find: Vd = ?
Id= Is [eVd/ηVt – 1]
100x 10-3 =10 x 10-6 [e (Vd/ 2 x 0.026) - 1]
10001= eVd/ 0.052
Taking log on both sides,
9.21= Vd/ 0.052
Vd= 0.47V

Ques8: What is negative resistance on tunnel diode? [2024-25]

Ans: In a tunnel diode, negative resistance refers to a region in its forward bias characteristic curve
where increasing voltage leads to a decrease in current, a phenomenon enabled by quantum tunneling of
electrons across the narrow p-n junction.

Ques9: Why is the Varactor diode also called Varicap? Explain.

OR
What do you mean by a varactor diode? Write one application. [2020-21, 2022-23]
Ans: It is a special purpose diode which can be used as a variable capacitor in microwave circuit.
Working: - Varactor diode is used in reverse bias condition. In reverse bias, the p- region and N- region

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act like the plate of capacitor. While the depletion region act like dielectric. So there exists a
capacitance, space charge capacitance or depletion region capacitance. It is given by
CT = ɛA/W
Where, CT - stands for transition capacitance,
ɛ - Dielectric constant,
A- Capacitor’s plate area,
W - Depletion layer’s width.
As the reverse bias applied to the diode inverse, the width of depletion region (W) increases. So, CT
decrease and vice- versa. Therefore, capacitance can be controlled by applied voltage.

Characteristics: -
Application:
1. FM modulator
2. Tuning circuit
3. In TV receiver
4. In Radio receiver

Ques10: Explain the working of the following with the help of a suitable diagram. (i) Photodiode
(ii) Tunnel Diode.[2017-18,2022-23]
Ans: (i). Photo Diode: A photo diode is a semiconductor P-N junction device that converts light into an
electric current.

Working: -
 When a light or photon is used to illuminate p-n junction then photon hits the immobile ions
present in the depletion layer.
 If energy of photon is greater than 1.1 eV than covalent bond will break. So, electron hole pairs
are generated.
 Due to electric field, electron-hole pairs move away from the junction. Hence, holes move to
anode and electrons move to the cathode to produce photocurrent. This entire process is known
as photoelectric effect.

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V-I Characteristics of photodiode: -

Application:
1. Optical communication system.
2. Medical devices
3. Solar cell panels.
4. Smoke detectors
5. Camera light meters, and street lights
(ii). Tunnel Diode: Tunnel diode is very highly doped diode. The doping of Tunnel diode is 1000 times
greater than simple diode. So, depletion layer is very narrow and is of the order of 10 nm.
In tunnel diode, electric current is caused by “tunnelling” or “tunnel effect”.
Symbol: -

Working of tunnel diode: -

 Unbiased tunnel diode: - Due to high doping the conduction band of n- type overlaps with the
valance band of p- type material. Because of this overlapping the conduction band (electrons)
and Valance band (holes) are at the same energy level.

 Small voltage is applied: - When a small voltage is applied, then a small number of electrons in
the conduction band of n region will tunnel to the energy states of the valance band in p region.
This will create a small forward bias tunnel current.

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  Applied voltage is slightly increased: - When the voltage applied is slightly increased, then the
energy level OFF n- side conduction band becomes exactly equal to the energy level OFF p-side
valance band. As a result maximum, current flows.

 Applied voltage is further increased: - A slight misalign of the conduction band and valance
band takes place. So, current starts to decrease.

 Applied voltage is largely increased: - At this point, the conduction band and valance band no
longer overlap and turn diode operate in the same manner as a normal diode.

V-I characteristics of Tunnel Diode: -

Point A to B: Current increases till point B at very low voltage due to tunnelling effect.
Point B to C: Current decreases till point C. At point C current is minimum and diode shows negative
resistance.
After point C: Tunnel diode woks as normal diode.
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Advantage of tunnel diode: -
 Long life
 High speed operation
 Low noise
 Low power consumption
Disadvantage of tunnel diode: -
 Tunnel diode cannot be fabricated in large numbers.
 Being a two terminal device, the input and output are not isolated from one another.

Ques11: Describe breakdown mechanism of diode. Differentiate between avalanche and Zener
breakdown.
OR
Compare between Avalanche breakdown and Zener breakdown.
OR
Explain the breakdown mechanisms in Zener diodes. [2020-21,2021-22,2022-23,2023-24]
Ans:
Zener breakdown Avalanche breakdown
1. Occurs in highly doped diode. Occurs in lightly doped diode.
The valance electrons are pulled into The valance electrons are pushed in to
2. conduction band due to very high electric conduction band due to the energy imparted
field. by collision of accelerated minority carrier.
3. Tunnelling effect occurs. Ionization effect occurs.
4. Occurs less than 6v. Occurs greater than 6v.
Zener breakdown’s V-I characteristics is
5. It is not as sharp as that zener diode.
very sharp.
6. Covalent bonds break directly. Covalent bonds break indirectly.
7. Temperature coefficient is negative. Temperature coefficient is positive.

Ques12: Draw & explain the V-I characteristic of a P-N junction diode. Also describe the effect of
temperature on the V-I characteristic of a P-N junction diode. Also explain the effect of
temperature on diodes.
OR
Draw the V-I characteristics of an ideal diode in forward and reverse bias conditions.
OR
Explain the working of the p-n junction diode and draw its V-I Characteristics.[2020-21, 2021-22,
2022-23, 2023-24]
Ans: Diode current equation is: ID = IS [e (VD/ηVT) - 1]
Where, ID = Diode Current
IS = Reverse saturation current or leakage Current
VD = Diode Voltage
η= Ideality factor for Ge, η = 1 & for Si, η = 2
VT = volt equivalent of temperature
VT = T/11600 Volt (T should be in Kelvin) At room temperature VT = 26mV
The V-I characteristics of p-n junction diode
Diode current equation is:-
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 ID = IS [e (VD/ η VT) - 1] …………………………. (1)
(i). Unbiased condition:- VD = 0
ID = IS [e (0/ηVT) - 1]
ID = IS [1-1]
ID = 0
So, curve passes through the origin.
(ii). Forward bias condition:- VD = +Ve
ID = IS [e (VD/ η VT) – 1]
But, e (VD/ η VT) >>> 1
Therefore, equation 1 becomes: ID = IS [e (VD/ η VT)]
Hence, a forward characteristic is of exponential nature.
(iii). Reverse bias:- VD = -Ve
ID = IS [e (VD/ η VT) – 1]
ID = Is [{1/e ( VD/ η VT)}-1]
But, 1/e ( VD/ η VT) <<< 1
So, equation 1 becomes, ID = -IS
Therefore, reverse characteristics can be represented by straight line. (3rd Quadrant)

The effect of temperature on the V-I characteristics of p-n junction diode

a) Forward bias condition: - In case of forward biased region the characteristic of Si diode shift
to left at a rate of 2.5mV/oC rise in temperature & vice- versa.
b) Reverse bias condition:-
i. Reverse Current: - Reverse current increase with increase in temperature & vice- versa.
Let, Is1 is the reverse current at temp. T1 then at temp T2, Is2 can be calculated as:
Is2 = Is1 [2T2-T1/10] = Is1 [2ΔT/10]
Reverse current double for every 10oC rise in Temp.
ii. Breakdown voltage: - Breakdown voltage increase with increase in temp & vice- versa.

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Ques13: Determine the range of input voltage Vi for the Zener diode to remain in the ON state
shown in the following figure. Given that Vz =20 V, Izmax = 50 mA, Rz = 0 ohm. [2022-23, 2023-24]

Ans:

Ques14: Draw and explain the working of bridge rectifiers with input and output waveforms.
Calculate efficiency and ripple factor.
OR
Draw a neat circuit diagram of the bridge rectifier and explain its operation with output
waveforms. Drive the average value of current and voltage
OR
Draw the circuit and discuss the working of full wave bridge rectifiers with suitable input -output
waveforms. Define PIV & what is its value for bridge rectifier? [2020-21, 2022-23]
Ans: The bridge rectifier uses the diodes, which are connected in the bridge pattern.

Working: -

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(i). For the positive half cycle: - In positive half cycle, end A is +ve and end B is –ve. So, diode D1, D3
is forward biased and D2, D4 is reverse biased. So, D1, D3 is ON and D2, D4 is OFF. Current flow
through D1, D3 and give the output across load resistance.

(ii). For the negative half cycle: - In negative half cycle, end A is –ve and end B is +ve. So, diodes D1,
D3 are reverse biased and D2, D4 are forward biased. So, D1, D3 are OFF and D2, D4 are ON. Current
flow through D2, D4 and give the output across the load resistance RL.

Input and output waveform of bridge rectifier:-

Ripple factor for Centre tapped rectifier or Bridge rectifier:-

Rectification Efficiency for centre tapped rectifier or bridge rectifier:-

9
PIV for half wave and full wave rectifiers:-
It is the maximum reverse voltage that can be applied across a diode without damaging it.
For the bridge rectifier, PIV= Vm

Ques15: Draw and explain the working of Centre Tapped Full wave rectifiers. Also calculate its
efficiency and ripple factor. [2022-23]
Ans: Centre Tapped Full Wave Rectifier:- Centre tapped rectifier have a centre tapped step down
transformer, two diode D1, D2 and load resistance RL. In centre tapped transformer secondary winding is
divided in two equal half.

Working: -
(i). For the positive half cycle: - In positive half cycle, diode D1 is forward biased and D2 is reverse
biased. So, D1 is ON and D2 is OFF. Current flows through the upper half of secondary winding.

10
(ii). For the negative half cycle: - In negative half cycle, the diode D1 is reverse biased and diode D2 is
forward biased. So, D1 is OFF and D2 is ON. Current flows through the lower half of secondary
windings.

Ripple factor for Centre tapped rectifier or Bridge rectifier:-

Rectification Efficiency for centre tapped rectifier or bridge rectifier:-

11
PIV for half wave and full wave rectifiers:-
It is the maximum reverse voltage that can be applied across a diode without damaging it.
For the bridge rectifier, PIV= 2Vm

Ques16: In a full wave rectifier, the load resistance is 2 KΩ, rf = 400 Ω. Voltage applied to each
diode is 240Sinωt. Find (i) Peak value of current i.e. Im (ii) DC value of current i.e Idc
(iii) RMS value of current i.e. Irms (iv) Efficiency (v) Ripple Factor. [2016-17]
Ans: Given: RL = 2KΩ ; rf = 400 Ω ; Vi = 240 Sinωt (i.e. Vm = 240 V)
(i). Im = Vm/(RL+rf) = 240 V (2 KΩ + 400 Ω) = 100 mA
(ii). Idc = 2Im/π = 2(100 mA)/π = 63.33 mA
(iii). Irms = Im/√2 = 100 mA/√2 = 70.71 mA
(iv). Efficiency = Pdc / Pac = Idc2 × RL / Irms2(RL+rf) = (63.33 mA)2×2 KΩ / (70.71 mA)2(2 KΩ + 400 Ω)
= 0.6684 or η = 66.84%
(v).

= √[(63.33/70.71)2 – 1] = √(0.2337) = 0.48

Ques17: Define the static and dynamic resistance of the Diode. Also differentiate between
Transition and Diffusion capacitance. [2023-24]
Ans:
Diode Resistance:- Resistance opposes the flow of current through a device. Diode resistance is the
effective opposition a diode offers to current flow. Ideally, a diode offers zero resistance when forward
biased and infinite resistance when reverse biased. However, no device is perfect. Practically, every
diode has small resistance when forward biased and significant resistance when reverse biased. We can
characterize a diode by its forward and reverse resistances.
Resistance is classified into two types viz., static or dynamic depending on whether the current flowing
through the device is DC (Direct Current) or AC (Alternating Current), respectively.

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 Diode Resistance
1. Static or DC Resistance
Static resistance (also known as DC resistance) of a diode is the resistance measured when the diode is
at a specific point on its I-V (current-voltage) characteristic curve. It is the ratio of the steady-state
voltage across the diode to the steady-state current flowing through it.
Rstatic = VD/ID
Where:
 VD is the DC voltage across the diode.
 ID is the Dc current through the diode.
 Forward-Biased Diode: When a diode is forward-biased (i.e., the anode is at a higher potential
than the cathode), the static resistance is relatively low. The voltage across the diode is typically
small (around 0.7V for silicon diodes), so the static resistance is also low.
 Reverse-Biased Diode: When the diode is reverse-biased (i.e., the cathode is at a higher
potential than the anode), the current through the diode is very small (ideally zero, but in reality,
a small leakage current exists). As a result, the static resistance in this case is very high.
2. Dynamic or AC Resistance
Dynamic resistance (also known as small-signal resistance or AC resistance) is the resistance offered by
the diode to small changes in voltage and current around a particular operating point. It is the slope of
the I-V characteristic curve at that operating point.
rdynamic = dVD/dID
Where:
 dVD is the small change in voltage across the diode.
 dID is the corresponding small change in current across the diode.
 Forward-Biased Diode: In the forward-biased region, the I-V characteristic curve is
exponential. For small signal variations, the dynamic resistance can be calculated as:
rdynamic = ηVT/ID
where:
 η is the ideality factor (typically between 1 and 2 for silicon diodes.)
 VT is the thermal voltage (VT ≈ 26mV at room temperature.)
 ID is the current through the diode.
 Reverse-Biased Diode: In the reverse-biased region, the current is very small, so the dynamic
resistance is very high. However, in breakdown regions (like Zener diodes), the dynamic
resistance becomes much lower.
Diode Capacitance: Diodes, especially semiconductor diodes, exhibit capacitance due to the way
charge is stored within them. This capacitance can be classified into two main types: transition
capacitance (also known as junction capacitance) and diffusion capacitance. Understanding these
concepts is crucial for analyzing the dynamic behavior of diodes, especially in high-frequency
applications.
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1. Transition capacitance (CT):-
We know that capacitors store electric charge in the form of electric field. This charge storage is done
by using two electrically conducting plates (placed close to each other) separated by an insulating
material called dielectric.
The conducting plates or electrodes of the capacitor are good conductors of electricity. Therefore, they
easily allow electric current through them. On the other hand, dielectric material or medium is poor
conductor of electricity. Therefore, it does not allow electric current through it. However, it efficiently
allows electric field.

Diode Capacitance
When voltage is applied to the capacitor, charge carriers starts flowing through the conducting wire.
When these charge carriers reach the electrodes of the capacitor, they experience a strong opposition
from the dielectric or insulating material. As a result, a large number of charge carriers are trapped at
the electrodes of the capacitor. These charge carriers cannot move between the plates. However, they
exerts electric field between the plates. The charge carriers which are trapped near the dielectric
material will stores electric charge. The ability of the material to store electric charge is called
capacitance.
In a basic capacitor, the capacitance is directly proportional to the size of electrodes or plates and
inversely proportional to the distance between two plates.
Just like the capacitors, a reverse biased p-n junction diode also stores electric charge at the depletion
region. The depletion region is made of immobile positive and negative ions.
In a reverse biased p-n junction diode, the p-type and n-type regions have low resistance. Hence, p-type
and n-type regions act like the electrodes or conducting plates of the capacitor. The depletion region of
the p-n junction diode has high resistance. Hence, the depletion region acts like the dielectric or
insulating material. Thus, p-n junction diode can be considered as a parallel plate capacitor.
In depletion region, the electric charges (positive and negative ions) do not move from one place to
another place. However, they exert electric field or electric force. Therefore, charge is stored at the
depletion region in the form of electric field. The ability of a material to store electric charge is called
capacitance. Thus, there exists a capacitance at the depletion region.

Diode Capacitance in reverse bias condition

14
The capacitance at the depletion region changes with the change in applied voltage. When reverse bias
voltage applied to the p-n junction diode is increased, a large number of holes (majority carriers) from
p-side and electrons (majority carriers) from n-side are moved away from the p-n junction. As a result,
the width of depletion region increases whereas the size of p-type and n-type regions (plates) decreases.
We know that capacitance means the ability to store electric charge. The p-n junction diode with narrow
depletion width and large p-type and n-type regions will store large amount of electric charge whereas
the p-n junction diode with wide depletion width and small p-type and n-type regions will store only a
small amount of electric charge. Therefore, the capacitance of the reverse bias p-n junction diode
decreases when voltage increases.
In a forward biased diode, the transition capacitance exists. However, the transition capacitance is very
small compared to the diffusion capacitance. Hence, transition capacitance is neglected in forward
biased diode.
The amount of capacitance changed with increase in voltage is called transition capacitance. The
transition capacitance is also known as depletion region capacitance, junction capacitance or barrier
capacitance. Transition capacitance is denoted as CT.
The change of capacitance at the depletion region can be defined as the change in electric charge per
change in voltage.
CT = dQ / dV
Where, CT = Transition capacitance
dQ = Change in electric charge
dV = Change in voltage
The transition capacitance can be mathematically written as,
CT = ε A / W
Where, ε = Permittivity of the semiconductor
A = Area of plates or p-type and n-type regions
W = Width of depletion region
2. Diffusion capacitance (CD)
Diffusion capacitance occurs in a forward biased p-n junction diode. Diffusion capacitance is also
sometimes referred as storage capacitance. It is denoted as CD.
In a forward biased diode, diffusion capacitance is much larger than the transition capacitance. Hence,
diffusion capacitance is considered in forward biased diode.
The diffusion capacitance occurs due to stored charge of minority electrons and minority holes near the
depletion region.
When forward bias voltage is applied to the p-n junction diode, electrons (majority carriers) in the n-
region will move into the p-region and recombines with the holes. In the similar way, holes in the p-
region will move into the n-region and recombines with electrons. As a result, the width of depletion
region decreases.
The electrons (majority carriers) which cross the depletion region and enter into the p-region will
become minority carriers of the p-region similarly; the holes (majority carriers) which cross the
depletion region and enter into the n-region will become minority carriers of the n-region.
A large number of charge carriers, which try to move into another region will be accumulated near the
depletion region before they recombine with the majority carriers. As a result, a large amount of charge
is stored at both sides of the depletion region.

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 Diode Capacitance in forward bias condition
The accumulation of holes in the n-region and electrons in the p-region is separated by a very thin
depletion region or depletion layer. This depletion region acts like dielectric or insulator of the capacitor
and charge stored at both sides of the depletion layer acts like conducting plates of the capacitor.
Diffusion capacitance is directly proportional to the electric current or applied voltage. If large electric
current flows through the diode, a large amount of charge is accumulated near the depletion layer. As a
result, large diffusion capacitance occurs.
In the similar way, if small electric current flows through the diode, only a small amount of charge is
accumulated near the depletion layer. As a result, small diffusion capacitance occurs.
When the width of depletion region decreases, the diffusion capacitance increases. The diffusion
capacitance value will be in the range of nano farads (nF) to micro farads (μF).
The formula for diffusion capacitance is
CD = dQ / dV = τ If / η VT
Where,
CD = Diffusion capacitance
dQ = Change in number of minority carriers stored outside the depletion region
dV = Change in voltage applied across diode
τ = Mean lifetime of carrier
If = Forward current
η = Ideality factor
VT = Voltage equivalent of temperature.

Ques18: Define Clamper .Determine output voltage for the given feedback. [2021-22, 2023-24]

Ans: Clamper is a circuit made of diode, capacitor and large value of resistance. Clamper circuit shifts
the dc level of input of ac signal either upward or downward. In clamping process, the shape as well as
peak to peak value of input ac signal remains unchanged. Clamper circuits are of three types:-
• Positive Clamper
• Negative Clamper
• Biased Clamper

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Ques19: Explain Zener diode as a voltage regulator. [2022-23]
Ans: Zener Diode:-
• Zener diode is a special diode, which works in breakdown region.
• It is used for voltage regulation.
V-I Characteristic of Zener diode: -

Zener Diode as a shunt voltage regulator:

(i). Fixed Vi and Fixed RL:-

 Determine the state of Zener diode by removing it from the circuit and find the voltage across
the open circuit.
If V> VZ, the Zener diode is on, and the appropriate equivalent model can be substituted.
If V< VZ, the diode is off, and the open- circuit equivalence is substituted.

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  Substitute the approximate equivalent circuit and solve for the desired unknowns-
VL >= VZ, IR = IZ+ IL
IL = VL/ RL, PZ = VZIZ
(ii). Fixed Vi and variable RL: -
Determine RLmin that will turn the Zener diode ON.
We put, VL >= VZ,

RLmin = (R.VZ)/ (Vi – VZ),

ILmin= VZ / RLmin
For calculating RLmax, we have to calculate ILmin as-
ILmin= IR – IZm,
IR = VR/ R,
VR = Vi – VZ
(iii). Variable Vi and Fixed RL
The minimum voltage Vi that will turn ON the diode is calculated as

Vi min = [(RL+R).VZ]/RL
The maximum voltage Vimax is calculated as: -
IR max = IZM + IL
Vimax = Vrmax + VZ
Vimax = Irmax .R + VZ

Ques20: With help of a neat diagram, explain the working of a voltage doubler circuit.
OR
Describe the working of voltage multiplier circuits.
OR
Define the Voltage Multiplier. Draw the circuit and explain the working of voltage tripler and
Quadrupler circuit. [2016-17, 2020-21, 2022-23, 2023-24]
Ans: Voltage Multiplier Circuit:- Voltage multiplier circuit produce a dc voltage that is some
multiple of the peak ac input voltage. On the basis of multiplying factor voltage multiplier circuit can be
classified as: -
(i) Voltage doubler
(ii) Voltage Tripler
(iii) Voltage Quadruple
Voltage doubler:- Now voltage doubler is again classified into two types:-
 Half wave voltage doubler
 Full wave voltage doubler
Full Wave Voltage Doubler
 In full wave doubler a full wave rectifier is used.

18
 Clamper circuit is not used.

Full wave voltage doubler

Working: -
(i). For Positive Cycle:- In positive cycle, Diode D1 is forward biased so it is on but D2 is reverse
biased so it is off. So, capacitor C1 charges up to voltage Vm.

Full wave voltage doubler working in positive cycle

(ii). For Negative Cycle: - D2 is forward biased so it is on but D1 is reverse biased so it is off. So,
capacitor C2 charges up to voltage Vm.

Full wave voltage doubler working in negative cycle

VO = Vc1 + Vc2
= Vm + Vm
= 2Vm
Multiplier Circuit (Half Wave Doubler, Tripler, Quardrupler):- This circuit diagram is a general
voltage multiplier circuit. It can perform quardrupler. So, for doubler two diode and two capacitor are
needed, for tripler three diodes and three capacitor are needed. If we need nVm at output. We have to
use n- diodes and n- capacitors.
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 Multiplier circuit diodes working cycle
Working: -

Multiplier circuit
(i). First Positive Cycle:
D1 is on. So, capacitor C1 charges up to voltage Vm.
So, Vc1 = Vm ---------------(1)
(ii). First Negative Cycle:
D2 is on. So, capacitor C2 charges up to voltage 2Vm.
Applying KVL, -Vm +Vc2 -Vm = 0
So, Vc2 = 2Vm ------------------(2)
(iii). Secondary Positive cycle:
D3 is on. So, capacitor C3 charges up to voltage 2Vm.
Applying KVL, -Vm - Vc3 + 2Vm + Vm = 0
So, Vc3 = 2Vm --------------(3)
(iv). Secondary Negative cycle:
D4 is on. So, capacitor C4 charges up to voltage 2Vm.
Applying KVL, -Vm - 2Vm + VC4 + 2Vm - Vm = 0
So, Vc4 = 2Vm -------------------(4)

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Ques21: Differentiate between Clipper and Clamper circuit. What are the advantages of negative
clipper circuits? Determine and draw the output voltage given network. [2022-23, 2024-25]

Ans:
CLIPPER CLAMPER
Clipper delimits the amplitude of the Clamper shifts the DC level of the
Definition
output voltage. output voltage.
Output Voltage Less than the input voltage. Multiples of input voltage.
Energy storage Requires (Capacitor is used as
Not required
component energy storage element)
Shape of Output Shape changes (Rectangular, sinusoidal, Shape remains same as input
Waveform triangular etc.) waveform.
DC Level Remains same DC level get shifted
In transmitters, receivers, amplitude In voltage multiplying circuits,
Applications
selector, noise limiter etc. Sonar, Radar system etc.

Negative clipper circuits, which clip off the negative portion of an input signal, offer advantages like
waveform shaping for signal processing, noise reduction, overvoltage protection, and simplicity in
design and implementation.
Here's a more detailed explanation:
21
 Waveform Shaping: Negative clipper circuits can modify input signals by removing or limiting the
negative portion, allowing for the creation of specific output waveforms.
 Overvoltage Protection: By clipping the negative peaks of a signal, these circuits prevent voltage
spikes from reaching sensitive components, offering protection against damage.
 Noise Reduction: Clipping unwanted negative noise components can improve the signal-to-noise
ratio, leading to cleaner and more reliable signals.
 Simplicity and Cost-Effectiveness: Negative clipper circuits are relatively simple to design and
implement, using basic components like diodes and resistors, making them cost-effective solutions.
 Versatility: These circuits find applications in various fields, including communications,
instrumentation, and power electronics, where signal processing and protection are crucial.
 Half-Wave Rectification: A negative clipper can act as a half-wave rectifier, allowing only the
positive half-cycle of the input signal to pass through.

Ques22: Describe the structure and working of Light Emitting Diode (LED). Discuss their
application in electronics. [2022-23, 2023-24]
Ans: Light emitting diode (LED) is a special diode which gives light, when forward biased. Materials
like gallium, phosphorus and arsenic are used for the manufacturing of LED.

Working principle: When LED is forward biased then holes in p-type and electron in n- type start to
cross the junction and recombine with each other. Simple diode (Si or Ge) produce heat in
recombination process. But LED produces light in recombination.

V-I characteristics: -

Application:
1. Used in digital clocks. 3. Used in mobile, TV display.
2. Used in calculators. 4. Used in seven segment display.

22
Ques23: Explain why BJT is a Bipolar Device & current controlled device? [2023-24]
Ans: BJT is called bipolar device because its operation depends on both majority and minority carriers.
A bipolar junction transistor (BJT) is a current-controlled device because the current through two of
its terminals is controlled by a current at the third terminal. The base current controls the collector
current, and the emitter current is the sum of the base and collector currents.

Ques24: Discuss Doping profile and physical appearance of Emitter, base and collector of a
transistor? [2013-14]
Ans:

NPN BJT and PNP BJT with symbols

Where, J1 is Emitter Base Junction
J2 is Collector Base Junction
Emitter: It is the highest doping region in the transistor. It supplies (emits) carriers to the base. It
supplies electrons to the base in n-p-n and holes in p-n-p.
Base: The middle part of the transistor is called base. It is very thin and lightly doped. So most of the
carrier coming from the emitter passes to the collector.
Collector: Collector collects the carriers which are coming from base. Doping of the collector is
heavier than base but less than emitter.
Area profile: C > E > B
Doping profile: E > C > B

Ques25: Explain why FET is a Unipolar Device & Voltage controlled device? [2022-23, 2024-25]
Ans: A field-effect transistor (FET) is a three terminal (namely drain, source and gate) semiconductor
device in which current conduction is by only one type of majority carriers (electrons in case of an N-
channel FET or holes in a P-channel FET). It is also called the unipolar device.
FET is called Voltage controlled device because output is controlled by input voltage. In FET the gate
voltage controls the current flow from drain to source.

Ques26: What is Base Width Modulation? [2011-12]

Ans:
• In active region JEB is forward biased and JCB is reverse biased. Also doping profile is
DE>DC>DB.
• So width of depletion layer is formed on JEB and JCB is non uniform. At both the junction major
width of depletion is towards the base. So effective width of base is very small.
• On increasing VCB effective width of base region further reduces. This effect is called Base
Width Modulation or Early Effect.

23
 • On increasing VCE, IE and IC increase but IB decreases (due to reduction in base width,
possibility of recombination in this region reduces). Thus α, β and γ increases.

Ques27: Define: Idss, Pinch off Voltage, and Voltage controlled resistance of JFET? [2020-21,
2021-22, 2022-23]
OR
Define Pinch-off voltage for JFET.
Ans: Idss :- The maximum current that flows through a Junction Field-Effect Transistor (JFET) when
the gate to source voltage is zero.
Pinch off Voltage:
• In JFET, if VDS is increased a condition comes when depletion layer just touches each other.
This condition is called Pinch off condition.
• The value of VDS which establish this condition is called Pinch off voltage (VP). After pinch off
current becomes constant (IDSS).

Voltage controlled resistance: JFET works as a variable resistance in ohmic region. The resistance of
JFET is given by:

24
So JFET works as variable resistance or voltage-controlled resistance in ohmic region.

Ques28: Explain the Transconductance curve of JFET? [2015-16, 2021-22]

OR
Define transconductance of JFET?
Ans: Transconductance (gm): It is defined the ratio of change in drain current (ΔID) and change in gate
to source voltage (ΔVGS) at constant drain to source voltage (VDS). Unit of gm is Siemen.
Δ𝐼𝐷
gm = | VDS= constant
Δ𝑉𝐺𝑆
𝑑𝐼𝐷
= 𝑑𝑉
𝐺𝑆

Ques29: List the Differences between JFET and BJT? [2021-22, 2022-23]
Ans:
BJT JFET
It is bipolar device i.e. operation depends It is unipolar device i.e. operation
1.
on majority and minority carriers both. depends on majority carriers only.
Current controlled device i.e. output is Voltage controlled device i.e. output is
2.
controlled by current. controlled by voltage.
3. Input resistance is very low. Input resistance is very high.
Temperature dependent due to minority Temperature independent due to
4.
carriers. absence of minority carriers.
5. Power consumption is high. Power consumption is low.
6. More noisy. Less noisy.
7. Cost is low. Cost is high.

Ques30: List the differences between JFET and MOSFET? [2011-12, 2023-24]
Ans:
JFET MOSFET
It operates in both depletion mode and
1. It can only operate in the depletion mode.
enhancement mode.
It has high input impedance on the order
It offers even higher input impedance than the
2. of 1010 ohms, therefore they are more
JFETs, therefore they are more resistive.
sensitive towards input voltage signals.
3. It is relatively cheaper than MOSFETs It’s too expensive.

25
 These are mainly used for high noise
4. These are ideal for low noise applications.
applications.
Manufacturing process of JFETs is Manufacturing process of MOSFETs is
5.
simple. complex.

Ques31: For a transistor IE = 10 mA and α = 0.987. Find IC and IB. [2022-23]

Ans: Given: α = 0.987, IB = 10 mA
α
β= = 0.987/ (1 - 0.987) = 76
( 1− α)

𝐼𝐶 𝐼𝐶
α= => 0.987= => IC = 0.987*10 = 9.87 mA
𝐼𝐸 10

IE = IB+IC => IB = IE - IC = 10 mA-9.87 mA = 0.13 mA

Ques32: Derive relation between current gain CB and CE configuration of Transistor.

OR
Define α and β with respect to BJT and derive the relationship between them. [2021-22, 2022-23]
𝑰𝑪 𝑰𝑪
Ans: We know that α= , β =
𝑰𝑬 𝑰𝑩

IE = IB + IC ----------(1)
In Eq. (1) dividing both sides by IC
𝑰𝑬 𝑰 𝑰
= 𝑰𝑩 + 𝑰𝑪
𝑰𝑪 𝑪 𝑪

𝟏 𝟏
=𝜷 +1
𝜶
𝟏 (𝟏+𝜷)
=
𝜶 𝜷

β ( 1- α) = α
𝛂
β = --------(2)
( 𝟏− 𝛂)
𝑰
γ = 𝑰𝑬 -------(3)
𝑩

In Eq. (1) dividing both sides by IB

𝑰𝑬 𝑰 𝑰
= 𝑰𝑩 + 𝑰 𝑪
𝑰𝑩 𝑩 𝑩

γ= β +1 -------(4)

Ques33: Explain the operating Principle of a BJT. [2023-24]

Ans: The core working concept of a BJT is that a small amount of current flowing between the base
region and collector region causes a larger current to flow between the collector and emitter regions.

Ques34: Draw the I/P and O/P characteristics of Common Base Configuration? In CB
configuration, the value of α =0.98A. A voltage drop of 4.9V is obtained across the resistor of
5KΩ when connected in collector circuit. Find the base current.
OR
26
Draw the circuit of the NPN transistor in common base configuration and discuss its working.
Draw input-output characteristics.
OR
Draw and explain common base PNP transistors with the input and output characteristics graph.
Also write an expression for output current. [ 2011-12, 2015-16, 2021-22, 2022-23, 2023-24, 2024-
25]
Ans: In common base input is applied between emitter and base. Output is taken out from collector and
base. So base is common between input and output.

DC Current gain:- It is the ratio of output current (IC) to the input current (IE).
𝐼𝐶
α= 𝐼𝐸
Since IE> IC so value of α is less than 1. Value of α ranges from 0.90 to 0.99. So, no current gain is
available in CB configuration.
Expression for Output Current:-
IC = IC (Maj)+ ICO
For CB ; ICO = ICBO (Reverse leakage current between collector to base current
when emitter is open )
IC =IC(Maj)+ ICBO -------------------------------- (1)
𝐼𝐶(𝑀𝑎𝑗 )
But 𝛼 = 𝐼𝐸

IC(Maj) = 𝛼 IE -----------------------------------(2)

IC = 𝛼 IE +ICBO

Input V-I Characteristics of CB Configuration:- It is graph between input current (IE) and input
voltage (VEB) at constant output voltage (VCB). This graph is drawn for active region of BJT.

Common Base NPN BJT in active region

• By keeping constant VCB, when forward bias at emitter base junction is increased then graph
between IB and VEB is similar to forward characteristics of P-N junction diode.
• As VCB increases IE increases slightly due to early effect.

27
Output V-I Characteristics of CB Configuration:-It is graph between output current (IC) and output
voltage (VCB ) at constant input current (IE). This graph is drawn for all three operating regions of BJT.
• Active Region: For given α and IE, IC is dependent only on ICBO which is slightly dependent on
VCB. So graph of active region is almost constant. IC = α IE + ICBO
• Saturation Region: When the transistor is switched from active to saturation region, a large
change in collector current for very small value of forward bias voltage at collector to base
junction is obtained in negative direction.
• Cut-Off Region: When both the junctions are reverse biased, a very small collector current is
obtained which is close to horizontal axis.
IC = α IE + ICBO
For cutoff region IE=0
Then IC = ICBO

NOTE: For PNP BJT – just replace N type material with P type, oppose the direction of current
and change polarities of voltage.

28
Ques35: Explain the Common Collector Configuration in case of N P N Transistor? Why
common collector mode is generally not preferred? Increase in collector emitter voltage from 5V
to 8V causes increase in collector current from 5mA to 5.3mA. Determine the dynamic output
resistance. [2015-16, 2023-24, 2024-25]
Ans: In this configuration input is applied between base and collector while output is taken out from
collector and emitter. So, collector of transistor is common to both input and output.

DC Current gain: It is the ratio of output current (IE) to the input current (IB).
𝐼
γ = 𝐼𝐸
𝐵
Since value of IB << IE. So γ >>1. Therefore, current gain is available in CC configuration. But voltage
gain is not available in CC.
Expression for Output Current:
IC = 𝛼IE + ICBO
IE= IC+IB = 𝛼IE + ICBO + IB
IE(1- 𝛼 ) = ICBO + IB
1 1
IE= ICBO(1−𝛼) + IB(1−𝛼)

IE= (𝛽+1) IB + (𝛽+1) ICBO

IE = γ IB + γ ICBO
Input V-I Characteristics of CC Configuration: It is graph between input current (IB) and input
voltage (VBC) at constant output voltage (VCE). This graph is drawn for active region of BJT.
 The output voltage VCE initially kept at 3V and kept constant. The input voltage VBE is
increased from zero gradually and the corresponding input current IB is noted.
 Then the output voltage which is kept constant is increased, let’s say 5V and kept constant and
output voltage is gradually increased and input current is noted. Graph is drawn with all the
values noted.

Output V-I Characteristics of CC Configuration: It is graph between output current (IE) and output
voltage (VCE) at constant input current (IB). This graph is drawn for all three operating regions of BJT.
29
To draw the graph in active region equation of output current, IE = γ IB+ γ ICBO
 Active Region: For given γ and IB, IE is dependent on γ ICBO which is more dependent on VCE
than in case of CE configuration. So, graph of active region has some slope showing change in
IE on changing VCE. IE = γ IB+ γ ICBO
 Saturation region: When the transistor is switched from active to saturation region, a large
change in collector current for very small change in collector voltage is obtained in negative
direction.
 Cut-Off Region: When both the junctions are reverse biased, a very small collector current is
obtained which is close to horizontal axis.
IE = γ IB + γ ICBO
In cutoff region IB = 0
Then IC = γ ICBO

NOTE: For PNP BJT – just replace N type material with P type, oppose the direction of current
and change polarities of voltage.
Common collector mode, also known as an emitter follower, is generally not preferred for amplification
because it has a voltage gain of less than unity (approximately 1), making it unsuitable for amplifying
voltage signals.
Dynamic output resistance (ro) = ΔVCE/ΔIC = (8V-5V)/(5.3mA-5mA) = 3V/0.3mA = 10kΩ.

Ques36: Draw the I/P and O/P characteristics of Common Emitter Configuration?
OR
Draw and explain the working of NPN transistors in common Emitter configuration with its
suitable characteristics graph.
OR
Describe the construction and working of a NPN transistor in CE configuration w.r.t to size and
doping. Also draw the input and output characteristics graph. [2020-21, 2021-22, 2022-23]
Ans: In this configuration input is applied between base and emitter while output is taken out from
collector and emitter. So, emitter of transistor is common to both input and output.

30
DC Current gain:- It is the ratio of output current (IC) to the input current (IB).
𝐼𝐶
𝛽=
𝐼𝐵
Since value of IB << IC. So β >>1. Therefore, current gain is available in CE configuration. Value of β
varies from 20 to 500.
Expression for Output Current:-
IC = 𝛼IE +ICBO
IC = 𝛼(IC + IB) + ICBO --------------------- (1) [ IE=IC+IB]
IC = 𝛼IC + 𝛼 IB + ICBO
IC (1- 𝛼) = 𝛼 IB + ICBO
𝛼 𝐶𝐵𝑂𝐼
IC = (1−𝛼)IB + (1−𝛼) ----------------------- (2)
𝛼
But = 𝛽
(1−𝛼)
𝛼
+1 = 𝛽 +1
(1−𝛼)
1
= 𝛽 +1--------------------(3)
(1−𝛼)

Using equation 2 and 3 we get, IC = 𝛽IB+ (𝛽 + 1)ICBO

IC = 𝛽IB+ICEO
Where ICEO: Leakage current between collector to emitter current when base is open and ICEO is given
ICEO = (𝛽 + 1) ICBO
Input V-I Characteristics of CE Configuration:-It is graph between input current (IB) and input
voltage (VBE) at constant output voltage (VCE). This graph is drawn for active region of BJT.
• By keeping constant VCE, when forward bias at emitter base junction is increased then graph
between IE and VBE is similar to forward characteristics of P-N junction diode.
• If this graph is again drawn for some higher value of VCE a similar graph is obtained with
increased knee voltage. This is due to reduction in IB on increasing reverse bias at collector base
junction because of early effect.

Output V-I Characteristics of CE Configuration:- It is graph between output current (IC ) and output
voltage (VCE ) at constant input current ( IB ). This graph is drawn for all three operating regions of BJT.
• Active Region: For given β and IB, IC is dependent on (β +1)ICB0 which is more dependent on
VCE than in case of CB configuration. So, graph of active region has some slope showing change
in IC on changing VCE. IC = 𝛽IB + (𝛽 + 1) ICBO

31
 • Saturation region: When the transistor is switched from active to saturation region, a large
change in collector current for very small change in collector voltage is obtained in negative
direction.
• Cut-Off Region: When both the junctions are reverse biased, a very small collector current is
obtained which is close to horizontal axis.
IC = 𝛽IB + (𝛽 + 1) ICBO
In cutoff region IB = 0
Then IC = (β+1)ICBO

Ques37: A transistor having α = 0.975 and reverse saturation current I CBO= 10µA is operated in
CE mode. If the base current is 250µA. Calculate IE and IC. [2021-22]
Ans: Given: α = 0.975, I= 250 µA, ICBO = 10 µA
α
β= = 0.975/ (1 - 0.975) = 39
( 1− α)

For CE
IC = 39× 250 × 10^(-6)+ 10 ×10^(-6) = 9.76 mA.
IE = IC + IB = (9.75 + 0.25) ×10-3 = 10.01 mA.

Ques38: Describe the construction of N channel Junction Field Effect Transistors (JFETs).
Explain how the gate controls the conductivity of the channel. [2022-23, 2023-24]
Ans: Construction:- A n-channel JFET have n type base. On both side of base two heavily doped p
regions are formed. So two p-n junction is formed which are internally connected by a gate terminal.
Other two terminal are drain and source.

32
Working of n Channel JFET
Its working is divided in two parts:
(1) When VDS>0 and VGS=0
(2) When VDS>0 and VGS<0
(1). When VDS= (Positive)>0 and VGS=0:
• When VDS is increased more and more electrons move from source to drain. So current increases
and depletion layer also increases. So, channel becomes narrower.
• If VDS is further increased a condition comes when depletion layer just touches each other. This
condition is called Pinch off condition.
• The value of VDS which establish this condition is called Pinch off voltage (VP). After pinch off
current becomes constant.

(2). When VDS>0 and VGS<0

As VGS is increased pinch off condition comes earlier and pinch off voltage decreases in Parabolic
manner. At VGS= VP, current ID will be zero

JFET Characteristics:
They are two types of characteristics
• Drain or output characteristics
• Transfer characteristics
Output Characteristics (Drain Characteristics)
• It is graph between drain current ID and drain to source voltage VDS while gate to source voltage
VGS should be constant. It can be explained from working of the structure discussed above.
• Ohmic region: The current ID increases linearly with VDS. In ohmic region the slope of the
graph is dependent on VGS. So FET can be used as voltage controlled resistance in this region.
• Saturation region or Active region: After pinch off condition the drain current (IDSS) become
constant and this region of the graph is called saturation region. In this region JFET used as an
amplifier.
33
Transfer Characteristics
• It is graph between drain current ID and gate to source voltage VGS. While drain to source
voltage VDS should be constant.
• The relation between ID and VGS can be given as:

• Above equation is also known as Shockley’s equation.

• The transfer curve can be obtained using Shockley’s equation or from the output characteristics.

NOTE: For PNP JFET – just replace N type material with P type, oppose the direction of current
and change polarities of voltage.

Ques39: Explain the working principle of Depletion type MOSFET (N-channel). Draw & Explain
its characteristics.
OR
Explain the Characteristics, Working and Construction of P Channel Depletion type MOSFET?
OR
Explain the construction, working and characteristics of N channel Depletion MOSFET.
OR
Draw the structure of Depletion Type N-MOSFET. Explain its operation with a characteristic
graph. [2011-12, 2015-16, 2020-21, 2021-22, 2022-23, 2023-24]

34
Ans: Construction: n-channel depletion type MOSFET have p-type base (substrate). Then two n
region are formed. A thin layer of Sio2 (Silicon dioxide) is deposited. Drain and source are connected
with metallic contact. A n channel is formed between two n regions. Gate is insulated from n-channel
by Sio2 layer. So, IG is zero. It is also called Insulated gate field effect transistor (IGFET).

Operation:
(1). VGS = 0 , VDS = Positive (+ve) > 0
• When VDS is increased more and more electrons move from source to drain. So current
increases. A condition comes when current becomes Constant.
• This condition is called pinch-off condition. The value of VDS which established this condition is
called pinch-off voltage (VP). After pinch-off current becomes constant.

(2). VGS = negative (-ve ) < 0 , VDS = Positive (+ve) > 0

• If VGS is increased then holes in p-type substrate moves towards the channel.
• So, recombination process occurs in channel. So, pinch-off condition comes earlier and pinch-
off voltage decreases in parabolic manner. This is called depletion mode.

(3). VGS = Positive (+ve ) < 0 , VDS = Positive (+ve) > 0

35
 • If positive voltage is applied at gate then electrons in p-type substrate move towards the channel.
So, the number of electrons in channel increases. So current increases. This is called
enhancement mode.

Characteristics:
It has two types of characteristics.
• Drain or output characteristics: It is the curve between drain current (ID) and drain to source
voltage (VDS), while gate to source voltage (VGS) should be constant.
• Transfer characteristics: It is the curve between drain current (ID) and gate to source voltage
(VGS), while drain to source voltage (VDS) should be constant.

NOTE: For PNP D-MOSFET – just replace N type material with P type , oppose the direction of
current and change polarities of voltage.

Ques40: Explain the Characteristics, Working and Construction of P channel Enhancement type
MOSFET?
OR
Explain the construction, working and characteristics of N channel Enhancement MOSFET.
OR
Explain the working of E-MOSFET along with their transfer characteristics. Explain, why is
enhancement MOSFET preferred over depletion MOSFET for switching purposes? [2021-22,
2022-23, 2024-25]
Ans: Construction: n-channel Enhancement type MOSFET has p type substrate. Then two n regions are
formed, A thin layer of Sio2 (Silicon die oxide) is deposited. Drain and source are connected with the
help of metallic contact. There is no channel between two n regions.

36
Operation:
(1). VDS = + ve, VGS = 0
 If VDS is increased then no current will flow because the is no channel i.e. ID = 0

(2). VDS = + Ve , VGS = +Ve

• If positive voltage is applied at gate then electron in p type moves towards the gate and holes
moves away from the gate.
• Till 2V no channel is formed. But after 2V channel is formed.
• This 2V is called threshold voltage (VT). If VGS is further increased then ID continuously
increases. This is called enhancement MOSFET.

It has two types of characteristics.

• Drain or output characteristics: It is the curve between drain current (ID) and drain to source
voltage (VDS), while gate to source voltage (VGS) should be constant.
• Transfer characteristics:
37
 It is the curve between drain current (ID) and gate to source voltage (VGS), while drain to source
voltage (VDS) should be constant.

NOTE: For PNP E-MOSFET – just replace N type material with P type, oppose the direction of
current and change polarities of voltage.
Enhancement-mode MOSFETs are generally preferred for switching applications over depletion-mode
MOSFETs because they are inherently "off" (no current flow) when no voltage is applied to the gate,
preventing unwanted conduction, while depletion-mode MOSFETs are "on" by default.
In an enhancement mode MOSFET, voltage applied to the gate terminal increases the conductivity of
the device. In depletion mode transistors, voltage applied at the gate reduces the conductivity.
Here's a more detailed explanation:
 Default State:
 Enhancement-mode MOSFET: Requires a voltage (threshold voltage) to be applied between the
gate and source to create a conductive channel, thus it is off by default.
 Depletion-mode MOSFET: Has a naturally conductive channel between the source and drain, even
without a gate voltage, meaning it is on by default.
 Switching Applications:
 Enhancement-mode MOSFET: Ideal for switching because the "off" state is stable and requires an
external signal to turn it on. This prevents accidental or unwanted conduction, making them safer
and more reliable for switching applications.
 Depletion-mode MOSFET: Less suitable for switching because the "on" state is the default, and a
gate voltage is needed to turn it off, this can be problematic in certain applications.
 Other Considerations:
 Simpler Control: Enhancement-mode MOSFETs are easier to control with simple logic gates, as
the "off" state is the default, requiring only a positive voltage to turn them on.
 Faster Switching: Enhancement-mode MOSFETs can switch states faster than depletion-mode
MOSFETs because they only have to enhance a small region near the gate to switch, while
depletion-mode MOSFETs have to deplete a cross-section of the semiconductor to switch.
 Power Consumption: Enhancement-mode MOSFETs generally consume less power in the "off"
state compared to depletion-mode MOSFETs, which are always conducting unless a gate voltage is
applied to turn them off.

38
Ques41: Write down the characteristics of ideal OP AMP? [2022-23, 2023-24, 2024-25]
Ans:
• Open loop gain should be infinite. i.e. Ad (AVOL) = ∞
• Input resistance should be infinite. i.e. Ri = ∞
• Output resistance should be zero. i.e. Ro = 0
• Slew rate should be infinite. i.e. SR = ∞
• CMRR should be infinite. i.e. CMRR = ∞
• Input offset voltage should be zero. i.e. VIO = 0
• Input offset current should be zero. i.e. IIO = 0
• Input bias current should be zero. i.e. IB = 0

Ques42: Define CMRR and Slew rate of Op-Amp. [2022-23, 2021-22, 2023-24]
Ans: CMRR (Common Mode Rejection Ratio): CMRR is the ability of an op-amp to reject, the
common mode signal (noise) successfully. CMRR is defined as the ratio differential mode gain (Ad) and
common mode gain (Ac).
𝐴𝑑
CMRR = 𝐴𝑐
For N0 noise (ideal op-amp) Ac =0
So CMRR = ∞
For ideal op-amp CMRR is infinite but for practical op-amp it is 90 dB.
CMRR in dB:
𝐴𝑑
CMRR = 20 Log10 𝐴𝑐
Slew Rate: The slew rate is defined as the maximum rate of change in output voltage with respect to
time.
△𝑉0
SR = |max V/ µs
△𝑡
For ideal op-amp, slew rate is infinite but for practical op-amp it is 0.5 V/ µs.

Ques43: The output of a particular OP-AMP increases 8 V in 12 µsec. What is the Slew rate?
[2022-23]
△𝑉0
Ans: SR = |max V/ µs
△𝑡
SR = 8/12 = 0.66 V/ µs

Ques44: Explain the concept of differential operation in Op-Amps. Calculate the output voltage
for the given circuit. [2023-24, 2024-25]

Ans: When input signals are applied at both terminal then it is called differential mode.

39
 For an ideal amplifier
V0 α (V1 –V2)
V0 = Ad (V1 –V2)

V0 = Ad Vd
Where, Ad = differential gain, Vd = differential in input voltage

Ques45: Explain the virtual ground concept in OP-AMP. [2023-24]

Ans:

For an ideal op-amp, Ad = ∞

𝑉0 = 𝐴𝑑 𝑉𝑑
𝑉𝑑 = 𝐴𝑉 0
𝑑
𝑉0
𝑉𝑑 = ∞
=0
40
 So, V+ - V- = 0
V+ = V-
• If one terminal of op-amp is connected to ground then other terminal will also be ground. This is
called concept of virtual ground.
• Concept of virtual ground is used to determine closed loop voltage gain and output voltage.

Ques46: Draw the circuit diagram for unity gain amplifiers. Where is it used and why?
OR
Explain Voltage Follower circuit using OP-AMP. [2009-10, 2022-23]
Ans: In voltage follower, output voltage follows input voltage, i.e., V0 = V1. Closed loop voltage gain
of this circuit is 1. It has high input impedance and low output impedance. So, used for the impedance
matching.

AV = 1 [ requirement ]
Gain of non-inverting amplifier is given as:-
AV = 1+ 𝑅𝑅𝐹1
Let RF = 0 & R1 = ∞
AV = 1+ ∞0
AV = 1 [unity gain amplifier]
V0
𝑉 𝑖𝑛
=1
V0 = Vin [voltage follower]
The applications of voltage follower include the following.
• Buffers used in logic circuits.
• Used in active filter
• It is used through a transducer in bridge circuits.

Ques47: What is an operational amplifier? Draw & explain its block diagram.
OR
Draw the block diagram of Op-Amp.
OR
What are Operational Amplifiers (Op-Amps)? Discuss their practical limitations. [2019-20, 2020-
21, 2021-22, 2022-23, 2023-24]
Ans: BLOCK DIAGRAM

41
Input Stage:-
• The input stage is the dual input balance output (DIBO) differential amplifier.
• Its function is to amplify the difference between two input signals.
• It provides high differential gain, high input impedance.
Intermediate Stage:-
• The overall gain requirement of an op-amp is very high. Intermediate stage is used to provide
the required additional gain.
• It consist of another differential amplifier with dual input and unbalanced (single ended) output.
Level Shifting Circuit:-
• As the op-amp amplifies dc signal also, the small dc voltage level of previous stage may get
amplified and applied as the input to the next stage causing distortion in the final output.
• So level shifting circuit is used to bring down the DC level to ground potential.
Output Stage:-
• It is the final stage which is usually consists of a push pull complementary amplifier.
• The output stage decreases the output impedance and increase the current supplying capability
of the op-amp.
Practical limitations: The output voltage range of an Op-amp circuit is limits by the power supply
voltage, internal op-amp design, and circuit configuration.

Ques48: Derive the expression for gain of OP-AMP as non-inverting & Inverting amplifier. [2021-
22, 2022-23, 2023-24]
Ans: Inverting Amplifier: - An op-amp circuit that produces an amplified output signal that is 1800 out
of phase with input signal.

Expression for output voltage:

Here V1 = 0 ------------1
From concept of virtual ground:
Vd = 0
V1 - V2 = 0
V1 = V2
But V1= 0
So, V2 = 0
Applying KCL at node A
Iin = IF
Vi − V2
𝑅 𝑖𝑛
= V 2−
𝑅
V0
𝐹

But V2 = 0

42
 Vi
𝑅 𝑖𝑛
= −𝑅V 0
𝐹

Av = V𝑉0 = - 𝑅𝑅 𝐹
𝑖 𝑖𝑛

• The negative sign denotes an 1800 phase difference between input and output.
• Gain can be set to any value by manipulating the value of RF and R1.
Non-inverting Amplifier:- A non-inverting amplifier is an op-amp circuit design to provide positive
voltage gain. The input is directly applied to non-inverting terminal.

Expression for output voltage:-

From concept of virtual ground
Vd = 0, VA – VB = 0
VA = VB But VB = Vi
So VA = Vi ......................................................................... 1
Apply KCL at node A
I1 = I2
0− V A VA− V0
𝑅1
= 𝑅𝐹

But VA = Vi
− Vi Vi V0
𝑅1
= 𝑅𝐹
- 𝑅𝐹

V0
𝑅𝐹
= 𝑅V i + −𝑅V1 i
𝐹
V0 𝑅𝐹
AV = 𝑉𝑖
= 1+ 𝑅1

 The positive sign denotes that input and output are in same phase.
 Gain can be set to any value by manipulating the values of RF and R1.

Ques49: Draw the subtractor using op-amp and explain its working. [2021-22, 2023-24]
Ans: Difference or Subtractor amplifier: - A circuit that amplifies the difference between two input
signals is called difference amplifier or subtractor amplifier.

43
Expression for output voltage:
Applying KCL at node B
I1 = I2
𝑉2− 𝑉𝐵
𝑅1
= 𝑉 𝑅𝐵 −0
𝐹

VB = (𝑅 1𝑅+𝐹𝑅 2 ) V2 ------------1
From concept of virtual ground:-
Vd = 0
VA – VB = 0
So, VA = VB --------------------2
Applying KCL at node A
I3 = I4
𝑉1− 𝑉𝐴
𝑅1
= 𝑉 𝐴𝑅−𝑉 0
𝐹
𝑉1 𝑉𝐴 𝑉𝐴 𝑉0
𝑅1
- 𝑅1
= 𝑅𝐹
- 𝑅𝐹

𝑉0
𝑅𝐹
= 𝑉𝑅 𝐴 + 𝑉𝐴
𝑅1
- 𝑉𝑅 11
𝐹
𝑉0
𝑅𝐹
= (𝑅𝑅11+𝑅𝑅 𝐹 ) VA - 𝑉𝑅 11
𝐹
𝑉0
𝑅𝐹
= (𝑅𝑅11+𝑅𝑅 𝐹 ) X (𝑅 1𝑅+𝐹𝑅 2 ) V2 - 𝑉𝑅 11
𝐹

V0 = 𝑅𝑅𝐹1 (V2 - V1)

So, circuit works as a difference amplifier or subtractor amplifier.

If R1 = R2
V0 = V2 - V1
So, circuit works as a difference or subtractor.

Ques50: Explain the circuit configuration of a summing amplifier using an Op-Amp and derive
the voltage gain. [2023-24]
Ans: Summing amplifier:- Summing amplifier is an op-amp circuit, which can accept two and more
inputs and produces output as the sum of these inputs.

Expression for output voltage: Here VB = 0 -------------1

From concept of virtual ground:-
44
 Vd = 0
VA – VB = 0
So, VA = V B
But VB = 0
Therefore, VA = 0 ------------ 1
Applying KCL at node A
I1 + I2 + I3 = If
𝑉1− 𝑉𝐴
𝑅1
+ 𝑉 2𝑅−2𝑉 𝐴 + 𝑉 3𝑅−3𝑉 𝐴 = 𝑉 𝐴𝑅−𝑉 0
𝐹
But VA = 0
𝑉1
𝑅1
+ 𝑉𝑅 22 + 𝑉𝑅 33 = −𝑅𝑉 0
𝐹

V0 = - ( 𝑅𝑅 𝐹1 V1+ 𝑅𝑅𝐹2 V2 + 𝑅𝑅𝐹3 V3)

(a) If R1 = R2 = R3= R
Then, V0 = - 𝑅𝑅𝐹 (V1+ V2 + V3)
So, circuit works as a summing amplifier.
(b) If R1 = R2 = R3= RF
Then, V0 = - (V1+ V2 + V3)
So, circuit works as a summer circuit.
(c) If R1 = R2 = R3= 3RF
Then, V0 = - (V1+ V2 + V3) / 3
So, circuit works as an average circuit.

Ques51: With the help of the circuit diagram, explain the working of Non -Inverting summer.
[2022-23]
Ans: Non -Inverting Summing amplifier:- The circuit discussed above is inverting summing op amp,
which can be noticed from the negative sign. But a summer that gives non-inverted sum of the input
signals is called non inverting summing amplifier. The circuit is shown in the Fig.

Let the voltage of node B is VB. Now the node A is at the same potential as that of B.
VA= VB …….(1)
From the input side,
I1= V1-VB/ R1 , I2= V2-VB/ R2 …………(2)
But as the input current of op-amp is zero,

45
Equating the two equations (5) and (6),

Substituting equations (4) in (7) we get,

The equation (8) shows that the output is weighted sum of the inputs.

As there is no phase difference between input and output, it is called non inverting summing
amplifier.

Ques52: Determine the output voltage of the following network. (V1 = 7V, V2 = 11V) [2022-23,
2024-25]

46
Ans: Given circuit is subtractor

Apply KCL at node A

I1 = I2
11 − V A VA − 0
20 K Ω
= 20 K Ω

11 - VA = VA - 0
VA = 5.5 V
Now due to virtual ground VA = VB = 5.5 V
Apply KCL at node B
I3 = I4
7− 5.5 5.5 − V 0
100 K Ω
= 100 K Ω

1.5 = 5.5 - V0
V0 = 4 V

Ques53: Draw the circuit of the integrator using op Amp and explain its working. Also obtain
expression for its output
OR
Explain the working of op-amp as an Integrator and drive its output equation. [2019-20, 2021-22,
2022-23, 2024-25]
Ans: Integrator:- A circuit that performs the integration of input signal is called integrator.

Expression for output voltage:

Here, VA = 0 ---------------------------------1
From concept of virtual ground:-
Vd = 0
VA – VB = 0
So, VA = V B
But VB = 0
Therefore, VA = 0 ------------ 2
Applying KCL at node A
I1 = IC
47
 𝑉 𝑖𝑛 − 𝑉 𝐴 𝑑 (𝑉 𝐴 −𝑉 0 )
𝑅1
=C 𝑑𝑡

But, VA = 0
𝑉 𝑖𝑛 𝑑 (−𝑉 0 )
𝑅1
=C 𝑑𝑡

𝑑 (𝑉 0 )
𝑑𝑡
= 𝑅 11 𝐶 Vin
1
dV0 = - 𝑅1𝐶
Vin dt
Now apply integration on both sides
1
∫ 𝒅𝑽𝟎 =- ∫ 𝑅1𝐶
Vin dt
1
V0 = - 𝑅1𝐶
∫ Vin dt

V0 α ∫ Vin dt
Since, output voltage is directly proportional to the integration of input signal, hence circuit is called
integrator circuit.
Output wave for square input:

Application of Integrator Circuit:

• It is used to generate triangular waveform.
• It is also used in analog to digital convertor circuit.
• It is used as low pass filter.

Ques54: Determine the output voltage of an OPAMP for the input of V1=300 µV and V2= 240 µV.
The amplifier has a differential gain Ad= 5000 and CMRR=100. [2023-24]
Ans: Given, V1 = 300 µV; V2 = 240 µV; Ad = 5000; CMRR = 100
𝐴𝑑
We know that CMRR = 𝐴𝑐

𝑑 𝐴
Ac = 𝐶𝑀𝑅𝑅
5000
Ac = = 50
100

V0 = Ad Vd + AcVc
V0 = 5000(V1 – V2)+ 50(𝑉 1 +2 𝑉 2 )
V0 = 5000 (300 – 240)x 10-6+ 50(300 +2 240 ) x 10-6
V0 = 5000 x 60x 10-6+ 50x 270x 10-6
V0 =313500 µV

Ques55: Draw and explain the working of Differentiator using OP-AMP. [2017-18, 2019-20]

48
Ans: Differentiator:- A circuit that performs the mathematical differentiation of input signal is called
differentiator.

Expression for output voltage:

Here, VA = 0 ---------------------------------1
From concept of virtual ground:-
Vd = 0
VA – VB = 0
So, VA = V B
But VB = 0
Therefore, VA = 0 ------------ 2
Applying KCL at node A
IC = If
C 𝑑 (𝑉 𝑖𝑛𝑑𝑡−𝑉 𝐴 ) = 𝑉 𝐴𝑅− 𝑉 0
𝐹

But, VA = 0
C 𝑑 𝑉𝑑𝑡𝑖𝑛 = −𝑅𝑉 0
𝐹

V0 = - CRF 𝑑 𝑉𝑑𝑡𝑖𝑛
V0 α 𝒅𝑽𝒅𝒕𝒊𝒏
Since, output voltage is directly proportional to the differentiation of input signal, hence Circuit is
called differentiator circuit.
Output for triangular input wave:

Fig. 3.25. Differentiator Output waveform

Application of differentiator Circuit: -

• It is used to generate square waveform.
• It is also used in digital to analog convertor circuit.
• It is used as high pass filter.

Ques56: Determine output voltage for given network. [2021-22]

49
Ans: Given circuit is non-inverting summer

Apply KCL at node A

2− V A
2K Ω
+ 6− VA
2K Ω
=0
2 - VA + 6 -VA = 0
VA = 4 V
Now, V0 = [1+ RR F1 ] x VA = [ 1+ 62 KK ΩΩ ] x 4 = 4x4
V0 = 16 V

Ques57: Determine the output voltage of the following circuit. V1 = V2 = 0.15V. [2021-22, 2022-23]

Ans: Given circuit is inverting summer, then

V0 = -[ RR F1 x V1 + RF
R2
x V2]

V0 = - 330 KΩ
33 K Ω
x 0.15V - 330 K Ω
10 K Ω
x 0.15 V
V0 = -1.5 V – 4.95 V
V0 = - 6.45 V

Ques58: Determine V2 and V3? [2015-16]

50
Ans: Op-amp A1 is voltage follower.
So, V01 = Vin
V01 = 0.2 V
Op-amp A2 is inverting amplifier.
So, V2 = - RR F1 x Vin

V2 = - 200
20
x 0.2
V2 = - 2 V
Op-amp A3 is non-inverting amplifier.
So, V3 = [1+ RR F1 ] x Vin

V2 = [1 + 200
20
] x 0.2
V2 = 2.2 V

Ques59: Determine the output voltage of the given network. [2023-24]

Ans: Op-amp A1 is inverting amplifier. So, output of op-amp A1 is:

V01 = - RR F1 x Vin

V01 = - 330
33
x 12 mV
V01 = - 120 mV
Op-amp A2 is adder circuit. So, output of op-amp A2 is:
V0 = - [ RR F1 x V01 + RR F2 x V2 ]

V0 = 1.02 V

Ques60: Determine the Vo for the following circuit [2009-10]

Ans: It is adder amplifier circuit.

V0 = - [RR F1 V1 + RR F2 V2 + RR F3 V3]

V0 = - [100
20
x 0.1 + 100
10
x 0.2 + 100
50
x 0.3]
V0 = -3.1

51
Ques61: State De-Morgan’s Theorem. [2013-14]
Ans: There are two “de Morgan ́s” rules or theorems,
(1) Two separate terms NOR ́ed together is the same as the two terms inverted (Complement)
and AND ́ed for example: (A+B)’ = A’. B’
(2) Two separate terms NAND ́ed together is the same as the two terms inverted (Complement)
and OR ́ed for example: (A.B)’ = A’ + B’

Ques62: Add binary number (1110.10 +1011.11)2. What are the binary-arithmetic operations for 11.10 +
10.11 + 111.00 + 110.11+ 001.01=? [2023-24, 2024-25]
Ans: 1110.10 + 1011.11 = 11010 .01
11.10 + 10.11 + 111.00 + 110.11+ 001.01 = 10101.01

Ques63: Simplify the Boolean function using Boolean Algebra theorems:

(i) F = A’B’C’ + A’BC’ + AB’C’ + ABC’
(ii) F = XY + XY’Z +YZ’
Ans:
(i) F = A’B’C’ + A’BC’ + AB’C’ + ABC’
F = A’C’(B’+B)+AC’(B’+B)
F = A’C’+AC’
F = C’(A’+A)
F = C’ [property A+A’=1]
(ii) F = XY + XY’Z +YZ’
F = XY(Z+Z’) + XY’Z + YZ’
F = XYZ + XYZ’ + XY’Z + YZ’
F = XZ(Y+Y’) + YZ’(X+1)
F = XZ + YZ’ [property A+A’=1 & A+1=1]

Ques64: Define the term "combinational logic" in digital electronics. [2023-24]

Ans: Combinational logic in digital electronics refers to circuits where the output is determined solely
by the current inputs, without any memory or dependence on past states.

Ques65: Simplify (A + B + C)(A +B’+C’)(A + B+C’)(A + B’+ C) using Boolean algebra. [2013-14]
Ans: F = (A+B+CC’)(A+B’+CC’)
F = (A+B)(A+B’)
F = (A+BB’)
F=A [property AA’=0]

Ques66: Convert F = X + YZ to canonical SOP. [2013-14]

Ans: F = X(Y+Y’)(Z+Z’)+ (X+X’)YZ
F = XYZ+XYZ’+XY’Z+XY’Z’+XYZ+X’YZ.
F = XYZ+XYZ’+XY’Z+XY’Z’+X’YZ.

Ques67: Convert the following into POS format: Y(A,B,C,D)= (A+B+C).(A+D) [2011-12]
Ans: F= (A+B+C+DD’)(A+BB’+D)
F = (A+B+C+D) (A+B+C+D’) (A+B+CC’+D) (A+B’+CC’+D)
F = (A+B+C+D) (A+B+C+D’) (A+B+C+D) (A+B+C’+D) (A+B’+C+D) (A+B’+C’+D)
F = (A+B+C+D) (A+B+C+D’) (A+B+C’+D) (A+B’+C+D) (A+B’+C’+D)

Ques68: What are MAXTERM and MINTERM? [2011-12]

Ans: Minterm: A product term which contains all the function variables either in complemented form
or in uncomplemented form is called a minterm.

52
Maxterm: A sum term which contains all the function variables either in complemented form or in
uncomplemented form is called a maxterm.

Ques69: Simplify the function F= Σm(0,3,5,7,8,9,10,12,13)+ d(1,6,11,14) using K-map and

implement the simplified expression using NAND gates only. [2023-24]
Ans:

Ques70: Minimize using K-map and realize output using gates. F (A, B, C, D) = Σ m (1, 4, 8, 12,
13,15) + d (3, 14). [2022-23, 2024-25]
Ans:

Ques71: Simplify the following function using K-map F(A, B, C, D) = Σ(1, 3, 4, 5, 6, 7, 9, 11, 13,
15). Also implement the simplified function using basic gates only. [2020-21, 2023-24]
Ans:

53
Ques72: F (V,W,X,Y,Z) =Σm(0,1,2,4,5,6,10,13,14,18,21,22,24,26,29,30). Simplify the function with
the help of K-map and realize the simplified function using basic logic gates. [2022-23]
Ans:

Ques73: Simplify the following Boolean expression using K-Map and implement the simplified
expression using NOR GATEs only. F (A, B, C, D) = ΠM(0,2,10,11,12,14,15).d(5,13). [2023-24]
Ans:

54
Ques74: Simplify the function: F(A,B,C,D) = Σ m(0,1,2,5,7,8,9,10,13,15)+ d(12,14) using K map
and implementing the simplified function using NAND gates only. [2022-23]
Ans:

Ques75: Minimize the following Boolean function in POS form using the K map
F(A,B,C,D,E) = ΠM(3,5,6,9,10,11,13,19,21,22,23,25,26,27,29) [2024-25]
Ans:

Ques76: Realize NOT, AND, OR and XOR gates using NAND gates. [2023-24]
Ans: NOT Gate using NAND:

55
AND Gate using NAND:

OR Gate using NAND:

Y=A+B
=A+B

XOR Gate using NAND:

Y = A’B + AB’
Y = AA’+AB’+A’B+BB’
Y = A(A’+B’) + B(A’+B’)
Y = A(A.B)’ + B(A.B)’
Y = [A(A.B)’ + B(A.B)’]”
Y = {[A(AB)’]’[B(AB)’]’}’

Ques77: Implement AND, OR, NOT by using NOR gates only. [2022-23]
Ans: AND Gate using NOR:

OR Gate using NOR:

NOT Gate using NOR:

Ques78: Convert the following: [2022-23]

i) (53.625)10 to (?)2
ii) Find the base x if (211)x = (152)8
iii) Subtract using 1’s complement: (10111)2 – (110011)2
iv) Find the 1’s and 2’s complement of (010100)2
56
Ans:

57
Ques79: Perform the following: [2023-24]
i) Convert (63.250)10 to binary number.
ii)Convert (10010.101)2 to decimal number.
iii) Convert (A6B.OF)16 to octal number.
iv) Subtract using 2’s complement: (111)2 – (1010)2
v) Realize NOT, AND,OR and XOR gates using NOR gates
Ans:

58
Ques80: What is the significance of universal gates in digital circuits?
OR
(i) What are universal gates? Why are they called so?
(ii) Implement Ex-OR & Ex-NOR gate using NAND & NOR gates. [2023-24, 2022-23, 2024-25]
Ans: Universal Gates: A universal gate is a gate which can implement any Boolean function without
need to use any other gate type.
 The NAND and NOR gates are universal gates.
 This is advantageous since NAND and NOR gates are economical and easier to fabricate and are
the basic gates used in all IC digital logic families.
Ex-OR Gate using NAND:
Y = A’B + AB’
Y = AA’+AB’+A’B+BB’
Y = A(A’+B’) + B(A’+B’)
Y = A(A.B)’ + B(A.B)’
Y = [A(A.B)’ + B(A.B)’]”
Y = {[A(AB)’]’[B(AB)’]’}’

Ex-NOR Gate using NAND:

59
Ex-OR Gate using NOR:

Ex-NOR Gate using NOR:

Ques81: Explain the basic law and theorems of Boolean Algebra. [2023-24]
Ans: Rules in Boolean Algebra:
• Variable used can have only two values.
• Binary 1 = HIGH and Binary 0 = LOW.
• Complement of a variable is represented by an overbar ( ¯ )/(’). Thus if B = 0 then B’= 1 and if
B = 1 then B’= 0.
• Logical ORing of the variables is represented by a plus (+) sign between them. Ex- A + B
• Logical ANDing of the two or more variable is represented by a dot between them. Ex- A.B.C.
or ABC.
Boolean Law:
1). Commutative law: Any binary operation which satisfies the following expression is referred to as
commutative operation. Commutative law states that changing the sequence of the variables does not
have any effect on the output of a logic circuit.
(i). A.B = B.A (ii). A+B = B+A
2) Associative law: This law states that the order in which the logic operations are performed is
irrelevant as their effect is the same.
(i). (A.B).C = A.(B.C) (ii). (A+B)+C = A+(B+C)
3) Distributive law: Distributive law states the following condition.
A.(B+C) = A.B+A.C
4) AND law: These laws use the AND operation. Therefore they are called as AND laws.
(i). A.0 = 0 (ii). A.1 = A
(iii). A.A = A (iv). A.A’ = 0
60
5) OR law: These laws use the OR operation. Therefore they are called as OR laws.
(i). A+0 = A (ii). A+1 = 1
(iii). A+A = A (iv). A+A’ = 1
6) Inversion law: This law uses the NOT operation. The inversion law states that double inversion of a
variable results in the original variable itself.
A’’ = A
7) Absorption law: This law enables a reduction in a complicated expression to a simpler one by
absorbing like terms.
A+AB = A A(A+B) = A
8) De Morgan’s Law: There are two “de Morgan ́s” rules or theorems,
(i) Two separate terms NOR ́ed together is the same as the two terms inverted (Complement) and
AND ́ed for example: (A+B)’ = A’.B’
(ii) Two separate terms NAND ́ed together is the same as the two terms inverted (Complement) and
OR ́ed for example: (A.B)’ = A’+B’

Ques82: Define modulation index for AM wave. [2022-23]

Ans: Modulation Index: In AM, modulation index is the % in amplitude variation. It is also known as
percentage of modulation. It can be given as the ratio of maximum amplitude of message to maximum
amplitude of carrier wave.
𝑉𝑚
𝑚= (0< m < 1)
𝑉𝑐
𝑉𝑚
% modulation = × 100
𝑉𝑐
AM can be classified into two parts on the basis of value of modulation index.
i) Linear Modulation: If 𝑚 = ≤ 1, then AM is linear
ii) Over Modulation: If 𝑚 = > 1 Then AM is over modulation. It introduces distortion, so should be
avoided.

Ques83: A 460 watt carrier is modulated to a depth of 65 percent. Calculate the power in
modulated wave. [2015-16, 2022-23, 2024-25]
Ans:

Ques84: AM radio transmitters radiate 6 KW power when the modulation percentage is 70 %.

Determine the carrier power. [2019-20, 2020-21]
Ans: Given: PT = 6 KW ; m = 0.70
For AM signal, power relation is:

61
Ques85: Calculate the transmission efficiency if the modulation factor is 0.5. [2021-22]
Ans: Given: m = 0.5
For AM signal, transmission efficiency is:

Ques86: What is radar? Write down two applications of RADAR. [2021-22]

Ans: Radar communication: Radar is a detection system that uses radio waves to determine the range,
angle or velocity of the objects. It can be used to detect aircraft, ships, spacecraft, guided missile etc.
Applications of RADAR:
1. Air Traffic Control: RADAR is used to monitor and guide aircraft, ensuring safe takeoff,
navigation, and landing by tracking their position and speed.
2. Weather Forecasting: RADAR systems detect and monitor weather patterns, such as
precipitation, storms, and cloud movements, aiding meteorological predictions.

Ques87: Write down two applications of Satellite communication. [2023-24]

Ans: Applications of Satellite Communication:
1. Telecommunication Services: Satellite communication is used for voice, video, and data
transmission, enabling services like international phone calls, television broadcasting, and
internet connectivity in remote areas.
2. Navigation and GPS: Satellites provide precise location and timing data for navigation systems,
including GPS used in vehicles, smartphones, and aviation.

Ques88: Explain the concept of frequency reuse in cellular networks. [2023-24]

Ans: Frequency reuse is a fundamental concept in cellular networks that allows the efficient utilization
of the limited frequency spectrum by dividing the coverage area into smaller regions called cells. These
cells are typically arranged in a hexagonal pattern, and each cell is assigned a specific set of
frequencies. The same frequency set can be reused in non-adjacent cells to minimize interference and
maximize capacity.

Ques89: Write short notes on wireless Communication. [2023-24]

Ans: Wireless Communication: Wireless Communication involves the transmission of information
over a distance without the help of wires, Cables, or any other forms of electrical Conductors.
Wireless Communication is a broad term that incorporates all procedures and forms of Connecting and
Communicating between two or more devices using a wireless signal through wireless Communication
technologies and devices.
Features of Wireless Communication: - The evolution of wireless technology has brought many
advancements with its effective features:
→The transmitted distance can be anywhere between a few meters (for example, a television's remote
control) and thousands of Kilometers (for example, radio Communication),
→Wireless Communication can be used for cellular telephony, Wireles access to the internet, wireless
home networking, and so on.

62
→Other examples of applications of radio wireless technology include GPS units, garage door openers,
wireless Computer mice, Keyboards and headsets, headphones, radio receivers, Satellite television,
broadcast television and Cordless telephones.
Advantages of Wireless Communication: -
1) Cost-effectiveness.
2) Flexibility.
3) Convenience.
4) Speed.
5) Accessibility.
6) Constant Connectivity.

Ques90: Define modulation. Why do we need modulation?

OR
Explain the need of modulation in communication system. [2019-20, 2023-24]
Ans: Modulation and its need: It is a process in which low frequency message signal is superimposed
on the high frequency carrier wave. In this process one of the parameters of the carrier varies according
to the message signal.

Advantages of Modulation-
1. Improved Signal Transmission
2. Increased capacity of Communication
Need of Modulation: There are several factors due to which modulation is needed in communication.
A. Interference or Mixing Problem: As message signals are low Frequency signal, there is large
probability of mixing with other signals of the same frequency so low frequency signal are
superimposed on high frequency Carrier to avoid such problems.
𝜆
B. Height of Antenna: Practical height of transmitting or receiving antenna = Where 𝜆 is the
4
wavelength of the signal being used. If we use low frequency signals, the height of required
antenna is of the order of Kilometers. It can be explained through following example:
Ex: l Let the signal to be transmitted has the frequency. f = 10 KHz
𝑐 3 x 10 8 m/s
Then wavelength of the signal, 𝜆 = 𝑓 = 10𝑥 10 3 /𝑠
4
Or 𝜆 = 3𝑥10 𝐾𝑚 = 30 𝐾𝑚
𝜆
So height of transmitting antenna, h= 4=7.5km

63
 Ex2: If the above message signal of frequency 10 KHz is sent through carrier of frequency 1
𝑐 3 x 10 8 m/s 𝜆
MHZ Then wavelength, 𝜆 = == = 300𝑚& required height of antenna, , h= =
𝑓 1𝑥10 6 /𝑠 4
300
= 75𝑚.
4
Thus it is clear that without modulation, the transmission of signal is not practically feasible due
to extremely large height of transmitting or receiving antenna.
C. Power Dissipation: When an electromagnetic wave is travelling through, atmosphere, it suffers
from various losses which are inversely proportional to the frequency of the signal. So, low
frequency signals are more affected by the losses occurring in the channel and with the help of
modulation, these losses can be reduced.

Ques91: Define the various elements of the communication system and also draw its functional
block diagram.
OR
Explain the elements of communication system with the help of block diagram. [2019-20, 2021-22,
2022-23]
Ans: Block Diagram of the Communication System: It can be defined as the transfer of information
from one point to another. Communication can be divided into three parts:
i) Transmitter
ii) Channel
iii) Receiver

(i) Transmitter: The transmitter section consists of:

A. Information Source: It is used to generate message signal which may be in the form of audio,
video or data.
B. Transducer: Transducer is a device which converts one of signal into other. Here it converts
raw message signal into electrical signal.
C. Modulator: Here, the low-frequency message signal is superimposed on high-frequency carrier
signal so that it can cover a long distance.
D. Amplifier: This block is used to enhance the strength of the signal before transmission.
E. Transmitting Antenna: It is used to convert electrical signal into electromagnetic wave, which
can travel in the atmosphere.

Fig: Block Diagram of Transmitter

(ii) Channel: The EM waves radiated from the transmitting antenna travels through a path or medium
to reach receiver. This path or medium is called channel. There are two types of channel:
64
 A. Wired Channel: Here the medium is physical i.e. optical fiber, coaxial cable etc.
B. Wireless channel: Here, medium is air.
Noise: It is unwanted signal which will mix with the transmitted signal when it is in channel. Noise
affects the performances of communication system. There are two types of noise!-
A. Natural Noise: The source of natural noise is radiation from sun and stars.
B. Man Made Noise: The source are automobiles, motors etc.
(iii) Receiver: This section consists of:
A. Receiving Antenna: It is used to convert received EM waves from the channel into the
electrical signal.
B. Amplifier: The signal received at the receiver has suffered various types of losses in the
atmosphere. So an amplifier is needed to increase its strength.
C. Demodulator: It is used to separate carrier from the message signal.
D. Transducer: Finally, this circuit is used to convert received message signal in the electrical
form to original form (it may be text, audio, data).

Fig: Block Diagram of Receiver

Ques92: The antenna current of an AM transmitter is 8 A when only the carrier is sent, but it
increases to 8.93 A, when the carrier is modulated by a single sine wave. Find percentage
modulation. Determine the antenna current when the percent of modulation changes to 0.8.
[2020-21, 2021-22]
Ans:

65
Ques93: What do you mean by amplitude modulation? Explain with help of proper waveforms.
Derive the expression for the total Power radiated by the modulated signal. Also calculate
modulation efficiency. [2019-20, 2020-21, 2021-22, 2022-23, 2023-24, 2024-25]
OR
Derive the transmission efficiency and total power of amplitude modulated wave assuming
message and carrier wave as sinusoidal wave.
OR
Explain amplitude modulation. Derive the expression for the total power radiated by the
modulated signal. Also calculate modulation efficiency.
OR
In an amplitude-modulated wave, derive the expression for:
(i) Amplitude of sidebands. (ii) Sideband frequencies
(iii) Modulation Index (iv) Modulation Efficiency
Ans: Amplitude Modulation (AM): In amplitude modulation, the amplitude of the carrier signal is
modulated according to the instantaneous amplitude of the message signal. In this process, the
frequency and phase of the carrier remain constant.

Expression of Amplitude Modulated (AM) Signal:

Let the message signal is given as; m(t) = 𝑉𝑚 𝐶𝑜𝑠2𝜋𝑓𝑚 𝑡 .
Let the carrier signal is given as: c(t)= 𝑉𝑐 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
Then the expression of AM signal can be given as,
XAM(t) = [𝑉𝑐 + m(t)] 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
66
 Or, XAM(t) = [𝑉𝑐 + 𝑉𝑚 𝐶𝑜𝑠2𝜋𝑓𝑚 𝑡] 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
𝑉𝑚
= 𝑉𝑐 [1 + 𝐶𝑜𝑠2𝜋𝑓𝑚 𝑡] 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
𝑉𝑐
= 𝑉𝑐 [1 + 𝑚𝐶𝑜𝑠2𝜋𝑓𝑚 𝑡]𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
Here, 𝑚 is the modulation index and it is given as
𝑉𝑚
𝑚=
𝑉𝑐
So, XAM(t) = 𝑉𝑐 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡 + 𝑚𝑉𝑐 𝑆𝑖𝑛2𝜋𝑓𝑚 𝑡 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡
𝑚 𝑉𝑐 𝑚 𝑉𝑐
XAM(t) = 𝑉𝑐 𝐶𝑜𝑠2𝜋𝑓𝑐 𝑡 + 𝐶𝑜𝑠2𝜋(𝑓𝐶 + 𝑓𝑚 )𝑡 + 𝐶𝑜𝑠2𝜋(𝑓𝐶 − 𝑓𝑚 )𝑡
2 2
Here, AM signal XAM(t) has three components.
i) 𝑽𝒄 𝐶𝑜𝑠2𝜋𝑓𝑐 𝒕: This is carrier having amplitude 𝑉𝑐 and frequency 𝑓𝐶 .
𝒎𝑽𝒄 𝑚 𝑉𝑐
ii) 𝑪𝒐𝒔𝟐𝝅(𝒇𝑪 + 𝒇𝒎 )𝒕: This is upper side band (USB), having amplitude and frequency
𝟐 2
(𝑓𝐶 + 𝑓𝑚 ).

𝒎𝑽𝒄 𝑚 𝑉𝑐
iii) 𝑪𝒐𝒔𝟐𝝅(𝒇𝑪 − 𝒇𝒎 )𝒕: This is Lower side band (LSB), having amplitude and frequency
𝟐 2
(𝑓𝐶 + 𝑓𝑚 ).
Relation of Power, Current: Amplitude-modulated signal have three components:
i) Carrier
ii) USB
iii) LSB
So total Power of AM wave is sum of carrier power and power of two side bands.
𝑃𝑡 = 𝑃𝑐 + 𝑃𝑈𝑆𝐵 + 𝑃𝐿𝑆𝐵 --------------------- (1)
𝑉𝑐 2
2 𝑐𝑉2
Here, 𝑃𝑐 = = 2𝑅 --------------------- (2)
𝑅
𝑚𝑉 𝑐 2
2 2 𝑚 2 𝑉𝑐2
And, 𝑃𝑈𝑆𝐵 = 𝑃𝐿𝑆𝐵 = =
𝑅 8𝑅
𝑚2
𝑃𝑈𝑆𝐵 = 𝑃𝐿𝑆𝐵 = 𝑃𝑐 --------------------- (3)
4
Putting values from equation 2 and 3 into equation 1,
𝑚2 𝑚2
𝑃𝑡 = 𝑃𝑐 + 𝑃 + 𝑃
4 𝑐 4 𝑐
𝑚2
𝑃𝑡 = 𝑃𝑐 1 +
2
Current Relation:
𝑚2
𝑃𝑡 = 𝑃𝑐 1 +
2
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 𝑚2
𝐼𝑡2 . 𝑅 = 𝐼𝑐2 . 𝑅 1 +
2

𝑚2
𝐼𝑡 = 𝐼𝑐 1+
2

Expression for transmission efficiency of AM signal: The efficiency of any system can be given as
the ratio of desired output to total input. In AM it can be defined as,
𝑈𝑠𝑒𝑓𝑢𝑙 𝑝𝑜𝑤𝑒𝑟(𝑃𝑜𝑤𝑒𝑟 𝑜𝑓 𝑆𝑖𝑑𝑒𝑏𝑎𝑛𝑑)
𝜂=
𝑇𝑜𝑡𝑎𝑙 𝑝𝑜𝑤𝑒𝑟(Carrier power + USB Power + LSB Power)
𝑚2
𝑃𝑐
2
𝜂= 𝑚2
𝑃𝑐 1 + 2
𝑚2
𝜂= 2
𝑚 +2

Ques94: Define modulation index for AM wave. Describe AM modulation and Demodulation
technique with adequate diagram. [2021-22, 2022-23, 2023-24]
Ans: Modulation Index: In AM, modulation index is the % m amplitude variation. It is also known as
percentage of modulation. It can be given as the ratio of maximum amplitude of message to maximum
amplitude of carrier wave.
𝑉𝑚
𝑚= (0< m < 1)
𝑉𝑐
𝑉𝑚
% modulation = × 100
𝑉𝑐
AM can be classified into two parts on the basis of value of modulation index
i) Linear Modulation: If 𝑚 = ≤ 1, then AM is linear
ii) Over Modulation: If 𝑚 = > 1 Then AM is over modulation. It introduces distortion, so should be
avoided.
Amplitude modulator: AM signal can be generated with the help of square law modulator circuit as
shown-
This circuit consists of –
1) A non-linear device
2) A band pass filter
3) Carrier source and modulating signal

Here message (modulating) signal and carrier signal are connected in a series and their sum V 1(t) is
applied at the input of the nonlinear device (it may be diode or transistor). So,
𝑉1 𝑡 = 𝑚 𝑡 + 𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡 --------------------(1)
68
The input-output relation of a non-linear device is:
𝑉2 𝑡 = 𝑎𝑉1 𝑡 + 𝑏𝑉12 𝑡 --------------------(2)
Substitute 𝑉1 𝑡 from equation (1) into equation (2).
𝑉2 𝑡 = 𝑎[𝑚 𝑡 + 𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡] + 𝑏[𝑚 𝑡 + 𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡]2
𝑉2 𝑡 = 𝑎𝑚 𝑡 + 𝑎𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡 + 𝑏[𝑚 𝑡 2 + (𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡)2 + 2𝑉𝑐 𝑚(𝑡)𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡]
The present terms in the above expression are-
(i) 𝑎𝑚 𝑡 : message signal
(ii) 𝑎𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡:carrier signal
(iii)𝑏[𝑚 𝑡 2 : squared message signal
(iv) 𝑏(𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡)2 : squared message signal
(v) 2𝑏𝑉𝑐 𝑚(𝑡)𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡]: AM wave with only sidebands
Out of above five terms only term (ii) and (v) are useful. Here LC tuned circuit is used acting as band
pass filter. It’s frequency response shown below:
The Output of this band pass filter:
𝑉𝑜 𝑡 = 𝑎𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡 + 2𝑏𝑉𝑐 𝑚(𝑡)𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡
𝑉𝑜 𝑡 = [𝑎 + 2𝑏𝑚 𝑡 ]𝑉𝑐 𝑐𝑜𝑠2𝜋𝑓𝑐 𝑡
The above expression is similar to the expression of an AM signal. Thus, square law modulator can be
used to generate AM signal

Working of AM Demodulation or Detector circuit: A linear diode detector or envelope detector can
be used for the detection of AM signal.

Here, the diode is working as the main detecting component. So, sometimes, this circuit is also called a
diode detector. During the positive cycle of the input (modulated) signal, the diode conducts, and the
capacitor charges to its peak value.
During the negative cycle, the diode gets reverse-biased and the capacitor discharges through the
resistor. So, the output voltage across the capacitor is a spiky envelope of the AM wave, which is the
same as the message signal
69
Ques95: An audio frequency signal 5 sin 2π x 500t is used to amplitude modulate a carrier of 25
sin 2π x 10^5 t. calculate:
(i) Modulation Index (ii) Sideband frequency (iii) Amplitude of each sideband
(iv) Total power delivered to the load of 2K ohm (v) Bandwidth
Ans: Given: m(t) = 5 sin 2π x 500t ; Vm = 5V & fm = 500Hz
c(t) = 25 sin 2π x 10^5 t ; Vc = 25V & fc = 105Hz

70
Ques96: An audio frequency signal 10 sin 6π x 400t is used to amplitude modulate a carrier of 25
sin 4π x 10^5 t. calculate:
(i) Modulation Index. (ii) Amplitude of each sideband
(iii) Total power delivered to the load of 2K ohm (iv) Bandwidth (v) Transmission efficiency
Ans:

71
Ques97: Explain different generations and standards in cellular communication. [2023-24]
Ans:

Ques98: Explain different generations and standards in cellular communication. [2023-24]

Ans: Mobile wireless communication systems have gone through several evolution stages in the past
few decades after the introduction of the first generation of mobile networks in the early 1980s. Due to
the huge demand for more connections worldwide, mobile communication standards advanced rapidly
to support more Users.
1G (First Generation Mobile Network): The first generation of mobile networks was deployed in
Japan by Nippon Telephone and Telegraph Company in 1979. In 1980, it gained popularity in the US,
Finland, the UK and Europe. This system used analog signals and it had many drawbacks due to
technology limitations.
2G (Second Generation): This generation saw the introduction of GSM (Global System for Mobile
Communication) technology in the early 90's. It allowed digital voice and data to be sent across the
network and allowed users to roam for the first time. 2G System also ensured faster communication
with voice & data security and privacy. Many of the fundamental services like SMS, internal roaming,
conference calls, call hold real-time billing etc were introduced in the Generation of mobile
communication
2.5G: At the beginning of 2000, an upgrade in technology introduced the packet network, which -
provided high-speed data transfer and internet. and this generation is called 2.5G.
Here, the technologies used are GPRS (General Packet Radio Service) and EDGE (Enhanced Data Rate
for GSM); GPRS supports flexible data transmission rates and provides a continuous connection with
the network.

72
3G (Third Generation Mobile Communication): It was introduced commercially in 2001. The major
aims of third-generation mobile networks were to facilitate greater voice and data capacity, support a
wider range of applications and increase data transmission rate at a lower cost.
For the first time, this generation provided high-speed wideband internet access as well as fixed
wireless internet access. Various new facilities are introduced, such as video calls, chatting and
conferencing, mobile TV, video on-demand services, navigational maps, mobile gaming etc. Along with
these new features, security is also increased in the 3G mobile communication network.
4G (Fourth Generation Mobile Communication): Started in 2010, it is an enhanced version of 3G
networks developed by IEEE, offers a larger data rate and is capable of handling more advanced
multimedia Services LTE (Long term evolution) and LTE advanced wireless technologies are used in
4G systems: Simultaneous transmission of voice and data is possible with, LTE system which
significantly improves data rate. Wireless transmission technologies like Wi-max are introduced in the
4G system to enhance data rate and network performance.
5G (Fifth Generation Mobile Communication): This generation is using advanced technologies to
deliver ultra-fast internet and multimedia experiences for customers. In order to achieve a higher data
rate, 5G Technology will use millimeter waves and unlicensed spectrum for data transmission. Complex
modulation techniques have been developed to support massive data rate.

Ques99: Write a short note on the satellite communication system.

OR
Explain the basics of satellite communication systems.
OR
Enlist the merits of Satellite Communication. [2022-23, 2023-24]
Ans: Satellite Communication: A satellite is a smaller object that revolves around a larger object in
space. For example, the moon is a natural satellite of Earth. When communication takes place between
two earth stations through a satellite, then it is called as satellite communication. In this communication,
EM waves are used as carrier signals. These signals carry information such as voice, audio, video or any
other data between ground and space and vice versa.
There are two types of satellites:
(1) Artificial.
(2) Natural.
Artificial satellites are specially designed and launched into space for different applications such as
weather monitoring, navigation, TV & mobile communication, planetary research, etc. Ex-INSAT, IRS,
GSAT etc.
Natural satellite is any celestial body in space that orbits around a larger body. Earth revolves around
the sun, so it is a satellite. Similarly, the moon revolves around the Earth, so it is also a natural satellite.
Need for Satellite Communication: In the communication process, the transmission of signals used to
occur in two different ways in earlier days. These are ground wave propagation and sky wave
propagation. But the maximum distance of communication is limited to 1500 km in both propagations.
Satellite communication overcomes this limitation. Here communication beyond the line of sight
distance is possible
Working: Satellite communication involves four steps: -
1) An uplink earth station or other ground equipment transmits the desired signal to the satellite. The
frequency with which the signal is transmitted is called Uplink frequency.
2) The satellite amplifies the incoming signal and changes the frequency.
73
3) The satellite transmits the signal back to Earth. The frequency of the signal sent back to the earth is
called Downlink frequency.
4) The ground equipment receives the signal.

Ques100: Explain the radar system using proper block diagrams. [2022-23]
Ans: Radar communication: Radar is a detection system that uses radio waves to determine the range,
angle or velocity of the objects. It can be used to detect aircraft, ships, spacecraft, guided missile etc.
Elements of Radar Communication System:
i) Transmitter: For transmitting signal.
ii) Antenna: used to transmit and receive signal.
iii) Receiver: used to receive signal.
iv) Power Supply: Used to provide power.
Radio waves from the transmitter reflect off the object and return to the receiver, giving information
about the object’s location and speed.
Principle of working:

Transmitter of the radar system emits radio waves in predetermined direction. When these signals meet
an object, they are usually reflected in many directions. The signal reflected back towards the radar
receiver are used for detection purpose. The time taken by the radar signal to reach the destination and
return back to the radar receiver is used for obtaining the range of the object to be detected. If the object
is not fixed and moving away or towards the transmitter, there will be slight change in the frequency of
received signal due to Doppler effect.
74