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CSE 460 - Spring - 25 - Assignment 2

The document outlines a series of assignments for CSE 460, focusing on designing finite state machines (FSMs) for various problems involving binary sequences. Tasks include creating Moore and Mealy FSMs for a snail that reacts to specific digit patterns, detecting conditions based on previous inputs, and designing circuits based on consecutive bits. The assignments require both theoretical understanding and practical design skills in FSMs.

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0% found this document useful (0 votes)
6 views1 page

CSE 460 - Spring - 25 - Assignment 2

The document outlines a series of assignments for CSE 460, focusing on designing finite state machines (FSMs) for various problems involving binary sequences. Tasks include creating Moore and Mealy FSMs for a snail that reacts to specific digit patterns, detecting conditions based on previous inputs, and designing circuits based on consecutive bits. The assignments require both theoretical understanding and practical design skills in FSMs.

Uploaded by

arnab.biswas58
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CSE 460, Spring 25

Assignment 2
Q1. Alyssa P. Hacker has a snail that crawls down a paper tape with 1’s and 0’s on it. The snail smiles
whenever the last two digits it has crawled over are 01. Design Moore and Mealy FSMs of the snail’s
brain.

Q2. The output z is equal to 1 if during three immediately preceding clock cycles the input w was equal
to 1. Otherwise, the value of z is equal to 0. Identify the type of FSM and design the FSM for solving this
problem.

Q3. The output z is equal to 1 when the number of 1’s in all previous cycles is odd and z is equal to 0
when the number of 1’s in all previous cycles is even. Design the FSM for solving this problem.

Q4. Consider a sequential circuit that detects if two consecutive bits are the same or not. The circuit
generates an output z=1 if two consecutive bits are opposite and z=0 if the bits are the same. The
output changes in the same clock cycle where the input is received.

Consider overlapping bit sequence


(a) Determine the type of FSM required for solving this problem. 1
(b) Draw the state diagram of the circuit. 3
(c) Derive a state-assigned table from (b) using the gray-encoding technique. 3
(d) Find the next-state and output logic expressions using k-map.

Q5. Derive a Mealy-type FSM that can act as a sequence detector that gives an output of 1 when
detects the pattern 00 or 11.

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