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Synchronous Sequential Circuits

1. Synchronous sequential circuits are circuits whose outputs depend on the current inputs as well as the circuit's history of previous inputs. They contain a combinational logic part and a register part that provides feedback. 2. A 110 sequence detector circuit is designed using a state diagram and state table to determine the circuit's behavior and outputs based on the sequence of inputs over time. 3. Moore and Mealy machines are two common types of sequential circuits. Moore machines have outputs that depend only on the current state, while Mealy machines have outputs that depend on both the current state and current inputs.

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Denise Nelson
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111 views

Synchronous Sequential Circuits

1. Synchronous sequential circuits are circuits whose outputs depend on the current inputs as well as the circuit's history of previous inputs. They contain a combinational logic part and a register part that provides feedback. 2. A 110 sequence detector circuit is designed using a state diagram and state table to determine the circuit's behavior and outputs based on the sequence of inputs over time. 3. Moore and Mealy machines are two common types of sequential circuits. Moore machines have outputs that depend only on the current state, while Mealy machines have outputs that depend on both the current state and current inputs.

Uploaded by

Denise Nelson
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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SYNCHRONOUS SEQUENTIAL CIRCUITS



Introduction Huffman Model Sequence Detector Moore Machine Mealy Machine One Hot and One Cold Implementation Handshaking Designing a Garage Door Opener Shift Register Sequential Multiplier

Introduction
System

Data
Reg File

Control

Logic

Reg

SM1

SM2

SM3

Since now what we have done is how to build a circuit that does an especial task for us, not important when the task was done, Data-path, But now we want to focus on when the task will be done, Controller. We start our discussion with a sequence detector. So the steps will be
Problem Description State assignment Excitation table State diagram Transition table Karaugh map State table Flip-flop type Circuit

Huffman Model
The model we will be using in which everything happening
is synchronized to a clock that is implicitly part of our circuit is called the Huffman Model as seen in the following figure
PI

Each sequential circuit that you will see has a combinational part and a register part where the register part feedbacks its output to the combinational part. What we need to be able to design such circuits with practical speed is a straight forward method.

Comb.

PO

Seq.
C1

clock

Sequence Detector
As our first design we will see a 110 detector that will give a
high output whenever clocked with such a sequence on its input. Obviously such a circuit is sequential because its output relies on a series of certain inputs in its history.
x

110

c To do our circuit design of this problem we start from its state diagram. We may even not know how many states we need When doing our the design of sequential but In we work our way through different synchronous sequential circuits such as circuits we consider the clock pulse to be states.

that of this problem, anything happening implicit and no gating must be done on this when the clock is in its active state. signal.

Moore Machine
This The problem same method can be can the be same applied as to looking our problem, for a special where
sequence ofis shops when walking along a 1road. Consider seeing a 0 seeing a grocery store and a is a book shop. Thus aslooking we saw above a 0 first must not our you are for 2 seeing book shops followed bychange a grocery store. state Now and so if we on. seeApplying a grocery this store method first we to simply our problem ignore it (meaning gives the that following we stay state in our diagram initial state), but seeing a book shop we will need to remember that we have passed the first In our flow of design the only part that shop we were looking in mechanical that special sequence (meaning doesnt actually for involve steps is the drawing of the problems state diagram. that we change to a new state).
0 1 1 1 0

a 0

b 0
0

c 0
1

d 1

Moore Machine ( cont. )


We saw the state diagram, now we want to work through a
couple more states to be able to find the circuit itself. First we change the state diagram to a tabular form as shown in this figure. This table is called a state table that nears the state diagram to tables we saw before, such as the Karaugh map etc.
x Ultimately we need a form of Out-put this table mapped 0 that 1can be in a Karnaugh Map. To do this 00 00 01 to replace 0 we naturally need the state names with numbers. We 01 00 use11 0 can binary state assignment, where a unique 11 binary 10 number 11 is used 0 to represent each state. 10 00 01 1 x
Out-put The next step ofwe our synthesis is a decision State 0 ever1 Until now havent that talked has to about be made about the type of flip having a clock

00use. flop we want to aBut it can a be b 0 explicitly. Because of the 4 states we have we will need implied from the fact 01 b(referring a that c Huffman 0 2 feedback lines to the transition we have referred to a next model) means 2 flip flops with one table and thisstate. d c 0 11 c clock on them. 10 d

+ +

+ (next state)

Moore Machine ( cont. )


Static flip flops can be used with any frequency less than Lets consider a state where a model hazard may occur in the The stage that was mentioned(after choosing a that particular Considering the Huffman and the fact we the maximum which is decided considering the above point marked * in the circuit of the last example. Reality mentioned, but when we are using dynamic flops weinputs we have now the excitation tables for theflip flip flop has it that we neednt worry about this happening because flip flop) is to form an excitation table considering that also need to be concerned about a minimum frequency, it can be easily solved by setting the clock frequency to can find the glue logic needed before the inputs of the because may be lost if wethus do not refresh the work on thedata worst case delay and after any hazards particular flip flop indone order to reach a stage where we can flip flops. This is by mapping transistors in time. that may occur in such parts of a circuit.the data in the

excitation table on a Karnaugh Map for D1 and D0 move what weve had so far to a Karnaugh Map.
x 0 1 1 Q+=D If we choose a D flip 1 0 1 0 0flop 00 0 x
x

D1
Combinational

Out-put(w) v1

1 1 1 1

00 0

0 1 1 0

01 0
11 0
x

clock

00
01 11
clock

00
v0

01
11

0
0
+ v0 0

1 01

00
D0

0 0

11 1

10 v1
clock

11

v0

10 w

0 10 0

v1

10

00 Huffman01 Model

1
w

0 = x

w = 1 .0

1 = x.0 + 1 .0

Mealy Machine
If we relax timing issues a little in our design, another sate
machine that can be more minimal can be used. In this machine called the Mealy Machine, the output is dependent on input changes and thus is no longer synchronized to the clock. The following is the Mealy machine for the 011 detector. The output changes to 1 as soon as the 0 of the sequence is seen.
0
0/0

1 0

1 0
1/0

1 0
1/0

State Table Transition Table x


x

x
D 1
1

00 01 11 10

00 01

00 01 11 10
c

0 0 1

1/0

0 0 0

v1

0a 1 0 1
0/0

0b 1 0
0/1

00 00 a
01 01 b 11 11 c

00 a
00 a

01 b
11 cD
0

0
0

0
v0

11 10

0 1

0 0
w

0 = x

1 = x.0

w = .1

00 a 11 c clock + +

out-put

Mealy Machine ( cont. )

In some cases, relaxing time issues of the problem and using Mealy machines can help a lot in less hardware use.

The contribution of the input signal to the output in Mealy machines means less precision because any hazard on the input (noise, hazards from the levels before etc) can easily propagate onto the output. Because of such problems, Mealy machines can be never used in very precise designs.

10

Mealy Machine ( cont. )


In synchronous sequential circuits we only care The following timing shows the differences in the about the outputsdiagram value on clock pulses and we dont care aboutoutput its valuevery at instances in between. two state machines clearly. The contribution of Another thing to be mentioned is that Mealy the input on the output canone be clock seencycle in the timing diagram machine gives the output earlier.

as well
a a a a b b c c d a a a

clock

x x

w (Moore machine)
x

w (Mealy machine)

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