Ladder Logic 12
Ladder Logic 12
Ladder diagrams ( sometimes called "ladder logic ) are a type of electrical notation and symbology frequently used to illustrate how electromechanical switches and relays are interconnected. A Ladder diagram basically consists of two things:
Rails
Rungs
Components of Ladder
The two vertical lines in a ladder are called Rails" and are attach to opposite poles of a power supply.
001
002
003
Logical Continuity
Each rung of ladder logic generally consists of two components. Conditional Instructions Output Instructions If there is a path of true conditional instructions, then the rung goes true and outputs occur.
SW-1 SW-2 MOTOR-1
SW-4
SW-5
LIGHT-2
Types of Instructions
Bit Instructions ( Input , Output , One Shot ) Timer Instructions Counter Instructions
Compare Instructions
Math Instructions Program Flow Instructions Block Transfer Instructions PID Instruction
Bit Instructions
Input Instructions:
XIC ( Examine If Close )
I:011
BIT STATUS ON
INSTRUCTION TRUE
15
Bit Instructions
Input Instructions:
XIC ( Examine If Open )
I:022
BIT STATUS ON
INSTRUCTION TRUE
15
Bit Instructions
Output Instructions:
OTE ( Output Energize ) Bit O:033/15 is high till the input conditions are true
O:033
BIT STATUS ON
15
Bit Instructions
Output Instructions:
OTL ( Output Latch )
Bit O:033/15 remains high even after rung is false. OTL can only turn-on a bit.
O:033 RUNG STATUS TRUE BIT STATUS ON
L
15 O:033
FALSE
NO CHANGE
L
15
Bit Instructions
Output Instructions: OTU ( Output Unlatch )
U
Bit O:033/15 turns OFF when the rung is true. OTU can only turn-off a bit.
O:033 RUNG STATUS TRUE BIT STATUS OFF
U
15 O:033
FALSE
NO CHANGE
U
15
Bit Instructions
One Shot Instruction : ONS ( One Shot )
ONS
One-shot is used when it is required to enable the output only for one program scan upon a false to true transition of the conditions preceding the ONS instruction.
A unique address must be dedicated to each ONS instruction. ONS reference bit can be stored in a Binary or Integer file.
Bit Instructions
One Shot Instruction : Scan 1
ONS
Scan 2
ONS
Scan 3
ONS
Scan - 4
ONS
Logic Gates
Timer instructions
Timer Instruction Structure : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T4:0 EN TT DN
Preset Value ( 16 Bit )
Timer instructions
Timer Control Word :
.PRE Preset bit .ACC Accumulator bit .TT Timer timing Time base Specifies the value which the timer should reach before the processor sets/resets the .DN bit. Range : 0 32,767 Number of time increments the instruction has counted Counting starts from the value entered in this word. ( Typical value = 0 ) This bit is set the timer is timing 1 Sec : 0.01 Sec : Range = 32767 time base intervals ( 9.1 hours ) Range = 32767 time base intervals ( 5.5 minutes )
Timer instructions
Timer On Delay ( TON ) : This instruction is used to delay turning ON an output.
TON
EN
DN
Timer instructions
TON Status Bits :
EN 0 1 1
TT 0 1 0
DN 0 0 1
Timer instructions
TON Example :
I:011 TON
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TON Example :
I:011 TON
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TON Example :
I:011 TON
12
EN
DN O:012
T4:TT
TT T4:0
12
O:012
DN
13
Timer instructions
TON Example :
I:011 TON
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TON Example :
I:011 TON
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
Timer Off Delay ( TOF ) : This instruction is used to delay turning OFF an output.
TOF
EN
DN
Timer instructions
TOF Status Bits :
EN 1 0 0
TT 0 1 0
DN 1 1 0
Timer instructions
TOF Example :
I:011 TOF
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TOF Example :
I:011 TOF
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TOF Example :
I:011 TOF
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TOF Example :
I:011 TOF
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
TOF Example :
I:011 TOF
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
Retentive Timer ( RTO ) : A Retentive Timer lets the timer stop without resetting the accumulated value.
RTO
EN
DN
Timer instructions
RTO Status Bits :
EN 0 1 0 1 0
TT 0 1 0 0 0
DN 0 0 0 1 1
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
T4:0
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO
12
EN
DN O:012
TT T4:0
12
O:012
DN
13
Timer instructions
RTO Example :
I:011 RTO 12
EN
DN O:012
T4:0
TT T4:0
12 O:012
DN I:011
13 T4:0
RES
13
Timer instructions
RTO Example :
I:011 RTO 12
ACC reset
T4:0
EN
DN O:012
TT T4:0
12 O:012
DN I:011
13 T4:0
RES
13
Counter Instructions
Counter Instruction Structure : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C5:0 CU CD DN OV UN
Preset Value ( 16 Bit ) Accumulated Value ( 16 bit )
Counter Instructions
Counter Control Word :
.PRE Preset bit
.ACC Accumulator bit .CU Count-up enable .CD Count-down enable .DN Done bit .OV Overflow bit .UN Underflow bit
Specifies the value which the counter should reach before the processor sets/resets the .DN bit. Range : 32,767 to + 32,767
Number of false-true transitions instruction has counted Bit SET when rung containing count-up instruction is true Bit SET when rung containing count-down instruction is true Bit SET when PRE = ACC Bit SET when counter has counted above upper limit +32,767 Bit SET when counter has counted below lower limit - 32,767
Counter Instructions
Counter Value Range :
0
-1 1
-32,767 UV Set
+32,767 OV Set
Counter Instructions
Count-up ( CTU ) :
Each time rung goes from false true ACC value increases by 1
CTD
EN
DN
Counter Instructions
CTU Status - Bits :
Rung
ACC
CD
DN
True
False
<PRE
<PRE
1
0
0
0
True
False
>=PRE
>=PRE
1
0
1
1
Counter Instructions
Count-down ( CTD ) :
Each time rung goes from false true ACC value decreases by 1
CTD
EN
DN
Counter Instructions
CTD Status - Bits :
Rung
ACC
CD
DN
True
False
<PRE
<PRE
1
0
0
0
True
False
>=PRE
>=PRE
1
0
1
1
Counter Instructions
Counter Reset ( RES ) :
Reset instruction is an output instruction that resets a timer or counter. It is set when its rung is true. Address of reset instruction is the address of timer/counter it is resetting.
RES
Compare Instructions
Equal To ( EQU ) :
EQU is used to test whether two value are equal. If source A is equal to Source B than output is energized.
EQU
O:012
N7:9 N7:10
12
Compare Instructions
Greater Than Or Equal To ( GEQ ) :
GEQ is used to test whether Source A is greater than Source B. Source A or Source B can be value or addresses that contain values.
GEQ
O:012
12
Compare Instructions
Greater Than ( GRT ) :
GRT is used to test whether Source A is greater than Source B. Source A or Source B can be value or addresses that contain values.
GRT
O:012
N7:9 N7:10
12
Compare Instructions
Less Than Or Equal To ( LEQ ) :
LEQ is used to test whether Source A is less than or equal to Source B. Source A or Source B can be value or addresses that contain values.
LEQ
O:012
12
Compare Instructions
Less Than ( LES ) :
LES is used to test whether Source A is less than Source B. Source A or Source B can be value or addresses that contain values.
LES
O:012
N7:9 N7:10
12
Compare Instructions
Limit Test ( LIM ) :
LIM is an input instruction that is used to test for value inside of outside of a specified limit. When the value being monitored is within limit the output goes true. Low / High Limit can be a value or addresses that contains values
LIM
Limit Test ( CIRC) Low Limit N7:10 Test N7:11 High Limit N7:12
O:012
12
Compute Instructions
Compute instructions evaluate arithmetic operations using an expression or a specific arithmetic instruction. Following are commonly used math instructions:
Compute Instructions
Arithmetic Status Flags: The arithmetic status flags are stored in Bits-0, 1, 2 & 3 of Word 0 of the processor status file.
S:0/0 CARRY ( C ) ZERO ( Z ) SIGN (S ) Sets when Carry is generated Sets if result is zero Sets if result is negative
S:0/1
S:0/2 S:0/3
You can use either Integer or Floating point values. If source is floating point , Destinations should also be a floating point address else result will be rounded off If you enter BCD or ASCII values, processor treats those values as integers.
Compute Instructions
Compute Instruction ( CPT ):
Compute instruction is an output instruction. Its operation is defined by the expression given in the instruction. This instruction can perform various operations other than computing like:
COMPUTE
Destination Expression
Compute Instructions
Valid CPT Operators:
Enhanced PLC processors support more operators ( Sine, Cosine, Tangent, AND, OR, XOR etc. )
Type Copy Clear Arithmetic Operator None None + * SQR Description Copy from A to B Set a value to zero Add Subtract Multiply Negate SQUARE ROOT Example Enter Source in Expression and Desti. in destination Enter 0 for expression 2+3 11 4 12 * 3 24 I 2 - N7:0 SQR N7:2
Compute Instructions
CPT - Example:
CPT
I:012
COMPUTE
Destination
N7:21
12
If input I:012/12 is SET divide value in N7:5 by 5 and divide the result by value in N7:6. Move the final result to destination address N7:21.
Compute Instructions
Addition ( ADD ):
When input condition is true adds Source A and Source B and stores the result in destination address. Status flags are set in status file as defined earlier.
I:012
ADD
ADD
12
Source A Source B
Destination
N7:2 N7:3
N7:21
If input I:012/12 is SET add values in N7:2 & N7:3 and store the result in N7:21
Compute Instructions
Subtract ( SUB ):
When input condition is true subtract Source B from Source A and stores the result in destination address. Status flags are set in status file as defined earlier.
I:012
SUB
SUBTRACT
12
Source A Source B
Destination
N7:2 N7:3
N7:21
If input I:012/12 is SET subtract value in N7:3 from value in N7:2 and store the result in N7:21
Compute Instructions
Divide ( DIV ):
When input condition is true divide Source A from Source B and stores the result in destination address. Status flags are set in status file as defined earlier.
I:012
DIV
DIVIDE
12
Source A Source B
Destination
N7:2 N7:3
N7:21
If input I:012/12 is SET divide value in N7:2 by value in N7:3 and store the result in N7:21
Compute Instructions
Multiply ( MUL ):
When input condition is true divide Source A from Source B and stores the result in destination address. Status flags are set in status file as defined earlier.
I:012
MUL
MULTIPLY
12
Source A Source B
Destination
N7:2 N7:3
N7:21
If input I:012/12 is SET multiply value in N7:2 and value in N7:3 and store the result in N7:21
Compute Instructions
Clear ( CLR ):
When input condition is true CLR sets all the bits of the destination word to zero.
CLR
I:012
12
Move Instructions
Move ( MOV ):
MOV instruction is a output instruction that copies the source address to the destination address. The instruction moves data each scan till the rung is true.
The source and destination data should be same as this instruction does not perform a conversion.
I:012
MOV
12
Destination
Move Instructions
Masked Move ( MVM ): MOV instruction is a output instruction that copies the source address to the destination address while allowing some portion of data to be masked. The instruction moves data each scan till the rung is true. You can use MVM to copy I/O image, Binary or Integer values. MASK : is an address or Hexadecimal value that specifies which bit to pass or block. ( Set 1 to mask the data ; Set 0 to block ) Data passed from masked bit overwrites the corresponding bits in the destination address. Other bits remain unchanged.
Move Instructions
MVM Example:
MVM
Mask F0F0
N7:21 After move
0 1
JMP
Jump (JMP) : When Jump instruction is true it lets processor skip rungs.
LBL
Label (LBL ) : Label instruction is the target of the Jump instruction that has same label number. LBL should be the first instruction on the rung.
AFI
BLOCK TRANFR WRITE Rack Group Module Control Block Data file Length Continuous
EN
DN
Module
Control Block Data File Length Continuous