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Bi Cmos Technology

This document discusses BiCMOS technology. It begins by defining BiCMOS as a technology that combines bipolar and CMOS logic. It then discusses why BiCMOS was introduced, the BiCMOS fabrication process, CMOS and BiCMOS inverter circuits, and comparisons of speed, area, and dynamic characteristics between CMOS and BiCMOS. Pros and cons of BiCMOS are outlined, along with applications, current products, and future trends of BiCMOS technology.

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549 views

Bi Cmos Technology

This document discusses BiCMOS technology. It begins by defining BiCMOS as a technology that combines bipolar and CMOS logic. It then discusses why BiCMOS was introduced, the BiCMOS fabrication process, CMOS and BiCMOS inverter circuits, and comparisons of speed, area, and dynamic characteristics between CMOS and BiCMOS. Pros and cons of BiCMOS are outlined, along with applications, current products, and future trends of BiCMOS technology.

Uploaded by

mbiswasray_iter
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Submitted by:

Manas Ranjan Biswasray


0601212529
AE&I, 7TH SEM.
TALK FLOW
 What is BiCMOS
 Why BiCMOS
 BiCMOS fabrication process
 CMOS inverter
 BiCMOS inverter
 Comparison between CMOS and BiCMOS
 Pros and Cons
 Applications
 Current status and future trends
WHAT IS BiCMOS
 Bipolar compatible CMOS(BiCMOS)
tehnology:
 Introduced
in early 1980s
 Combines Bipolar and CMOS logic
 BiCMOS
BiCMOS

CMOS BIPOLAR
Low power dissipation High speed
High packing density High output drive
WHY BiCMOS
 For greater integration of mixed-signal analog systems
 To cover full delay-power space
BiPOLAR
Speed

BiCMOS

CMOS Power

Adapted from Kiat-Seng Yeo et al.,”CMOS/BiCMOS ULSI:Low voltage,Low


power”,Pearson Education,Inc., First edition,p.2,2002
BiCMOS FABRICATION PROCESS

Adapted from A.R.Alvarage et al.,”An overview of BiCMOS Technology and


Applications”,IEEE International Symposium on Circuits and Systems,1-3
May,1990
BiCMOS CROSS-SECTION

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective, NewJersey: Prentice-Hall, Inc., 1996.
BiCMOS CROSS-SECTION

Adapted from J. P. Uremuya, Circuit Design for CMOS VLSI, Massachusetts:


Kluwer Academic Publishers, 1992.
CMOS INVERTER
CIRCUIT DIAGRAM
VDD

IP
OP

GND

Adapted from www2.eng.cam.ac.uk/~dmh/3b2/invert.htm


BASIC BiCMOS INVERTER

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective,New Jersey: Prentice-Hall, Inc., 1996.
CONVENTIONAL BiCMOS INVERTER

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective,New Jersey: Prentice-Hall, Inc., 1996.
PULL UP EVENT

C load

Adapted from Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated


Circuits:Analysis and Design”,Tata McGraw-Hill,Third edition,2003,p.547.
PULL DOWN EVENT

C load

Adapted from Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated


Circuits:Analysis and Design”,Tata McGraw-Hill,Third edition,2003,p.550.
BiCMOS VS. CMOS
VTC DYNAMIC CHARACTERISTICS

CMOS

BiCMOS

Adapted from www2.eng.cam.ac.uk/~dmh/3b2/invert.htm


SPEED COMPARISON

Adapted from Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS


within a BiCMOS Technology”,IEEE J. of solid-state circuits, Vol. 27, No.
3, March1992
DELAY COMPARISON

Adapted from Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS


within a BiCMOS Technology”,IEEE J. of solid-state circuits, Vol. 27, No. 3,
March 1992
AREA COMPARISON

A AREA

C COMPLEXITY

Adapted from H.Klose et al.,”Bicmos,a tehnology for High speed/High


density ICs”,IEEE international conference on Computer Design:VLSI in
computers and proessors,2-4 Oct.,1989
PROS OF BiCMOS
 Improved speed over CMOS
 Improved current drive over CMOS
 Improved packing density over bipolar
 Lower power consumption than bipolar
 High input impedance
 Low output impedance
CONS OF BiCMOS
 Increased manufacturing process complexity
 Speed degradation due to scaling

Adapted from Paul G. Y. Tsui et al.,”Study of BiCMOS Logic Gate


Configurations for Improved Low-Voltage Performance”, IEEE J. of solid-
state circuits, Vol. 28, No 3. March 1993.
CONS OF BiCMOS(CONTD.)
 Hot carrier degradation

Adapted from J. David Burnett and Chenming hu,”Hot-Carrier Degradation in Bipolar


transistors at 300 and 110 K-Effect on BiCMOS Inverter Performance”, IEEE
Trasactions On Electron Devices,Vol 17. No 3. April 1990.
APPLICATIONS
 Full custom ICs
 SRAM,DRAM
 Microproessor,controller
 Semi custom ICs
 Register,Flipflop
 Standard cells
 Adders,mixers,ADC,DAC
 Gate arrays
CURRENT STATUS AND
FUTURE TRENDS
 SiGe BiCMOS HP
 SiGe BiCMOS WL
 SiGe HBT
BiCMOS PRODUCTS

SiGe BiCMOS GPS CIRCUIT GSM 900 POWER AMPLIFIER

Adapted from D.Harame et al.,”The Emerging Role of SiGe BiCMOS Technology


in Wired and Wireless Communications”, Fourth IEEE International Caracas
Conference on Devices, Circuits and Systems, Aruba, April 17-19, 2002.
BiCMOS PRODUCTS(CONTD.)

W-CDMA DCR
OC-48c SONET/SDH Mapper

Adapted from D.Harame et al.,”The Emerging Role of SiGe BiCMOS Technology


in Wired and Wireless Communications”, Fourth IEEE International Caracas
Conference on Devices, Circuits and Systems, Aruba, April 17-19, 2002.
CONCLUSION
 The extra process complexity requires
chip manufacturers to command a
premium for BiCMOS products. In the
analog market the ability to integrate large
mixed systems provides the compelling
cost advantage of BiCMOS; this market is
still emerging.
 BiCMOS is a complement to pure CMOS
and Bipolar technologies in important
system application areas.
REFERENCES
[1]Kiat-Seng Yeo et al.,”CMOS/BiCMOS ULSI:Low voltage,Low power”,Pearson
Education,Inc., First edition,2002.
[2]Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated Circuits:Analysis and
Design”,Tata McGraw-Hill,Third edition,2003.
[3]E.A.Gonzalez,”BiCMOS processes,trends and applications”,DLSU ECE,Technical
report,Nov.29,2004.
[4]A.R.Alvarez et al.,”An overview of BiCMOS technology and applications”,IEEE
International Symposium on Circuits and Systems,1-3 May,1990.
[5] T. Sakurai, “A review on low-voltage BiCMOS circuits and a BiCMOS vs. CMOS speed
comparison,” Proceedings of the 35th Midwest Symposium on Circuits and Systems,
vol. 1, Aug. 9-12 1992.
[6] J. M Rabaey, Digital Integrated Circuits: A Design Prespective, NewJersey: Prentice-
Hall, Inc., 1996.
[7] J. P. Uremuya, Circuit Design for CMOS VLSI, Massachusetts: Kluwer Academic
Publishers, 1992.
[8] Adapted from H.Klose et al.,”Bicmos,a tehnology for High speed/High density
ICs”,IEEE international conference on Computer Design:VLSI in computers and
proessors,2-4 Oct.,1989
[9] Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS within a BiCMOS
Technology”,IEEE J. of solid-state circuits, Vol. 27, No. 3, March 1992
[10] Paul G. Y. Tsui et al.,”Study of BiCMOS Logic Gate Configurations for Improved Low-
Voltage Performance”, IEEE J. of solid-state circuits, Vol. 28, No 3. March 1993.
[11] D.L.Harame,”Current Status and Future Trends of SiGe BiCMOS Technology” IEEE
transactions on electron devices, vol. 48, no. 11, november 2001
[12]Adapted from D.Harame et al.,”The Emerging Role of SiGe BiCMOS Technology
in Wired and Wireless Communications”, Fourth IEEE International Caracas
Conference on Devices, Circuits and Systems, Aruba, April 17-19, 2002.

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