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Sram Memory Cell: By:-Udit Shah & Rajdeep Kandiyal

This document discusses SRAM memory cells. It begins by explaining that SRAM is a type of random access memory that is static, meaning it does not require periodic refreshing of stored data like DRAM. It then provides details on the basic 6-transistor SRAM cell design, including its read and write operations. The document outlines various types of SRAM like low power, fast, and synchronous SRAM. It concludes by describing characteristics of SRAM such as being faster and less power hungry than DRAM, though less dense. SRAM is commonly used where bandwidth or low power are priorities.

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SrasVel
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0% found this document useful (0 votes)
54 views

Sram Memory Cell: By:-Udit Shah & Rajdeep Kandiyal

This document discusses SRAM memory cells. It begins by explaining that SRAM is a type of random access memory that is static, meaning it does not require periodic refreshing of stored data like DRAM. It then provides details on the basic 6-transistor SRAM cell design, including its read and write operations. The document outlines various types of SRAM like low power, fast, and synchronous SRAM. It concludes by describing characteristics of SRAM such as being faster and less power hungry than DRAM, though less dense. SRAM is commonly used where bandwidth or low power are priorities.

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SrasVel
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© © All Rights Reserved
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Download as PPTX, PDF, TXT or read online on Scribd
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SRAM MEMORY CELL

BY :- UDIT SHAH & RAJDEEP KANDIYAL

Memory Arrays
Memory Arrays

Random Access Memory

Read/Write Memory
(RAM)
(Volatile)

Static RAM
(SRAM)

Dynamic RAM
(DRAM)

Mask ROM

Programmable
ROM
(PROM)

Content Addressable Memory


(CAM)

Serial Access Memory

Read Only Memory


(ROM)
(Nonvolatile)

Shift Registers

Serial In
Parallel Out
(SIPO)

Erasable
Programmable
ROM
(EPROM)

Queues

Parallel In
Serial Out
(PISO)

Electrically
Erasable
Programmable
ROM
(EEPROM)

SRAM

First In
First Out
(FIFO)

Last In
First Out
(LIFO)

Flash ROM

Slide
2

Read-Write Memories (RAM)

Static (SRAM)
Data stored as long as supply is applied
Large (6 transistors per cell)
Fast
Differential signal (more reliable)

Dynamic (DRAM)
Periodic refresh required
Small (1-3 transistors per cell) but slower
Single ended (unless using dummy cell to generate
differential signals)

Static SRAM(SRAM)
SRAM :Is static memory.
The term static is derived from the fact

that it doesn't need to be refreshed like


dynamic RAM.
Has cycle time is much shorter than that

of DRAM because it does not need to


pause between accesses.
Is often used only as a memory cache

SRAM Features:1.Low Power SRAM

Low Power Supply Voltage : 5V -> 3V -> 1.8V


-> sub 1.0V
-> Low Power Dissipation for Handheld
Application
Low Standby Power Dissipation : 100uA ->
10uA -> 1uA
-> support for Data Retention Application

2.FAST SRAM Power Supply Voltage : 5V, 3.3V


Low Operating Power Dissipation
-> Application for large amount of SRAM usage
FAST Speed requirements : 8ns-20ns

3.Synchronous SRAM

Low Power Supply Voltage : 3.3V -> 2.5V ->


1.8V
-> Small geometry Transistor technology to
improve speed
Various Sync. SRAM Features:
-> Late Write operation to enhance the bus
efficiency

High Bandwidth Interface :


FAST Speed Requirements : 150MHz-over
500MHz(1Gbps)
High Performance Package Solution

DESIGN:-

Ax
VDD

Data line

M2
M5

M4
M6

Q
M1

M3
Ay

Write

M9
Data i/p

Data line

M8

Read
M10

M7

Data o/p

6-transistor SRAM Cell

Operation
To write: W=1, M9 ON.

1- If data i/p=1,vltg at Q will be high.


2- If data i/p=0,vltg at Q will be low.
Hence we have a static situation as lon as bias is
applied.
To read:R=1, thus complement of the data level
written into cell is read at data o/p.

TYPES
A. Bipolar1.Application for ultra high speed SRAM

Cache and Main Memory in high performance


mainframe computers
ECL interface
2.High cost and High power dissipation

B. NMOS1.Lower cost than Bipolar


2.Limitation of high density and high performance
due to complicated circuit design
Need dynamic circuit and bootstrapped circuit
technique
3.Limitation of low power dissipation and high
speed

C. Bi-CMOS- High speed

.
.
.
.
.

application for small volume/high performance


Complicated process [7][8]
use triple diffused BiCMOS process
Limitation of low power supply voltage [9]
improve the MOS Transistor (Lower Vth)
use BiNMOS or NBiCMOS
Base boost technique

D. CMOS1. Low cost and low power dissipation

2. Easy to make high density SRAM


3.Limitation of high speed
Improve the MOS Transistor
Use Dynamic Gate Logic

CHARACTERISTICS: SRAM is more expensive, but faster and

significantly less power hungry (especially idle)


thanDRAM.
It is therefore used where either bandwidth or
low power, or both, are principal considerations.
SRAM is also easier to control (interface to) and
generally more trulyrandom access than
modern types of DRAM.
Due to a more complex internal structure, SRAM
is less dense than DRAM and is therefore not
used for high-capacity, low-cost applications
such as the mainmemoryinpersonal computers.

USES: Many categories of industrial and

scientific subsystems, automotive


electronics, and similar, contain static
RAM.
Some amount (kilobytes or less) is also
embedded in practically all modern
appliances, toys, etc. that implement an
electronic user interface.
Several megabytes may be used in
complex products such as digital
cameras, cell phones, synthesizers, etc.

THANK YOU

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