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Ultra-Deep Submicron Technology: Etienne Sicard Insa

- The document discusses ultra-deep submicron technology, including specific features like multiple metal layers, stacked vias, and multiple MOS options. Embedded memory and magnetic RAM are also covered. Silicon-on-insulator technology promises faster circuits with less capacitance and leakage.

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130 views21 pages

Ultra-Deep Submicron Technology: Etienne Sicard Insa

- The document discusses ultra-deep submicron technology, including specific features like multiple metal layers, stacked vias, and multiple MOS options. Embedded memory and magnetic RAM are also covered. Silicon-on-insulator technology promises faster circuits with less capacitance and leakage.

Uploaded by

nvrkrishna456
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Ultra-Deep submicron technology

Etienne Sicard
Insa
[email protected]
http://intrage.insa-tlse.fr/~etienne
E. Sicard - ultra deep

Summary
Ultra-deep submicron technology
Specific features
Embedded Memory
Magnetic RAM
SOI
conclusion

E. Sicard - ultra deep

1. Ultra-deep submicron technology


2.0

Micron Sub-micron

80286

1.0

80386

Ultra
Deep-sub
micron

Deep-sub
micron

486
pentium

pentium II

0.3
0.2

Pentium IV
Itanium

0.1
0.05
0.03
83

86

89

92

95

98

01

Year
E. Sicard - ultra deep

04

07

Nano

1. Ultra-deep submicron technology

Multiple technological options to optimize performance


Faster & bigger chips
Agreements to handle tremendous costs
(ST,Philips,Motorola,TSMC)
E. Sicard - ultra deep

2. Specific features
Multiple metal layers
Stacked vias

Low K dielectric to
reduce couplings

Copper to speed up
signal transport
High K dielectric to
reduce leakage

Improved
tretch isolation
Multiple MOS
options

E. Sicard - ultra deep

2. Specific features
High Speed: normal MOS
Very high speed: critical
path
Low leakage: for low power
3-6 MOS
options

High voltage: for I/Os


Double-gate: for
embedded EEPROM
RF : optimized for GHz
amplifiers

E. Sicard - ultra deep

2. Specific features
Ultra High Speed

Low Leakage

EEProm

High Voltage

RF
High Speed
Application-oriented MOS device
Same basic mechanism
New physical properties in EEPROM and MRam

E. Sicard - ultra deep

MRam

2. Specific features
1.2V

2.5V
1.2V
1.2V

1.2V
High Speed

Low leakage

1.2V
2.5V
High Voltage
2.5V

1.8V
Example in 0.12m technology

E. Sicard - ultra deep

2. Specific features
Option layer

Simple access to low leakage,


high voltage and isolated Pwell
E. Sicard - ultra deep

Option layer
properties

2. Specific features
Low leakage

High speed

High voltage

Simulation of the 3 MOS options


E. Sicard - ultra deep

2. Specific features
Small Ion
reduction

Ioff ~10nA

Ioff ~100pA

Low leakage

High speed

Low leakage MOS has higher Vt, slight Ion reduction


Low leakage MOS has 1/100 Ioff of high speed MOS
E. Sicard - ultra deep

2. Specific features
0.1m process (TSMC+ST+IBM+)
Type of MOS

Effective

Oxide

channel length

thickness

Ioff

Ion

Very

Very

high

high

(m)
Ultra-high

0.07

16

speed
High speed

0.09

16

High

High

Low leakage

0.09

24

Low

Medium

High voltage

0.2

50

Low

Low

Each MOS is optimized for a target customer application


Towards a world-wide standard process which will ease design

E. Sicard - ultra deep

3. Embedded Memory
80% of a system-on-chip
Bottleneck for bandwidth

Cmos Embedded memories

Non volatile

Volatile

eDRAM

SRAM

ROM

EEPROM

E. Sicard - ultra deep

FRAM

3. Embedded Memory
CS
CB

Parasitic capacitance: 2fF

Specific capacitance: 3-30fF

E. Sicard - ultra deep

3. Embedded Memory
Double-Gate MOS

2nd Poly
Floating Poly

Used in EPROM, EEPROM and Flash memories


E. Sicard - ultra deep

3. Embedded Memory
Double-Gate MOS
Ids

Ids

Single gate

Single gate

Double gate
Vds

Vds

Gate discharged

Gate charged

E. Sicard - ultra deep

3. Embedded Memory
Double-Gate MOS: write/erase by tunneling
0V

12V
Hot
electron
Tunneling

Vdd

Cold
electron
Tunneling

12V

Accelerate

erase

write
Dense but slow

E. Sicard - ultra deep

4. Magnetic RAM
Dense, fast, non-volatile: universal memory
Silicium, Cobalt et Nikel

2 stage magnetic states

A high magnetic field changes the state of the material


E. Sicard - ultra deep

equal to
I=5mA

4. Magnetic RAM

Column
i/2

i/2

Line

i/4
i/4

i/2

i/2

Write

Erase

Principles:
Principles:
Write:
Write: i/2
i/2on
onthe
theline,
line,i/2
i/2on
onthe
thecolumn
columngives
givesaacurrent
current
high
highenough
enoughto
tochange
changethe
thestate
state
Read:
Read: i/4
i/4on
onthe
theline,
line,i/4
i/4on
onthe
thecolumn
columnand
andmonitor
monitorthe
the
attenuation
attenuationof
ofcurrent
currentdue
dueto
tomagnetic
magneticstate
state

Read

E. Sicard - ultra deep

5. Silicon-On-insulator
The next major evolution?
CMOS compatible
Less distance between nMOS
and pMOS
Less capacitance
Less leakage

>50%
faster
circuits

Fully or partially depleted?

E. Sicard - ultra deep

Kink effect

6. Conclusion
The ultra-deep submicron technologies introduce new features
Low leakage MOS targeted for low power
High voltage MOS introduced for I/O interfacing
Double-poly MOS for EPROM/Flash memories
Embedded memory are key components for System-on-chip
Magnetic RAM to become the universal memory
SOI has many promising features, some design issues pending

E. Sicard - ultra deep

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