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Dynamic Random Access Memory

This document provides an overview of different types of dynamic random access memory (DRAM) technologies, including simple DRAM, Fast Page Mode (FPM) DRAM, Extended Data Out (EDO) DRAM, Burst EDO (BEDO) DRAM, Synchronous DRAM (SDRAM), Rambus DRAM (RDRAM), and Double Data Rate (DDR) SDRAM. It describes the basic features and operation of each technology.

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Nahum Quiros
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168 views

Dynamic Random Access Memory

This document provides an overview of different types of dynamic random access memory (DRAM) technologies, including simple DRAM, Fast Page Mode (FPM) DRAM, Extended Data Out (EDO) DRAM, Burst EDO (BEDO) DRAM, Synchronous DRAM (SDRAM), Rambus DRAM (RDRAM), and Double Data Rate (DDR) SDRAM. It describes the basic features and operation of each technology.

Uploaded by

Nahum Quiros
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Dynamic Random

Access Memory

Topics
Simple DRAM
Fast Page Mode (FPM) DRAM
Extended Data Out (EDO) DRAM
Burst EDO (BEDO) DRAM
Synchronous DRAM (SDRAM)
Rambus DRAM (RDRAM)
Double Data Rate (DDR) SDRAM

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General DRAM Formats


DRAM is produced as integrated circuits (ICs) bonded

and mounted into plastic packages with metal pins for


connection to control signals and buses
In early use individual DRAM ICs were usually either
installed directly to the motherboard or on ISA expansion
cards
later they were assembled into multi-chip plug-in modules
(DIMMs, SIMMs, etc.)

General DRAM formats


Some Standard Module Type:
DRAM chips (Integrated Circuit or IC)
Dual in-line Package (DIP)

DRAM (memory) modules


Single in-line in Package(SIPP)
Single In-line Memory Module (SIMM)
Dual In-line Memory Module (DIMM)
Rambus In-line Memory Module (RIMM)
Small outline DIMM (SO-DIMM)

Dual in-line Package (DIP)


is an electronic component
package with a rectangular
housing and two parallel rows
of electrical connecting pins
14 pins

Single in-line in Package (SIPP)

It consisted of a small printed circuit board upon which were mounted a number
of memory chips.
It had 30 pins along one edge which mated with matching holes in the
motherboard of the computer.

Single In-line Memory Module (SIMM)

SIMM can be a 30 pin memory module or a 72 pin

Dual In-line Memory Module (DIMM)

Two types of DIMMs: a 168-pin SDRAM module and a 184-pin DDR


SDRAM module. The SDRAM module has two notches (rectangular
cuts or incisions) on the bottom edge, while the DDR1 SDRAM module
has only one. Also, each module has eight RAM chips, but the lower
one has an unoccupied space for the ninth chip.

Rambus In-line Memory Module (RIMM)

RIMM is not an acronym and is a trademark of Rambus incorporated


for the Direct Rambus or DRAM (RDRAM) modules. RIMM is
computer memory that resembles DIMMs; however, it is 184-pin and
is available with built-in ECC support and Non-ECC at speeds up to
800MHz. RIMM modules are commonly used on the Intel Pentium 4
motherboards.

Small outline DIMM (SO-DIMM)

SO-DIMMs are a smaller alternative to a DIMM, being roughly half the size of
regular DIMMs. SO-DIMMs are often used in systems that have limited
space, such as notebooks, small-footprint personal computers (such as those
with a Mini-ITX motherboard), high-end upgradable office printers, and
networking hardware like routers and NAS devices.

Fast Page DRAM


Also called FPM DRAM, FPRAM, Page mode DRAM,

Fast page memory, or Page mode memory


Prior to newer forms of dynamic random access memory
it was the most common kind of DRAM in personal
computers
essentially accesses a row of RAM without having to
continually respecify the row

Fast Page DRAM


A row access strobe (RAS) signal is kept active while the

column access strobe (CAS) signal changes to read a


sequence of contiguous memory cells
Clock timings for FPM DRAM are typically 6-3-3-3
(meaning 3 clock cycles for access setup, and 3 clock
cycles for the first and each of three successive accesses
based on the initial setup)

Fast Page DRAM


Static column
is a variant of page mode in which the column address does not
need to be stored in, but rather, the address inputs may be
changed with /CAS held low, and the data output will be updated
accordingly a few nanoseconds later.
Nibble mode
is another variant in which four sequential locations within the row

can be accessed with four consecutive pulses of /CAS. The


difference from normal page mode is that the address inputs are
not used for the second through fourth /CAS edges; they are
generated internally starting with the address supplied for the
first /CAS edge.

Rambus Dynamic Random Access Memory


(RDRAM)
a memory subsystem that promises to transfer up to 1.6

billion bytes per second


the subsystem consists of the random access memory,
the RAM controller, and the bus (path) connecting RAM to
the microprocessor and devices in the computer that use it
It consists of the random access memory, the RAM
controller, and the bus (path) connecting RAM to the
microprocessor and devices in the computer that use it
It consists of the random access memory, the RAM
controller, and the bus (path) connecting RAM to the
microprocessor and devices in the computer that use it

Extended Data Out (EDO) DRAM


sometimes referred to as Hyper Page Mode enabled

DRAM, is similar to Fast Page Mode DRAM with the


additional feature that a new access cycle can be started
while keeping the data output of the previous cycle active.
became very popular on video cards towards the end of
the 1990s. It was very low cost, yet nearly as efficient for
performance as the far more costly VRAM.

Burst EDO (BEDO) DRAM


An evolution of EDO DRAM, Burst EDO DRAM, could

process four memory addresses in one burst, for a


maximum of 5-1-1-1, saving an additional three clocks
over optimally designed EDO memory.

Synchronous DRAM (SDRAM)


a generic name for various kinds of DRAM that are

synchronized with the clock speed that the


microprocessor is optimized for.
has replaced asynchronous RAM, is the support for
multiple internal banks inside the DRAM chip. Using a few
bits of "bank address" which accompany each command,
a second bank can be activated and begin reading data
while a read from the first bank is in progress. By
alternating banks, an SDRAM device can keep the data
bus continuously busy, in a way that asynchronous DRAM
cannot.
Access time less than 60 nanoseconds.

Rambus Dynamic Random Access Memory


(RDRAM)
Rambus is intended to replace the current main memory

technology of dynamic random access memory (DRAM).


Much faster data transfer rates from attached devices
such as videocams using FireWire and the Accelerated
Graphics Port (AGP) make it important to reduce the
bottleneck in getting data into the computer, staging it in
RAM, and moving it through the microprocessor and to
the display or other output devices
provides a two-byte (16 bit) bus
RAM speed of 800 megahertz (800 million cycles per
second), the peak data transfer rate is 1.6 billion bytes per
second

Double Data Rate (DDR) SDRAM


was a later development of SDRAM, used in PC memory

beginning in 2000. Subsequent versions are numbered


sequentially (DDR2, DDR3, etc.). DDR SDRAM internally
performs double-width accesses at the clock rate, and
uses a double data rate interface to transfer one half on
each clock edge.

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