15 SequentialDesign
15 SequentialDesign
Sequence recognizers
Here, one input and one output bit appear every clock cycle.
This requires a sequential circuit because the circuit has to remember
the inputs from previous clock cycles, in order to determine whether or
not a match was found.
1/0
0/0
0/0
State
Meaning
A
B
C
D
The first thing you have to figure out is precisely how the use of state
will help you solve the given problem.
Make a state table based on the problem statement. The table
should show the present states, inputs, next states and outputs.
Sometimes it is easier to first find a state diagram and then
convert that to a table.
This is usually the most difficult step. Once you have the state table,
the rest of the design procedure is the same for all sequential circuits.
Sequence recognizers are especially hard! Theyre the hardest example
well see in this class, so if you understand this youre in good shape.
1/0
0/0
0/0
State
Meaning
A
B
C
D
What happens if were in state D (the last three inputs were 100), and
the current input is 1?
The output should be a 1, because weve found the desired pattern.
But this last 1 could also be the start of another occurrence of the
pattern! For example, 1001001 contains two occurrences of 1001.
To detect overlapping occurrences of the pattern, the next state
should be B.
A
1/0
0/0
0/0
1/1
State
Meaning
A
B
C
D
Remember that we need two outgoing arrows for each node, to account
for the possibilities of X=0 and X=1.
The remaining arrows we need are shown in blue. They also allow for the
correct detection of overlapping occurrences of 1001.
0/0
1/0
A
1/0
0/0
0/0
1/0
0/0
1/1
State
Meaning
A
B
C
D
1/0
A
1/0
0/0
0/0
1/0
1/1
0/0
input/output
next
state
Present
State
A
A
B
B
C
C
D
D
Input
Next
State
Output
0
1
0
1
0
1
0
1
A
B
C
B
D
B
A
B
0
0
0
0
0
0
0
1
8
Present
State
A
A
B
B
C
C
D
D
Input
Next
State
Output
0
1
0
1
0
1
0
1
A
B
C
B
D
B
A
B
0
0
0
0
0
0
0
1
Present
State
Q1 Q0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Next
State
Q1 Q0
0
0
1
0
1
0
0
0
0
1
0
1
1
1
0
1
Output
Z
0
0
0
0
0
0
0
1
10
Next we have to figure out how to actually make the flip-flops change
from their present state into the desired next state.
This depends on what kind of flip-flops you use!
Well use two JKs. For each flip-flip Qi, look at its present and next
states, and determine what the inputs Ji and Ki should be in order to
make that state change.
Present
State
Q1 Q0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Next
State
Q1
Q0
0
0
1
0
1
0
0
0
0
1
0
1
1
1
0
1
Output
Z
0
0
0
0
0
0
0
1
11
Q(t+1)
Operation
0
0
1
1
0
1
0
1
Q(t)
0
1
Q(t)
No change
Reset
Set
Complement
12
JK excitation table
Q(t+1)
Operation
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
No change/reset
Set/complement
Reset/complement
No change/set
1
0
1
0
1
Q(t)
Reset
Set
Complement
13
Q(t+1)
Operation
0
0
1
1
0
1
0
1
0
1
0
1
Reset
Set
Reset
Set
Q(t)
Q(t+1)
Operation
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
No change/reset
Set/complement
Reset/complement
No change/set
Q(t)
Q(t+1)
Operation
0
0
1
1
0
1
0
1
0
1
1
0
No change
Complement
Complement
No change
14
Q(t)
Q(t+1)
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
15
Present
State
Q1 Q0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Q(t)
Q(t+1)
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
Next
State
Q1
Q0
0
0
1
0
1
0
0
0
0
0
1
0
x
x
x
x
0
1
0
1
1
1
0
1
x
x
x
x
0
1
1
1
0
1
x
x
1
1
x
x
x
x
1
0
x
x
1
0
Output
Z
0
0
0
0
0
0
0
1
16
Now you can make K-maps and find equations for each of the four flipflop inputs, as well as for the output Z.
These equations are in terms of the present state and the inputs.
The advantage of using JK flip-flops is that there are many dont care
conditions, which can result in simpler MSP equations.
Present
State
Q1 Q0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Next
State
Q1
Q0
0
0
1
0
1
0
0
0
0
0
1
0
x
x
x
x
0
1
0
1
1
1
0
1
x
x
x
x
0
1
1
1
0
1
x
x
1
1
x
x
x
x
1
0
x
x
1
0
Output
Z
0
0
0
0
0
0
0
1
J1 = X Q0
K1 = X + Q 0
J0 = X + Q 1
K0 = X
Z = Q1Q0X
17
J1 = X Q0
K 1 = X + Q0
J0 = X + Q 1
K0 = X
Z = Q1Q0X
18
J1 = X Q0
K 1 = X + Q0
J0 = X + Q 1
K0 = X
Z = Q1Q0X
19
Timing diagram
Then when X=1, Z becomes 1 also, meaning that 1001 was found.
The output Z does not have to change at positive clock edges. Instead,
it may change whenever X changes, since Z = Q1Q0X.
1
CLK
Q1
Q0
X
Z
Sequential circuit design
20
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Next
State
Q1
Q0
0
0
1
0
1
0
0
0
Flip-flop
inputs
D1
D0
0
1
0
1
1
1
0
1
Output
Z
0
0
0
0
0
0
0
1
21
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Q(t)
Q(t+1)
Operation
0
0
1
1
0
1
0
1
0
1
0
1
Reset
Set
Reset
Set
Next
State
Q1
Q0
Flip flop
inputs
D1
D0
0
0
1
0
1
0
0
0
0
0
1
0
1
0
0
0
0
1
0
1
1
1
0
1
0
1
0
1
1
1
0
1
Output
Z
0
0
0
0
0
0
0
1
22
0
0
1
1
0
0
1
1
Input
X
0
1
0
1
0
1
0
1
Next
State
Q1
Q0
Flip flop
inputs
D1
D0
0
0
1
0
1
0
0
0
0
0
1
0
1
0
0
0
0
1
0
1
1
1
0
1
0
1
0
1
1
1
0
1
Output
Z
0
0
0
0
0
0
0
1
23
D1 = Q1 Q0 X + Q1 Q0 X
D0 = X + Q1 Q0
Sequential circuit design
24
25
Flip-flop comparison
JK flip-flops are good because there are many dont care
values in the flip-flop inputs, which can lead to a simpler
circuit.
26
You do not have to use the most compact encoding of states possible
Here is another possibility: suppose you have four states A, B, C, D
Create one flip flop for each of A, B, C, D
Feed the Set and Reset lines of these flip-flops based on current
state and inputs
This uses more flip-flops (4 instead of the minimum 2) but may
result in a much simpler circuit overall
The encoding and decoding of states is entirely artificial; it
depends completely on the choice of state encodings. A little
thinking about the circuit may lead you to a state encoding that
simplifies the circuit a lot.
27
Summary
28