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Renesas 8Bit Mcus: This Presentation Aim To Explain Μpd78F0714 Microcontroller

This document provides an overview of the Renesas 8bit μPD78F0714 microcontroller. It describes the key features of the microcontroller which include a 20 MHz clock frequency, 32KB flash memory, 1KB RAM, 8 channel 10-bit ADC, and 51 I/Os. The document also outlines the microcontroller's architecture, development environment using tools like Renesas CS+ and IAR Embedded Workbench, and programming methods. Common applications for the microcontroller include household appliances and industrial equipment like pumps.

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Samah Abu Saleem
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0% found this document useful (0 votes)
92 views

Renesas 8Bit Mcus: This Presentation Aim To Explain Μpd78F0714 Microcontroller

This document provides an overview of the Renesas 8bit μPD78F0714 microcontroller. It describes the key features of the microcontroller which include a 20 MHz clock frequency, 32KB flash memory, 1KB RAM, 8 channel 10-bit ADC, and 51 I/Os. The document also outlines the microcontroller's architecture, development environment using tools like Renesas CS+ and IAR Embedded Workbench, and programming methods. Common applications for the microcontroller include household appliances and industrial equipment like pumps.

Uploaded by

Samah Abu Saleem
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Renesas 8bit MCUs

This Presentation aim to explain PD78F0714 Microcontroller

By :
samah waleed abu saleem

Contents
Features
Applications
Pin Configuration
Architecture
CPU Architecture
Development Environment (IDE)
Programming

Summary of Features

The PD78F0714 is an 8-Bit Single Chip Microcontroller.

High-performance PD78F0714 .

The PD78F0714 has 64 pins requires 4.0 to 5.5 V power supply.

Key Features

20 MHz max. clock frequency .

General-purpose register: 8 bits 32 registers

32 Kbytes single voltage Flash with self-programming support .

1 Kbyte RAM .

On-chip watchdog timer (operable with internal oscillation clock).

access a 64 KB memory space.

Timer: 7 channels .

Serial interface: 2 channels (UART: 1 channel, CSI: 1 channel) .

-10 bit resolution A/D converter: 8 channels.

Low voltage indicator .

51 I/Os .

Wide operating temperature: -40 to +85 C

Applications
o

Household electrical appliances

Industrial equipment
Pumps

Pin Configuration

Pin Configuration

Architecture

CPU Architecture
Memory Space
PD78F0714 products can access a 64 KB memory space.

CPU Architecture
Notes
1. This area occupies 9 bytes (planned) during on-chip debugging
because it is used as a backup area for user data during
communication.
2. This area cannot be used during on-chip debugging because it is used
as a communication command area (256 bytes to 1 KB).

CPU Architecture..cont
Internal program memory space
The internal program memory space stores the program and table data.
Normally, it is addressed with the program counter (PC).

PD78F0714 products incorporate internal ROM (flash memory), as


shown below.

CPU Architecture..cont
Internal program memory space
The internal program memory space is divided into the following areas.
(1) Vector table area

The 64-byte area 0000H to 003FH is reserved as a vector table area. The program
start addresses for branch upon reset signal input or generation of each interrupt
request are stored in the vector table area.
Of the 16-bit address, the lower 8 bits are stored at even addresses and the higher
8 bits are stored at odd addresses.

(2) CALLT instruction table area


The 64-byte area 0040H to 007FH can store the subroutine entry
address of a 1-byte call instruction (CALLT).
(3) Option byte area
The 1-byte area 0080H is reserved as a option byte area.
(4) CALLF instruction entry area
The area 0800H to 0FFFH can perform a direct subroutine call with a 2byte call instruction (CALLF).

CPU Architecture..cont
Control registers
(1) Program counter (PC)
The program counter is a 16-bit register that holds the address
information of the next program to be executed. In normal operation, the
PC is automatically incremented according to the number of bytes of the
instruction to be fetched. When a branch instruction is executed,
immediate data and register contents are set.
RESET input sets the reset vector table values at addresses 0000H and
0001H to the program counter.

CPU Architecture..cont
Control registers
(2) Program status word (PSW)
The program status word is an 8-bit register consisting of various flags
set/reset by instruction execution. Program status word contents are
automatically stacked upon interrupt request generation or PUSH PSW
instruction execution and are restored upon execution of the RETB,
RETI and POP PSW instructions. RESET input sets the PSW to 02H.

CPU Architecture..cont
Control registers
(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack
area. Only the internal high-speed RAM
area can be set as the stack area

Development Environment (IDE)

Debugging Software
Renesas CS+ .
IAR Embedded Workbench Note2.

Programming Software
Renesas Flash Programmer.

Programming
The PD78F0714 can programming among several IDEs like Renesas
CS+ , IAR Embedded Workbench Note2 , Renesas Flash Programmer .

Using CS+ the PD78F0714 can be programmed by C language.

The CS+ Compiler is C Compiler .

Programming

CS+ (formerly Cube Suite+)


The CS+ integrated development environment provides simplicity, security, and
ease of use in developing software through iterative cycles of editing, building,
and debugging.

IAR Embedded Workbench Note2

"IAR" is an abbreviation of Ingenjrsfirman Anders Rundgren, which means Anders


Rundgren Engineering Company.
IAR Systems develops C and C++ compilers, debuggers, and other tools for
developing and debugging firmware for 8-, 16-, and 32-bit processors. The
company started out in the 8-bit market, but moved into the expanding 32-bit
market, especially the market for 32-bit microcontrollers.

Thank You !

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