Scribd
Upload
68 views

A Presentation ON "FPGA Implementation of Speed Control On BLDC Motor"

implimantation of speed control using FPGA

Uploaded by

AlpeshPatel
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
68 views

A Presentation ON "FPGA Implementation of Speed Control On BLDC Motor"

implimantation of speed control using FPGA

Uploaded by

AlpeshPatel
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 20

A

Presentation
ON
“FPGA Implementation Of Speed
Control on BLDC Motor”

Prepared by:- Alpesh Patel Guided by:- Mr. Sunil M. Patel


Roll No.: 275 Assistant Professor
M.E. (E) (MSA) PART – III & IV
PWM
 Definition: Pulse Width Modulation is a technique that
conforms a signal width, generally pulses based on
modulator signal information.
 The general purpose of Pulse Width Modulation is to
control power delivery, especially to inertial electrical
devices.
 The on-off behavior changes the average power of signal.
 Output signal alternates between on and off within a
specified period.
 If signal toggles between on and off quicker than the
load, then the load is not affected by the toggling.
 A secondary use of PWM is to encode information for
transmission.
Types of Pulse Width Modulation

There are three commonly used types of PWM defined by


which edge of the analog signal is to be modulated
 Lead Edge Modulation
 Trail Edge Modulation
 Pulse Center Two Edge Modulation/Phase Correct PWM
Block Diagram of PWM
N –BIT DATA INPUT

input

Load
input

Q
R
A-B
N bit Comparator
S PWM
Output

N bit counter
Over flow
Lead Edge Modulation
• The lead edge of the trigger signal is fixed to the leading edge of the time
spectrum and the trailing edge is modulated

0T 2T 4T 6T 8T 10T 12T 14T 16T 18T

• Trigger signal PWM signal


Mux 2 *1 RTL technology schematic view
Mux Waveform
PWM GENERATOR
RTL VIEW
Technology Schematic
PWM Waveform
Speed control
RTL view
Technology Schematic
Waveform of speed
FPGA –ARTIX 7
Features
• Optimized for quickly prototyping cost sensitive applications using
Artix-7 FPGAs
• Hardware, design tools, IP, and pre-verified reference designs
• Demonstrates a high performance data transfer system using a PCI
Express® x4 Gen2
• Reference design implemented with Northwest Logic DMA engine
attached to a AXI interface
• Enabling high-performance serial connectivity with GTP ports on
FMC, SFP, & SMA
• Supports embedded processing with MicroBlaze, soft 32bit RISC
• Develop networking applications with 10-100-1000 Mbps Ethernet
(RGMII)
• Implement Video display applications with HDMI out
• Expand I/O with the FPGA Mezzanine Card (FMC) interface
REFERENCES
1) A. Tashakori, M. Hassanudeen and M. Ektesabi,” FPGA Based Controller
Drive of BLDC Motor Using Digital PWM Technique”,IEEE,2015.
2) Ahmed M. Ahmed, Amr AliEldin , Mohamed S. Elksasy, Faiz F. Areed,”
29 Brushless DC Motor Speed Control using both PI Controller and Fuzzy
PI Controller ”,IJCA,2015.
3) Basil Hamed, Moayed Almobaied ,” Fuzzy PID Controllers Using FPGA
Technique for Real Time DC Motor Speed Control ”,2011.
4) Sneha R. Kirnapure¹, Vijay R. Wadhankar²,” Design and Implementation
of Pulse Width Modulation Controller on FPGA using HDL ”,
IJIRSET,2015.
5) http://faculty.cs.tamu.edu/ejkim/Courses/cpsc350/slide8.ppt
Time line

Work Month

Aug Sep Oct Nov Dec Jan Feb Mar Apr may jun

Literature Survey

Study different controller and


processor architecture ,study
different motors

fuzzy controller

Design coding on hdl


implementation start
according to design
Work on result analysis

Thesis writing
Thank you

You might also like