LOGIC GATES AND BOOLEAN FUNCTIONS

LOGIC GATES AND BOOLEAN

ALGEBRA
Digital circuits
hardware components that manipulate binary information
implemented using transistors and interconnections in IC
each basic circuit is called logic gate
 performs a specific logical operation
A logic gate is an elementary building block of a digital circuit
Most logic gates have two inputs and one output
At any given moment, every terminal is in one of the two binary
conditions low (0) or high (1) represented by different voltage
levels
In most logic gates, the low state is approximately zero volts (0V)
The high state is approximately five volts positive (+5 V).
Boolean Algebra
Boolean algebra is a mathematical system for the
manipulation of variables that can have one of two
values.
In formal logic, these values are “true” and “false.”
In digital systems, these values are “on” and “off,” 1 and 0,
or “high” and “low.”
Boolean expressions are created by performing
operations on Boolean variables.
Common Boolean operators include AND, OR, and
NOT.
A Boolean operator can be completely described
using a truth table.
TRUTH TABLE
A truth table shows how a logic circuit's output
responds to various combinations of the inputs
Using logic 1 for true and logic 0 for false.
All permutations of the inputs are listed on the left
Output of the circuit is listed on the right
The desired output can be achieved by a
combination of logic gates
A truth table for two inputs is shown, but it can be
extended to any number of inputs.
The input columns are usually constructed in the
order of binary counting with a number of bits
equal to the number of inputs.
 Summary
A A
X & X
The AND Gate B
B
The AND gate produces a HIGH output when all inputs are
HIGH; otherwise, the output is LOW. For a 2-input gate,
the truth table is Inputs Output
A B X
0 0 0
0 1 0
1 0 0
1 1 1

The AND operation is usually shown with a dot between the

variables but it may be implied (no dot). Thus, the AND
operation is written as X = A .B or X = AB.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
LOGIC GATES
x y AND
AND 0 0 0
0 1 0
1 0 0
1 1 1
NAND (Not AND)
x y NAND
0 0 1
0 1 1
1 0 1
1 1 0
 Summary
A A
X & X
The AND Gate B
B
Example waveforms:
A
B

X
The AND operation is used in computer programming as a
selective mask. If you want to retain certain bits of a binary
number but reset the other bits to 0, you could set a mask
with 1’s in the position of the retained bits.
If the binary number 10100011 is ANDed with
the mask 00001111, what is the result? 00000011
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summar
A y X A & X
The NAND Gate
B B
The NAND gate produces a LOW output when all inputs
are HIGH; otherwise, the output is HIGH. For a 2-input
gate, the truth table is Inputs Output
A B X
0 0 1
0 1 1
1 0 1
1 1 0

The NAND operation is shown with a dot between the

variables and an overbar covering them. Thus, the NAND
operation is written as X = A .B (Alternatively, X = AB.)

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
A X A & X
The NAND Gate
B B
Example waveforms:
A
B

X
The NAND gate is particularly useful because it is a
“universal” gate – all other basic gates can be constructed
from NAND gates.
How would you connect a 2-input NAND gate
to form a basic inverter?

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
NOT (Inverter)
x NOT

0 1

1 0

Buffer
x Buffer

0 0

1 1
 Summary
A X A ≥1 X
The OR Gate
B B

Example waveforms:
A
B

X
The OR operation can be used in computer programming to set certain
bits of a binary number to 1.
ASCII letters have a 1 in the bit 5 position for lower case letters
and a 0 in this position for capitals. (Bit positions are numbered
from right to left starting with 0.) What will be the result if you
OR an ASCII letter with the 8-bit mask 00100000?
The resulting letter will be lower case.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
OR x y OR
0 0 0
0 1 1
1 0 1
1 1 1

NOR (Not OR)

x y NOR
0 0 1
0 1 0
1 0 0
1 1 0
 Summar
The NOR Gate
A y X A ≥1 X
B B

The NOR gate produces a LOW output if any input is

HIGH; if all inputs are HIGH, the output is LOW. For a
2-input gate, the truth table is
Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 0
The NOR operation is shown with a plus sign (+) between
the variables and an overbar covering them. Thus, the NOR
operation is written as X = A + B.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
A X A ≥1 X
The NOR Gate
B B

Example waveforms:
A
B

X
The NOR operation will produce a LOW if any input is HIGH.
+5.0 V

When is the LED is ON for the circuit shown? 330 W

A
The LED will be on when any of B X
C
the four inputs are HIGH. D

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
XOR (Exclusive-OR) x y XOR
0 0 0
0 1 1
1 0 1
1 1 0

XNOR (Exclusive-NOR)
(Equivalence)
x y XNOR
0 0 1
0 1 0
1 0 0
1 1 1
 Summary
A X A =1 X
The XOR Gate
B B

The XOR gate produces a HIGH output only when both

inputs are at opposite logic levels. The truth table is
Inputs Output
A B X
0 0 0
0 1 1
1 0 1
1 1 0

The XOR operation is written as X = AB + AB.

Alternatively, it can be written with a circled plus sign
between the variables as X = A + B.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summar
The XOR Gate
A y X A =1 X
B B

Example waveforms:
A
B

X
Notice that the XOR gate will produce a HIGH only when exactly one
input is HIGH.
If the A and B waveforms are both inverted for the above
waveforms, how is the output affected?

There is no change in the output.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
A X A X
The XNOR Gate =1
B B

The XNOR gate produces a HIGH output only when both

inputs are at the same logic level. The truth table is
Inputs Output
A B X
0 0 1
0 1 0
1 0 0
1 1 1

The XNOR operation shown as X = AB + AB. Alternatively,

the XNOR operation can be shown with a circled dot
between the variables. Thus, it can be shown as X = A . B.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
A X A X
The XNOR Gate =1
B B

Example waveforms:
A
B

X
Notice that the XNOR gate will produce a HIGH when both inputs are the
same. This makes it useful for comparison functions.
If the A waveform is inverted but B remains the same, how is
the output affected?

The output will be inverted.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Logic Gates
Gates can have multiple inputs and more than one
output.
A second output can be provided for the complement of
the operation.
 Summar
Fixed Function Logic
y
Two major fixed function logic families are TTL and CMOS.
A third technology is BiCMOS, which combines the first
two. Packaging for fixed function logic is shown.
0.335 – 0.334 in.
0.740 – 0.770 in. 14 13 12 11 10 9 8

14 13 12 11 10 9 8

0.250 ± 0.010 in. 0.228 – 0.244 in.

1 2 3 4 5 6 7

1 2 3 4 5 6 7
Pin no.1 Lead no.1
identifiers identifier
14
1 14
1

DIP package SOIC package

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Fixed Function Logic
Some common gate configurations are shown.
VCC VCC VCC VCC
14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'00 ' 02 '04 '08

VCC VCC VCC VCC

14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'10 '11 '20 '21

VCC VCC VCC VCC

14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7 1 2 3 4 5 6 7
GND GND GND GND
'27 '30 '32 '86

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Fixed Function Logic
Logic symbols show the gates and associated pin numbers.
VCC
(14)
(1)
(3)
(2) (1) & (3)
(4) (2)
(6) (4)
(5) (6)
(5)
(9) (9)
(8) (8)
(10) (10)
(12) (12)
(11) (13) (11)
(13)

(7)
GND

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Selected Key
Terms
Inverter A logic circuit that inverts or complements its 
inputs.
Truth table A table showing the inputs and corresponding 
output(s) of a logic circuit.
Timing  A diagram of waveforms showing the proper time 
diagram relationship of all of the waveforms. 

Boolean  The mathematics of logic circuits. 
algebra
AND gate A logic gate that produces a HIGH output only 
when all of its inputs are HIGH.
 Selected Key
Terms
OR gate A logic gate that produces a HIGH output when
one or more inputs are HIGH.
NAND gate A logic gate that produces a LOW output only
when all of its inputs are HIGH.
NOR gate A logic gate that produces a LOW output when one
or more inputs are HIGH.

Exclusive­OR  A logic gate that produces a HIGH output only

gate when its two inputs are at opposite levels.
Exclusive­NOR  A logic gate that produces a LOW output only
gate when its two inputs are at opposite levels.
Boolean Function Simplification

Commutative Law
x•y=y•x x+y=y+x
Identity Element
x•1=x x+0=x
Complement
x • x’ = 0 x + x’ = 1
Boolean Algebra Theorems
Duality
The dual of a Boolean algebraic expression is obtained by
interchanging the AND and the OR operators and
replacing the 1’s by 0’s and the 0’s by 1’s.
 x•(y+z)=(x•y)+(x•z)
 x+(y•z)=(x+y)•(x+z)
Theorem 1
 x•x=x x+x=x
Theorem 2
 x•0=0 x+1=1
Theorem 3: Involution

 (x)=x

Theorem 4: Associative & Distributive

 (x•y)•z=x•(y•z)
( x + y ) + z = x + ( y + z )
 x•(y+z)=(x•y)+(x•z)
x+(y•z)=(x+y)•(x+z)

Theorem 5: DeMorgan

 (x•y) =x +y (x+y) = x•y

Theorem 6: Absorption
 x•(x+y)=x x+(x•y)=x
DeMorgan’s Theorem on Gates
AND Gate
F = x • y F = (x • y) F=x+y

OR Gate
F = x + y F = (x + y) F=x•y
 Summary
Distributive Law

The distributive law is the factoring law. A common

variable can be factored from an expression just as in
ordinary algebra. That is
AB + AC = A(B+ C)
The distributive law can be illustrated with equivalent
circuits:
A
AB
B B
B+ C
C X
X A
A AC
C
A(B+ C) AB + AC

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Rules of Boolean Algebra

1. A + 0 = A 7. A . A = A
2. A + 1 = 1 8. A . A = 0
=
3. A . 0 = 0 9. A = A
4. A . 1 = A 10. A + AB = A
5. A + A = A 11. A + AB = A + B
6. A + A = 1 12. (A + B)(A + C) = A + BC

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Rules of Boolean Algebra

Rules of Boolean algebra can be illustrated with Venn

diagrams. The variable A is shown as an area.
The rule A + AB = A can be illustrated easily with a diagram. Add
an overlapping area to represent the variable B.
The overlap region between A and B represents AB.

AA BB AA
AB
AB =

The diagram visually shows that A + AB = A. Other rules can be

illustrated with the diagrams as well.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Rules of Boolean Algebra
Illustrate the rule A + AB = A + B with a Venn
diagram.

This
Thistime,
time,AAisisrepresented
representedby bythe
theblue
bluearea
areaand
andBB
again
againby
bythe
thered circle. The intersection represents
redcircle.
AB. Notice that A + AB = A + B

A
A BA
AB

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Rules of Boolean Algebra
Rule 12, which states that (A + B)(A + C) = A + BC, can
be proven by applying earlier rules as follows:
(A + B)(A + C) = AA + AC + AB + BC
= A + AC + AB + BC
= A(1 + C + B) + BC
= A . 1 + BC
= A + BC

This rule is a little more complicated, but it can also be

shown with a Venn diagram, as given on the following
slide…

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Three areas represent the variables A, B, and C.
The area representing A + B is shown in yellow.
The area representing A + C is shown in red.
The overlap of red and yellow is shown in orange.

The overlapping area between B and C represents BC.

ORing with A gives the same area as before.

A B A B
A+B
A+C = BC
C C
(A + B)(A + C) A + BC
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
DeMorgan’s Theorem

DeMorgan’s 1st Theorem

The complement of a product of variables is
equal to the sum of the complemented variables.
AB = A + B
Applying DeMorgan’s first theorem to gates:
A A Inputs Output
AB A+B
B B
A B AB A + B
NAND Negative-OR 0 0 1 1
0 1 1 1
1 0 1 1
1 1 0 0

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
DeMorgan’s Theorem

DeMorgan’s 2nd Theorem

The complement of a sum of variables is equal to
the product of the complemented variables.
A+B=A.B
Applying DeMorgan’s second theorem to gates:
A A Inputs Output
A+B AB
B B
A B A + B AB
NOR Negative-AND 0 0 1 1
0 1 0 0
1 0 0 0
1 1 0 0

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summar
DeMorgan’s Theorem
y

Apply DeMorgan’s theorem to remove the

overbar covering both terms from the
expression X = C + D.

To apply DeMorgan’s theorem to the expression,

you can break the overbar covering both terms and
change the sign between the terms. This results in
=
X = C . D. Deleting the double bar gives X = C . D.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Example 4.5
 Summary
Boolean Analysis of Logic Circuits

Combinational logic circuits can be analyzed by writing

the expression for each gate and combining the
expressions according to the rules for Boolean algebra.
Apply Boolean algebra to derive the expression for X.

Write the expression for each gate:

A (A + B )
C (A + B )
B
C X = C (A + B )+ D
D

Applying DeMorgan’s theorem and the distribution law:

X = C (A B) + D = A B C + D Truth table?

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
1. Given the following logic circuit,
a) Determine the boolean expression, F(X,Y,Z).
Using Boolean algebra techniques, simplify this expression: AB + A(B + C) + B(B + C)
 A B C Minterm
Minterm
 Product (AND function) 0 0 0 0 m0 ABC
 Contains all variables 1 0 0 1 m1 ABC
 Evaluates to ‘1’ for a
specific combination 2 0 1 0 m2 ABC
Example m3
3 0 1 1 ABC
A=0 A B C
B=0 (0) • (0) • (0) 4 1 0 0 m4 ABC
C=0
5 1 0 1 m5 ABC
1 • 1 •1=1 6 1 1 0 m6 ABC
7 1 1 1 m7 ABC
 A B C Maxterm
Maxterm
 Sum (OR function)
0 0 0 0 M0 A  B  C
 Contains all variables 1 0 0 1 M1 A  B  C
 Evaluates to ‘0’ for a
specific combination 2 0 1 0 M2 A  B  C
Example 3 0 1 1 M3 A  B  C
A=1 A B C
B=1 (1) + (1) + (1) 4 1 0 0 M4 A  B  C
C=1 M5 A  B  C
5 1 0 1
0 + 0 + 0=0 6 1 1 0 M6 A  B  C
7 1 1 1 M7 A  B  C
Truth Table to Boolean Function
A B C F F  A BC  A BC  A BC  ABC
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
Sum of Minterms A B C F F
F  ABC  A BC  A BC  ABC 0 0 0 0 0 1
1 0 0 1 1 0
F  m1  m4  m5  m7
2 0 1 0 0 1
F  of(1
Product ,4,5,7)
Maxterms 3 0 1 1 0 1
Product of Maxterms 4 1 0 0 1 0
F  A BC  ABC  ABC  ABC 5 1 0 1 1 0
F  ABC  ABC  ABC  ABC 6 1 1 0 0 1
7 1 1 1 1 0
F  A BC  ABC  ABC  ABC
F  ( A  B  C )( A  B  C )( A  B  C )( A  B  C )
F  M0 M2 M3 M6
F   (0,2,3,6)
 Summar
SOP and POS forms
y
Boolean expressions can be written in the sum-of-products
form (SOP) or in the product-of-sums form (POS). These
forms can simplify the implementation of combinational
logic, particularly with PLDs. In both forms, an overbar
cannot extend over more than one variable.
An expression is in SOP form when two or more product terms are
summed as in the following examples:
ABC+AB ABC+CD CD+E
An expression is in POS form when two or more sum terms are
multiplied as in the following examples:
(A + B)(A + C) (A + B + C)(B + D) (A + B)C

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summar
SOP Standard form
y
In SOP standard form, every variable in the domain must
appear in each term. This form is useful for constructing
truth tables or for implementing logic in PLDs.
You can expand a nonstandard term to standard form by multiplying the
term by a term consisting of the sum of the missing variable and its
complement.

Convert X = A B + A B C to standard form.

The first term does not include the variable C. Therefore,
multiply it by the (C + C), which = 1:
X = A B (C + C) + A B C
=ABC+ABC+ABC

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summar
POS Standard form
y
In POS standard form, every variable in the domain must
appear in each sum term of the expression.
You can expand a nonstandard POS expression to standard form by
adding the product of the missing variable and its complement and
applying rule 12, which states that (A + B)(A + C) = A + BC.

Convert X = (A + B)(A + B + C) to standard form.

The first sum term does not include the variable C.

Therefore, add C C and expand the result by rule 12.
X = (A + B + C C)(A + B + C)
= (A +B + C )(A + B + C)(A + B + C)

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Selected Key
Terms
Variable A symbol used to represent a logical quantity that 
can have a value of 1 or 0, usually designated by 
an italic letter.
Complement The inverse or opposite of a number. In Boolean 
algebra, the inverse function, expressed with a bar 
over the variable. 
Sum term The Boolean sum of two or more literals 
equivalent to an OR operation. 
Product term The Boolean product of two or more literals
equivalent to an AND operation.
 Selected Key
Terms
Sum­of­ A form of Boolean expression that is basically the
products (SOP) ORing of ANDed terms.

Product of  A form of Boolean expression that is basically the 
sums (POS)  ANDing of ORed terms. 

Karnaugh map An arrangement of cells representing combinations 
of literals in a Boolean expression and used for 
systematic simplification of the expression.
VHDL A standard hardware description language. IEEE
Std. 1076-1993.
Boolean Function
Boolean Expression x y z F
Example: F = x + y’ z 0 0 0 0
Truth Table 0 0 1 1
All possible combinations 0 1 0 0
of input variables
0 1 1 0
Logic Circuit
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
Standard Form
Sum of Products (SOP)
AB (C  C )
 AB (1)
F  A BC  ABC  ABC  ABC
 AB
AC ( B  B)
 AC
BC ( A  A)
 BC
F  BC ( A  A)  AB(C  C )  AC ( B  B)

F  BC  AB  AC
Product of Sums (POS)
AB (C  C )

F  A BC  ABC  ABC  ABC

BC ( A  A)

AC ( B  B )
F  AC ( B  B )  AB(C  C )  BC ( A  A)

F  AC  AB  BC
F  ( A  C )( A  B )( B  C )
Sum of Products (SOP)

F  BC  A B  AC

Product of Sums (POS)

F  ( A  C )( A  B )( B  C )
Exercise
Given the Boolean function
F = xy’z + x’y’z + w’xy + wx’y + wxy
(a) Obtain the truth table of the function.
(b) Draw the logic diagram using the original Boolean
expression.
(c) Simplify the function to a minimum number of literals
using Boolean algebra.
(d) Obtain the truth table of the function from the
simplified expression and show that it is the same as
the one in part (a)
(e) Draw the logic diagram from the simplified expression
and compare the total number of gates with the
diagram of part (b).