DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : G.Subba Rao & B.Santhosha kumari
Designation : Lecturer
Branch : Electronics & Communication Engg.
Institute : BPTC, Bapatla
Year/semester : IV semester
Subject : Microprocessors
Subject code : CM 405
Topic : Introduction and architecture
Duration : 100Mts
Sub topic : Pins and Signals of 8086 Microprocessor
Teaching aids : Diagrams
Revised by :K.Srikanth,Lecturer,GPT, Nizamabad

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Do you know

1.What is the signal used for de-multiplexing ?

2.How many address lines are there in Intel 8086 ?

3.What is the meaning of multiplexing ?

4.How many data lines are there in Intel 8086 ?

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Recap

Already we discussed about:

• Architecture of 8086

• Calculation of Physical address

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Objectives

Upon the completion of this topic, the student will be able to

• Draw the pin diagram of Intel 8086

• Describe the function of each pin

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PIN DIAGRAM OF 8086

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Pins and signals of Intel 8086

• The Intel 8086 is a 16 bit microprocessor. It is available in three

clock rates 5,8 and 10MHz packed in a 40 pin DIP (Dual In-line
package)

• It uses +5V D.C for its operation

• The 8086 operates in minimum mode (uni processor mode) or

maximum mode (co-processor or multi-processor mode) of
operations

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 Pin Description

• The different signals for which its 40 pins are used are
broadly
classified as

1. Common mode signals

2. Minimum mode signals
3. Maximum mode signals

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 Pin Description (contd.)
Common mode signals:
AD0-AD15:
This is bidirectional Address/Data bus
• A16-A19/S3-S6:
These are multiplexed address and status lines
• BHE/S7:
Bus High Enable/Status signal. The BHE signal is used
to indicate the transfer of data over the High order(D8-
D15)data bus. It goes low for the data transfer over D8-
D15
• RD:
It is used for read operation
• VCC:
+5V D.C supply

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• READY:
It is acknowledgement signal sent by peripheral when it
is ready to send data
• RESET:
used to reset the 8086
• INTR:
Interrupt Request .It is maskable interrupt
• NMI:
It is non maskable interrupt
• TEST:
This input is examined by WAIT instruction .If TEST =
0,execution will continue else the processor remains in
an idle state
• GND:
Ground

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 CLK:

Clock input of 5,8 or 10MHz is applied to this pin from an

external clock generator chip

MN/MX:

This logic level at this pin decides whether the

processor is to operate either in minimum mode or in
maximum mode .If MN/MX=VCC, then the
processor operate in minimum mode .If
MN/MX=GND ,then the processor operates in
maximum mode

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 Minimum Mode Signals
• INTA:
Interrupt acknowledgement
• ALE:
Address Latch Enable
• DEN:
Data Enable .It indicates the availability of valid data
over the address bus .It is used to enable the
transceivers to separate the data from multiplexed
address/data bus
• DT/R:
Data Transmit/Receive .It decides the direction of
data flow through the transceivers

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• M/IO:
Memory/IO operation. When M/IO=0,it indicates that
the CPU is performing an I/O operation . M/IO=1
indicates memory operation

• WR:
Write control signal for memory and output device

• HOLD:
When HOLD=1, it indicates the processor that another
master is requesting the bus access

• HLDA:
Hold acknowledge. After receiving the HOLD
signal the processor issues the HLDA signal

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 Maximum Mode Signals
• LOCK:
Indicates the bus is not to be relinquished to other
potential bus masters. It is indicated by a LOCK
instruction prefix and is maintained until the end of next
instruction

• RQ/GT0,RQ/GT1:
These are used by other local bus masters to force
the processor to release the local bus at the end of the
processor’s current bus cycle. RQ/GT0 has higher
priority over RQ/GT1

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QS1,QS0:
These are Queue status signals. These
lines give information about the status
of the code- prefetch queue.

QS1 QS0 Operation

0 0 No operation
0 1 1st byte of op code from queue
1 0 Empty the queue
1 1 Subsequent byte from queue.

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 S0, S1, S2:
These are status signals connected to the bus controller. They
reflect the type of operation being carried out by the processor

S2 S1 S0 Operation
0 0 0 Interrupt acknowledge
0 0 1 Read data from an I/O port
0 1 0 Write data into an I/O port
0 1 1 Halt
1 0 0 Opcode Fetch
1 0 1 Memory Read
1 1 0 Memory Write
1 1 1 Passive State
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Summary

We have discussed about

• Pin diagram of microprocessor 8086

• Functions performed by various pins of 8086

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 Quiz

1. When the reset signal of 8086 active the contents of CS,

IP are

(a) CS=0000H; IP=0000H

(b) CS=FFFFH; IP=0000H

(c) CS=0000H; IP=FFFFH

(d) CS=FFFFH; IP=FFFFH

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Quiz (Contd.)

The 8086 can be operated in

a) Two modes

b) Three modes

c) Only one mode

d) None

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 Frequently Asked Questions

• Draw the pin out diagram of 8086 and explain the

functions of each pin

• Explain about minimum mode and maximum mode

signals

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