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Multiprocessor Systems: - Tightly Coupled vs. Loosely Coupled Systems

This document discusses multiprocessor systems and operating systems. It describes tightly coupled and loosely coupled multiprocessor systems. It focuses on uniform memory access (UMA) and non-uniform memory access (NUMA) tightly coupled systems. It also discusses common interconnect topologies for UMA and NUMA systems. Finally, it outlines some key considerations for multiprocessor operating systems, including threads, synchronization, scheduling, and memory management.

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Amet koko Taro
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182 views14 pages

Multiprocessor Systems: - Tightly Coupled vs. Loosely Coupled Systems

This document discusses multiprocessor systems and operating systems. It describes tightly coupled and loosely coupled multiprocessor systems. It focuses on uniform memory access (UMA) and non-uniform memory access (NUMA) tightly coupled systems. It also discusses common interconnect topologies for UMA and NUMA systems. Finally, it outlines some key considerations for multiprocessor operating systems, including threads, synchronization, scheduling, and memory management.

Uploaded by

Amet koko Taro
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Multiprocessor Systems

• Tightly Coupled vs. Loosely Coupled Systems


– tightly coupled system generally represent systems
which have some degree of sharable memory
through which processors can exchange
information with normal load / store operations
– Loosely coupled systems generally represent
systems in which each processor has its own
private memory and processor to processor
information exchange is done via some message
passing mechanism like a network or a shared
peripheral bus
Multiprocessor Systems
• The text presentation in chapters 16 and 17 deals
primarily with tightly coupled systems in 2 basic
catagories:
– uniform memory access systems (UMA)
– non-uniform memory access systems (NUMA)
• Distributed systems (discussed beginning in
chapter 4) are often referred to as no remote
access or NORMA systems
Multiprocessor Systems
• UMA and NUMA systems provide access to a
common set of physical memory addresses using
some interconnect strategy
– a single bus interconnect is often used for UMA
systems
– some form of fabric interconnect is common in
NUMA systems (sometimes called ccNUMA)
• cross-bar switches
• multistage interconnect networks
• far-memory fabric interconnects
Single Bus Topology
Cross-bar Switch Topology
Multistage Interconnect Topology
In a full NUMA system memory and peripheral space is
visible to any processor on any node

Local Bus Local Bus Local Bus Local Bus

P0 P P0 P P0 P P0 P
C C C C
P1 I P1 I P1 I P1 I

P2 M P2 M P2 M P2 M
E E E E
M M M M
P3 P3 P3 P3

FMC FMC FMC FMC

Fabric Backplane
Multiprocessor Operating Systems
• Common software architectures of multiprocessor
systems:
– Separate supervisor configuration
• Common in clustered systems
• May only share limited resources
– Master-Slave configuration
• One CPU runs the OS, others run only applications
• OS CPU may be a bottleneck, may fail
– Symmetric configuration (SMP)
• OS runs everywhere
• Each processor can do all operations
Multiprocessor Operating Systems
• SMP systems are most popular today
• OS issues to consider
– Execution units (threads)
– Synchronization
– CPU scheduling
– Memory management
– Reliability and fault tolerance
Multiprocessor Operating Systems
• Threads
– Address space utilization
– Platform implementation
• User level threads
– Efficient
– Complex
– Course grain control
• Kernel level threads
– Expensive
– Less complex
– Fine grain control
Multiprocessor Operating Systems
• Synchronization issues
– Interrupt disable no longer sufficient
– Software solutions like Peterson’s algorithm
required when hardware platform only offers
simple memory interlock
– Hardware assist needed for efficient
synchronization solutions
• Test-and-set type instructions
– Pentium XCHG instruction
– Motorola 88110 XMEM instruction
Multiprocessor Operating Systems
• Processor scheduling issues
– Schedule at the process or thread level ?
– Which processors can an executable entity be
scheduled to ?
• Cache memory hierarchies play a major role
– Affinity scheduling and cache footprint
• Can the OS make good decisions without
application hints ?
– Applications understand how threads use memory, the OS
does not
• What type of scheduling policies will the OS
provide ?
Main memory level (2)
Schedule to some min
level for some CPU
set

Ternary (L3) shared cache level (1)

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

CPU and dedicated cache (L1,L2) level (0)


Multiprocessor Operating Systems
• Memory management issues
– Address space organization
– Types of memory objects
• Text, data, stack, heap, memory mapped files,
shared memory segments, etc.
• Shared vs private objects
• Anonymous vs file objects
– Swap space allocation strategies
– Paging strategies and free memory list(s)
configurations
– Kernel data structure locations

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