Microchip CCP, Timer, PWM Pic18fxxx
Microchip CCP, Timer, PWM Pic18fxxx
131.072 seconds
(2.18 minutes)
4 ms
BROWNOUT RESET (4.4)
• The brownout reset is programmed and used to reset
the microcontroller if the power supply voltage drops
below a pre-programmed value.
• The brownout reset triggers the microcontroller and
waits at the reset state until the power supply voltage
returns to a level higher then the programmed brownout
voltage.
CLOCKS
• The PIC18 family allows many different clocking modes for
operation. Some include internal timing and some external.
• External timing sources are very accurate and are crystal-
or resonator-based. A less accurate, but less expensive
timing source is an RC circuit. An oscillator module or
external timing signal can also be used for the
microcontroller.
CRYSTAL/CERAMIC
RESONATOR OPERATION
(XT, HS OR HSPLL
CONFIGURATION)
CLOCKS
IN DIGITAL SYSTEMS
• Counting is a fundamental concept.
• Clock is an essential element.
• Count is in synchronization with the clock.
• Count is converted in time by multiplying the
count and the clock period.
• Counter is a register that can be loaded with a
binary number (count) which can be
decremented or Incremented per clock cycle.
COUNTERS AND TIMERS
Calculating time:
• Find the difference between the beginning
count and the last count
• Multiply the count difference by the clock
period.
• The register can also be used as a counter
by replacing the clock with a signal from an
event.
• When a signal from an event arrives, the
count in the register is incremented (or
decremented); thus, the total number of
events can be counted.
TIMER APPLICATIONS
Time delay
Pulse wave generation
COUNTER
TIMER
Instruction cycle
= 4 clock cycle
The TMR0
TIMER0 (11.0) interrupt is
generated when
TIMER0 BLOCK DIAGRAM (8-BIT MODE)
the TMR0
register overflows
from FFh to 00h in
8-bit mode, or
from FFFFh to
0000h in 16-bit
mode. This
overflow sets
the TMR0IF flag
bit. The interrupt
TIMER0 BLOCK DIAGRAM (16-BIT MODE)
can be masked by
clearing the
TMR0IE bit
(INTCON<5>).
Before reenabling
the interrupt, the
TMR0IF bit must
be cleared
in software by the
Interrupt Service
Routine
The TMR0
TIMER0 (11.0) interrupt is
generated when
TIMER0 BLOCK DIAGRAM (8-BIT MODE)
the TMR0
register overflows
from FFh to 00h in
8-bit mode, or
from FFFFh to
0000h in 16-bit
mode. This
overflow sets
the TMR0IF flag
bit. The interrupt
TIMER0 BLOCK DIAGRAM (16-BIT MODE)
can be masked by
clearing the
TMR0IE bit
(INTCON<5>).
Before reenabling
the interrupt, the
TMR0IF bit must
be cleared
in software by the
Interrupt Service
Routine
TIMER0 (11.0)
REGISTERS ASSOCIATED WITH TIMER0
CAPTURE, COMPARE, AND
PWM (CCP) MODULES (15.0)
tON
D
tON tOFF
CAPTURE, COMPARE, AND
PWM (CCP) MODULES (15.0)