Unit-4 Arm Architecture
Unit-4 Arm Architecture
• The ADD adds R2 to R1 and puts the result in register R0 This is the
typical way to read an assembly instruction. Add R2 to R1 and put it (the
result) in R0. The equivalent machine code that will execute on the
processor is shown alongside the ADD instruction.
• The 'Cond' field contains '1110' for always execute. These bits come into
play when using conditional suffixes appended to the ADD operation.
The next field is unused and set to zero. The 'I' field is zero because 'Op2'
is a register and not an immediate value. The 'S' field is zero because we
did not append an S to the ADD operation, i.e., we don't want this
instruction to update the status register flags (N, Z, C, and V, discussed
above).