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Microinstructions With Next Address Field

The document discusses different techniques for microinstruction sequencing in a microprogram control unit. It describes how a microprogram sequencer provides capabilities like incrementing the address, branching, and handling subroutine calls. There are three general techniques for determining the next address based on the microinstruction format: using two address fields, a single address field, or variable format. The two address field approach provides two address fields to select from. The single address field approach uses the address field, instruction register opcode, or next sequential address. It also describes a variable format approach using different microinstruction formats.

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alliah shalymar santana
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439 views

Microinstructions With Next Address Field

The document discusses different techniques for microinstruction sequencing in a microprogram control unit. It describes how a microprogram sequencer provides capabilities like incrementing the address, branching, and handling subroutine calls. There are three general techniques for determining the next address based on the microinstruction format: using two address fields, a single address field, or variable format. The two address field approach provides two address fields to select from. The single address field approach uses the address field, instruction register opcode, or next sequential address. It also describes a variable format approach using different microinstruction formats.

Uploaded by

alliah shalymar santana
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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CHAPTER 7.5.

4
Microinstructions with
Next-Address Field

SANTANA, ALLIAH SHALYMAR T.


CEIT-15-801E
Microinstruction Sequencing

 Micro-program control unit can be viewed as consisting of two


parts:
1. The control memory that stores the microinstructions.
2. Sequencing circuit that controls the generation of the next
address.
Microinstruction Sequencing

A micro-program sequencer attached to a control


memory inputs certain bits of the microinstruction, from
which it determines the next address for control memory.
A typical sequencer provides the following address-
sequencing capabilities:
Microinstruction Sequencing

1. Increment the present address for control memory.


2. Branches to an address as specified by the address field of the
micro instruction.
3. Branches to a given address if a specified status bit is equal to 1.
4. Transfer control to a new address as specified by an external source
(Instruction Register).
5. Has a facility for subroutine calls and returns.
Microinstruction Sequencing

 Depending on the current microinstruction condition flags, and the


contents of the instruction register, a control memory address must
be generated for the next micro instruction.
 There are three general techniques based on the format of the
address information in the microinstruction:
1. Two Address Field.
2. Single Address Field.
3. Variable Format
Microinstruction Sequencing

 Depending on the current microinstruction condition flags, and the


contents of the instruction register, a control memory address must
be generated for the next micro instruction.
 There are three general techniques based on the format of the
address information in the microinstruction:
1. Two Address Field.
2. Single Address Field.
3. Variable Format
Two Address Field

 Depending on the current microinstruction


condition flags, and the contents of the
instruction register, a control memory
address must be generated for the next
micro instruction.
 There are three general techniques based
on the format of the address information in
the microinstruction:
1. Two Address Field.
2. Single Address Field.
3. Variable Format
Two Address Field

 The simplest approach is to provide two address field in each


microinstruction and multiplexer is provided to select:
• Address from the second address field.
• Starting address based on the OPcode field in the current instruction.
 The address selection signals are provided by a branch logic module whose
input consists of control unit flags plus bits from the control partition of the
micro instruction.
Single Address Field

 Two-address approach is simple but it


requires more bits in the
microinstruction. With a simpler
approach, we can have a single
address field in the micro instruction
with the following options for the next
address.
• Address Field.
• Based on OPcode in instruction register.
• Next Sequential Address.
Single Address Field

 Two-address approach is simple but it requires more bits in the


microinstruction. With a simpler approach, we can have a
single address field in the micro instruction with the following
options for the next address.
• Address Field.
• Based on OPcode in instruction register.
• Next Sequential Address.
Single Address Field

 In this approach, there are two entirely different


microinstruction formats. One bit designates which format is
being used. In this first format, the remaining bits are used to
activate control signals. In the second format, some bits drive
the branch logic module, and the remaining bits provide the
address. With the first format, the next address is either the next
sequential address or an address derived from the instruction
register. With the second format, either a conditional or
unconditional branch is specified.

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