Multiplexer

Multiplexer is a combinational circuit that has maximum of 2n data inputs, „n‟ selection lines and single output
line. One of these data inputs will be connected to the output based on the values of selection lines.
Since there are (n) selection lines, there will be 2n possible combinations of zeros and ones. So, each
combination will select only one data input.

  .  

{
.
.
.
2n to 1
𝑛
. Multiplexer  𝑂𝑢𝑡𝑝𝑢𝑡 𝐿𝑖𝑛𝑒
2 𝐼𝑛𝑝𝑢𝑡 𝐿𝑖𝑛𝑒𝑠 .
.
.
..
.
.

𝑛  𝑆𝑒𝑙𝑒𝑐𝑡𝑖𝑜𝑛 𝐿𝑖𝑛𝑒𝑠
4 to 1 Multiplexer:

4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines S1 & S0 and one output Y. The block diagram of 4x1
Multiplexer is shown in the following figure.

Select Lines output

S1 S0 Y 1

0 0 I0 2

0 1 I1 3
S1 4
1 0 I2
1 1 I3

 From Truth table, we can directly write the Boolean function for output, Y as:
We can implement this Boolean function using Inverters, AND gates & OR gate. The circuit diagram of 4x1 multiplexer is
shown in the following figure.
 De-Multiplexer
De-Multiplexer is a combinational circuit that performs the reverse operation of Multiplexer. It has single input, (n) selection
lines and maximum of 2n outputs. The input will be connected to one of these outputs based on the values of selection lines.
Since there are (n) selection lines, there will be 2 n possible combinations of zeros and ones. So, each combination can select
only one output. De-Multiplexer is also called as De-Mux.

1 to 4 De-Multiplexer :

1 to 4 De-Multiplexer has one input I, two selection lines, S1 & S0 and four outputs Y3, Y2, Y1 & Y0. The block diagram of 1 to
4 De-Multiplexer is shown in the following figure.
 The single input (I) will be connected to one of the four outputs, Y3 to Y0 based on the values of selection lines S1 & S0. The
Truth table of 1x4 De-Multiplexer is shown below.

Select Lines Output

S1 S0 Y3 Y2 Y1 Y0
0 0 0 0 0 I
0 1 0 0 I 0
1 0 0 I 0 0
1 1 I 0 0 0

From
  the above Truth table, we can directly write the Boolean
functions for each output as
, , , and

We can implement these Boolean functions using Inverters & 3-input AND gates.
The circuit diagram of 1x4 De-Multiplexer is shown in the following figure.
Implementation
  of Boolean function using Multiplexer:
Using Multiplexer to implement Boolean function has advantage over using only logic gates, because it is more simple and
need single integrated chip (multiplexer) with less number of gates

Example: Use multiplexer to implement Boolean function ?

Solution:
Select multiplexer type, since the Boolean function has for input variables x, y, and z, there are two options. One selector x
line and two selector lines, you can implement using 2 to 1 MUX or 4 to 1 MUX.
 In case of using 2 to 1 MUX:
Input The truth table is:
S0=x y z Output Y Inputs
0 0 0 0 yz 00 01 11 10
0 0 1 1 0 1 1 0
0 1 0 0 𝐼0=𝑧
0 1 1 1
1 0 0 1
1 0 1 1 yz 00 01 11 10
1 1 0 0 1 1 0 0
1 1 1 0 𝐼1=𝑦ത
 The following figure shows the implementation of 𝐹(𝑥,𝑦,𝑧) using 2 to 1 MUX with only on NOT gate for

 
 
 
𝑧   
    2n to 1  𝑌
  Multiplexer
   
 
 ´𝑦  
 
 
 

𝑆
  0 =𝑥
 In case of using 4 to 1 MUX:
Input The truth table is:

S0=x S1=y z Output Y Inputs

0 0 0 0 𝐼0=𝑧
0 0 1 1
0 1 0 0 𝐼1=𝑧
0 1 1 1
1 0 0 1 𝐼2=1
1 0 1 1
 
1 1 0 0 𝐼3=0  
1 1 1 0  
 𝑧    
 
2n to 1
 𝑌
 𝑧
Multiplexer
 
 
The figure shows the implementation of 𝐹(𝑥,𝑦,𝑧) using 2 to 1 1
   
 
MUX with only on NOT gate for 𝑦 ̅.
0
     
 

  
 Example: Use multiplexer to implement Boolean function 𝐹(𝐴,𝐵,𝐶,𝐷)=∑▒𝑚(1,4,5,7,9,12,13) using 4 to 1 MUX?

Solution:

Since the Boolean function 𝐹(𝐴,𝐵,𝐶,𝐷) has 4-input variables A, B, C, and D and selected multiplexer is 4 to 1 MUX,
So the Input The truth table is:
S0=A S1=B C D Output Y Inputs
0 0 0 0 0 CD 00 01 11 10
0 0 0 1 1 0 1 0 0
0 0 1 0 0 𝐼0 = 𝐶ҧ
𝐷
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1 CD 00 01 11 10
0 1 1 0 0 1 1 1 0
0 1 1 1 1 𝐼1 = 𝐶 + 𝐷
1 0 0 0 0
1 0 0 1 1 CD 00 01 11 10
1 0 1 0 0 0 1 0 0
1 0 1 1 0 𝐼2 = 𝐶ҧ
𝐷
1 1 0 0 1
1 1 0 1 1 CD 00 01 11 10
1 1 1 0 0 1 1 0 0
1 1 1 1 0 𝐼 = 𝐶ҧ
The following figure shows the final circuit for implementing 𝐹(𝐴,𝐵,𝐶,𝐷)

𝐶´  𝐷
   
4 to 1
C   Y
Multiplexer

 ´ 
𝐶  

𝑆
  0 = 𝐴 𝑆 1= 𝐵
2  𝑆𝑒𝑙𝑒𝑐𝑡𝑖𝑜𝑛 𝐿𝑖𝑛𝑒𝑠