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Multiple Processor Systems: 8.1 Multiprocessors 8.2 Multicomputers 8.3 Distributed Systems

This document compares and contrasts three types of multiple CPU systems: multiprocessors, multicomputers, and distributed systems. Multiprocessors have two or more CPUs that share full access to a common memory. Multicomputers have tightly-coupled CPUs that do not share memory and communicate via message passing. Distributed systems consist of independent computers that communicate over a network. The document discusses hardware architectures, operating systems, communication methods, scheduling, and challenges for each type of multiple CPU system.

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114 views36 pages

Multiple Processor Systems: 8.1 Multiprocessors 8.2 Multicomputers 8.3 Distributed Systems

This document compares and contrasts three types of multiple CPU systems: multiprocessors, multicomputers, and distributed systems. Multiprocessors have two or more CPUs that share full access to a common memory. Multicomputers have tightly-coupled CPUs that do not share memory and communicate via message passing. Distributed systems consist of independent computers that communicate over a network. The document discusses hardware architectures, operating systems, communication methods, scheduling, and challenges for each type of multiple CPU system.

Uploaded by

Rajesh c
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Chapter 8

Multiple Processor Systems

8.1 Multiprocessors
8.2 Multicomputers
8.3 Distributed systems
Multiprocessor Systems

• Continuous need for faster computers


– shared memory model
– message passing multiprocessor
– wide area distributed system
Distributed Systems (1)

Comparison of three kinds of multiple CPU systems

3
Multiprocessors

Definition:
A computer system in which two or
more CPUs share full access to a
common RAM
Multiprocessor Hardware (1)

Bus-based multiprocessors
5
Multiprocessor Hardware (2)

• UMA Multiprocessor using a crossbar switch


Multiprocessor Hardware (3)

• UMA multiprocessors using multistage switching


networks can be built from 2x2 switches

(a) 2x2 switch (b) Message format


Multiprocessor Hardware (4)

• Omega Switching Network


Multiprocessor Hardware (5)

NUMA Multiprocessor Characteristics


1. Single address space visible to all CPUs
2. Access to remote memory via commands
- LOAD
- STORE
3. Access to remote memory slower than to local
Multiprocessor Hardware (6)

(a) 256-node directory based multiprocessor


(b) Fields of 32-bit memory address
(c) Directory at node 36
Multiprocessor OS Types (1)

Bus

Each CPU has its own operating system


Multiprocessor OS Types (2)

Bus

Master-Slave multiprocessors
Multiprocessor OS Types (3)

Bus

• Symmetric Multiprocessors
– SMP multiprocessor model
Multiprocessor Synchronization (1)

TSL instruction can fail if bus already locked


Multiprocessor Synchronization (2)

Multiple locks used to avoid cache thrashing


Multiprocessor Synchronization (3)
Spinning versus Switching
• In some cases CPU must wait
– waits to acquire ready list
• In other cases a choice exists
– spinning wastes CPU cycles
– switching uses up CPU cycles also
– possible to make separate decision each time
locked mutex encountered
Multiprocessor Scheduling (1)

• Timesharing
– note use of single data structure for scheduling
Multiprocessor Scheduling (2)

• Space sharing
– multiple threads at same time across multiple CPUs
Multiprocessor Scheduling (3)

• Problem with communication between two threads


– both belong to process A
– both running out of phase
Multiprocessor Scheduling (4)

• Solution: Gang Scheduling


1. Groups of related threads scheduled as a unit (a gang)
2. All members of gang run simultaneously
•
on different timeshared CPUs
3. All gang members start and end time slices together
Multiprocessor Scheduling (5)

Gang Scheduling
Multicomputers

• Definition:
Tightly-coupled CPUs that do not share
memory

• Also known as
– cluster computers
– clusters of workstations (COWs)
Multicomputer Hardware (1)

• Interconnection topologies
(a) single switch (d) double torus
(b) ring (e) cube
(c) grid (f) hypercube
Multicomputer Hardware (2)

• Switching scheme
– store-and-forward packet switching
Multicomputer Hardware (3)

Network interface boards in a multicomputer


Low-Level Communication Software (1)

• If several processes running on node


– need network access to send packets …
• Map interface board to all process that need it

• If kernel needs access to network …


• Use two network boards
– one to user space, one to kernel
Low-Level Communication Software (2)

Node to Network Interface Communication


• Use send & receive rings
• coordinates main CPU with on-board CPU
User Level Communication Software

(a) Blocking send call


• Minimum services
provided
– send and receive
commands

• These are blocking


(synchronous) calls

(b) Nonblocking send call


Remote Procedure Call (1)

• Steps in making a remote procedure call


– the stubs are shaded gray
Remote Procedure Call (2)
Implementation Issues
• Cannot pass pointers
– call by reference becomes copy-restore (but might fail)
• Weakly typed languages
– client stub cannot determine size
• Not always possible to determine parameter types
• Cannot use global variables
– may get moved to remote machine
Distributed Shared Memory (1)

• Note layers where it can be implemented


– hardware
– operating system
– user-level software
Distributed Shared Memory (2)

Replication
(a) Pages distributed on 4 machines

(b) CPU 0 reads page 10

(c) CPU 1 reads page 10


Distributed Shared Memory (3)

• False Sharing
• Must also achieve sequential consistency
Multicomputer Scheduling
Load Balancing (1)

Process

• Graph-theoretic deterministic algorithm


Load Balancing (2)

• Sender-initiated distributed heuristic algorithm


– overloaded sender
Load Balancing (3)

• Receiver-initiated distributed heuristic algorithm


– under loaded receiver

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