8251 USART

Universal Synchronous and asyhnchrous receiver and

transmitter
 Block Diagram of 8251A USART ( Fig
1)

1. Read/Write control
logic
2. Transmitter
3. Receiver
4. Data bus buffer
5. Modem
 Read/Write Control Logic:
• The Read/Write Control logic interfaces the 8251A with CPU, determines the
functions of the 8251A according to the control word written into its control
register.
• It monitors the data flow.
• This section has three registers and they are control register, status register and data
buffer.
• The active low signals RD, WR, CS and C/D(Low) are used for read/write
operations with these three registers.
• When C/D(Low) is high, the control register is selected for writing control word or
reading status register.
• When C/D(Low) is low, the data buffer is selected for read/write operation.
• When the reset is high, it forces 8251A into the idle mode.
• The clock input is necessary for 8251A for communication with CPU and this clock
does not control either the serial transmission or the reception rate.
 Transmitter Section:
• The transmitter section accepts parallel data from CPU and converts them into
serial data.
• The transmitter section is doubled buffered, i.e. it has a buffer register to hold
an 8-bit parallel data and another register called output register to convert the
parallel data into serial bits.
• When output register is empty, the data is transferred from buffer to output
register. Now the processor can again load can other data in buffer register.
• If buffer register is empty, then TxRDY is goes to high.
• If output register is empty, then TxEMPTY goes to high.
• The clock Signal, TxC (low) controls the rate at which the bits are transmitted
by the USART.
• The clock frequency can be 1, 16 or 64 times the baud rate.
 Receiver Section:

• The receiver section accepts serial data and convert them into parallel
data.
• The receiver section is double buffered, i.e. it has an input register to
receive serial data and convert to parallel, and a buffer register to
hold the parallel data.
• When the RxD line goes low, the control logic assumes it as a START
bit, waits for half a bit time and samples the line again.
• If the line is still low, then the input register accepts the following bits,
forms a character and loads it into the buffer register
 MODEM Control:
• The MODEM control unit allows to interface a MODEM to 8251A and
to establish data communication through MODEM over telephone lines.
• This unit takes care of handshake signals for MODEM interface.
• The 8251 functional configuration is programed by software. Operation
between the 8251 and a CPU is executed by program control. Table
shows the operation between a CPU and the device.
 Control Words:
• 1.Mode Instruction (Setting of function)
• 2.Command (Setting of Operation)
• Mode Instruction
• Mode instruction is used for setting the function of the 8251. Mode instruction will be in
“wait for write” at either internal reset or external reset. That is, the writing of a control
word after resetting will be recognized as a “mode instruction”. Items set by mode
instruction are as follows:
• Synchronous/Asynchronous mode
Stop bit length (Asynchronous mode)
• Character length , Parity bit
• Baud rate factor (Asynchronous mode)
• Internal/External Synchronization (Synchronous mode)
• Number of synchronous characters (Synchronous mode)
• The bit configuration of mode instruction is shown in Figures. In the case of synchronous
mode, it is necessary to write one or two-byte sync characters. If sync characters were
written, a function will be set because the writing of sync characters constitutes part of
mode instruction.
Bit configuration asynchrounous (Fig 2)
Bit Configuration of Mode Instruction
(Synchronous) ( Fig 3)
Command
Status word
Statement: Write a assembly program to transmit a message from an 8085 to a
CRT terminal for the following requirements and draw the interfacing diagram.
i) A message of 50 characters is stored as ASCII characters (without parity) in
memory locations starting at 2200H.
ii) Baud rate x 16
iii) Stop bits 2
Solution Description:
CRT terminal uses normal RS 232C standard serial communication
interface. Therefore, to transmit data to CRT it is necessary to have RS 232C
interface at the sending end.
Fig. shows the interfacing of 8251 with RS 232C to 8085.
As shown in the Fig. three RS-232C signals (TxD, RxD are Ground) are used
for serial communication between the CRT terminal and the 8085 system.
Line drivers and receivers are used to transfer logic levels from TTL logic to
RS-232C logic.
For RS-232C the voltage level +3V to +15V is defined as logic 0 and voltage
level from -3V to -15V is defined as logic 1.
The line driver, MC 1488, converts logic 1 of TIL to approximately -9V and
logic a of TIL to  approximately +9V. These levels at the receiving end are
again converted by the line receiver, MC1489, into TTL compatible logic
Source program:

LXI H, 2200H : Initialize memory pointer to pointer the message

MVI C, 32H : Initialize counter to send 50 characters
MVI A, 00H
OUT FFH
OUT FFH : Dummy mode word
OUT FFH
MVI A, 40H *: Reset command word
OUT FFH : Reset 8251A
MVI A, CAH : Mode word initialization
OUT FFH
MVI A, 11H : Command word initialization
OUT FFH
CHECK: IN FFH
ANI 0lH : Check TxRDY
JZ CHECK : Is TxRDY I? if not, check again
MOV A, M : Get the character in accumulator
OUT FEH : Send character to the transmitter
INX H : Increment memory pointer
DCR C : Decrement counter
JNZ CHECK : if not zero, send next character
HLT : Stop program execution
 Statement: Write a assembly program to
receive 25 bytes from an CRT terminal to
8085 for the following requirements.
i) Baud rate x 16
ii) Stop bits 2
Note: Reading of status word is necessary for checking the status of RxD line of
8085 that whether receiver is ready to give data or not

LXI H, 2300 H : Initialize memory pointer

MVI C, 19 H : Initialize counter to accept 25 characters
MVI A, 00H
OUT FFH
OUT FFH : Dummy mode word
OUT FFH
MVI A, 40H : Reset command word
OUT FFH : Reset 8251 A
MVI A, CAH : Mode word initialization
OUT FFH
MVI A, 14 H : Command word initialization
OUT FFH
CHECK: IN FFH
ANI 02 H : Check RxRDY
JZ CHECK : Is RxRDY ? If not, check again
IN FEH : Get the character
MOV M, A : save the character
INX H : Increment memory pointer
DCR C : Decrement memory pointer
: JNZ C CHECK : If not zero, accept next character
HLT : Stop program execution